Development of 3-Dimensional Module Package, "System Block Module" (English)

51st, Electronic components and technology conference; 2001; Orlando, FL
Electronic components and technology conference
IEEE ; 2001
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0_1
2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220)
| 2001
1
Improved VCSEL structures for 10 gigabit-Ethernet and next generation optical-integrated PC-boards
Mederer, F. / Jager, R. / Joos, J. / Kicherer, M. / King, R. / Michalzik, R. / Riedl, M. / Unold, H. / Ebeling, K.J. / Lehmacher, S. et al. | 2001
8
Highly alignment tolerant InGaAs inverted MSM photodetector heterogeneously integrated on a differential Si CMOS receiver operating at 1 Gbps
Vrazel, M. / Jae Joon Chang, / In-Dal Song, / KeeShik Chung, / Brooke, M. / Jokerst, N.M. / Brown, A. / Wills, D.S. | 2001
14
3.125 Gbps/channel 4-channel parallel optical transmitter and receiver module with MT-RJ receptacle
Yoneda, I. / Yamauchi, K. / Yunoki, S. / Matsumoto, K. / Nakamura, T. / Miyoshi, K. / Nagahori, T. | 2001
20
Passively aligned fiber-optic transmitter integrated into LTCC module
Karppinen, M. / Kautio, K. / Heikkinen, M. / Hakkila, J. / Karioja, P. / Jouhti, T. / Tervonen, A. / Oksanen, M. | 2001
26
Low cost CWDM optical transceivers
Grann, E.B. | 2001
30
Short wave SFF small form factor transceivers
Abe, S. / Tobita, K. / Shinozaki, T. / Arai, K. / Takeshita, K. / Tanaka, K. / Isono, Y. | 2001
35
Encapsulated double-bump WL-CSP: design and reliability
Keser, B. / Yeung, B. / White, J. / Fang, T. | 2001
40
Development of low-cost and highly reliable wafer process package
Kazama, A. / Satoh, T. / Yamaguchi, Y. / Anjoh, I. / Nishimura, A. | 2001
47
A design and manufacturing solution for high-reliable, non-leaded CSPs like QFN
Kuhnlein, G. | 2001
54
Wide area vertical expansion (WAVE/sup TM/) package design for high speed application: reliability and performance
Young-Gon Kim, / Mohammed, I. / Byong-Su Seol, / Teck-Gyu Kang, | 2001
54
Wide Area Vertical Expansion (WAVE™) Package Design for High Speed Application: Reliability and Performance
Kim, Y.-G. / Mohammed, I. / Seol, B.-S. / Kang, T.-G. / Institute of Electrical and Electronics Engineers | 2001
63
Development of low cost, highly reliable CSP using gold-gold interconnection technology
Isozaki, S. / Kimura, T. / Shimada, T. / Nakajima, H. | 2001
69
A novel low-cost pluggable chip scale package for high pin-count applications
Crane, S.W. / Jeon, J. / Ogata, C. / Wang, T. / Cangellaris, A. / Schutt-Aine, J. | 2001
74
Moisture blocking planes and their effect on reflow performance in achieving reliable Pb-free assembly capability for PBGAs
Shook, R.L. / Gerlach, D.L. / Vaccaro, B.T. | 2001
80
Whole field displacement measurement technique using speckle interferometry
Cote, K.J. / Dadkhah, M.S. | 2001
85
Effect of underfill on BGA reliability
Pyland, J. / Raghuram Pucha, / Suresh Sitaraman, | 2001
91
An accelerated reliability test method to predict thermal grease pump-out in flip-chip applications
Chia-Pin Chiu, / Biju Chandran, / Mello, K. / Kelley, K. | 2001
98
Mechanism and growth rate of underfill delaminations in flip chips
Jakschik, S. / Feustel, F. / Meusel, E. | 2001
104
Impact of JEDEC test conditions on new-generation package reliability
Mercado, L.L. / Chavez, B. | 2001
111
Optimizing the package design with electrical modeling and simulation
Quan Qi, / Quint, D. / Frank, M. / Michalka, T. / Bois, K. | 2001
118
Package capacitors impact on microprocessor maximum operating frequency
Waizman, A. / Chee-Yee Chung, | 2001
123
Design and packaging challenges for on-board cache subsystems using source synchronous 400 Mb/s interfaces
Nam Pham, / Cases, M. / Guertin, D. | 2001
128
Microwave frequency model of wafer level package and increased loading effect on Rambus memory module
Junwoo Lee, / Baekkyu Choi, / Seungyoung Ahn, / Woonghwan Ryu, / Jae Myun Kim, / Kwang Seong Choi, / Joon-Ki Hong, / Heung-Sup Chun, / Joungho Kim, | 2001
133
Over GHz low-power RF clock distribution for a multiprocessor digital system
Woonghwan Ryu, / Albert Lu Chee Wai, / Fan Wei, / Wai Lai Lai, / Joungho Kim, | 2001
141
Modelling and characterisation of the polymer stud grid array (PSGA) package: electrical, thermal and thermo-mechanical qualification
Arun Chandrasekhar, / Vandevelde, B. / Driessens, E. / Pieters, P. / Beyne, E. / De Raedt, W. / Nauwelaers, B. / Van Puymbroeck, J. | 2001
149
Study on mobility of water and polymer chain in epoxy for microelectronic applications
Shijian Luo, / Leisen, J. / Wong, C.P. | 2001
155
Influence of temperature and humidity on adhesion of underfills for flip chip packaging
Shijian Luo, / Wong, C.P. | 2001
163
Viscosity of a no-flow underfill during reflow and its relationship to solder wetting
Morganelli, P. / Wheelock, B. | 2001
167
Study on the effect of toughening of no-flow underfill on fillet cracking
Kyoung-Sik Moon, / Lianhua Fan, / Wong, C.P. | 2001
174
Flip-chip assembly development via modified reflowable underfill process
Ping Miao, / Yixin Chew, / Tie Wang, / Foo, L. | 2001
181
Critical aspects of reworkable underfills for portable consumer products
Hannan, N. / Puligandla Viswanadham, | 2001
188
Low cost high-speed flip chip assembly processing
Gutentag, C. / Dudderar, T.D. | 2001
193
Consideration of mechanical chip crack on FBGA packages
Kiyono, S.S. / Yonehara, K. / Graf, R.S. / Howell, W.J. | 2001
198
Breakthrough ball attach technology by introducing solder paste screen printing
Chin, Y.T. / Khor, C.K. / Sow, H.P. / Ooi, S.J. / Tan, H.B. | 2001
203
Improvements and alternatives for ultra fine pitch encapsulation
Paquet, M.-C. / Tremblay, A. / Ouimet, S. / Tetreault, R. / Toutant, R. | 2001
210
Femtosecond micromachining applications for electro-optic components
Leong, K.H. / Said, A.A. / Maynard, R.L. | 2001
215
Unified system for manufacturing process control and data collection
Bentlage, M. / Hamilton, B. / Neuberger, R. | 2001
218
Novel monolithic VCSEL devices for datacom applications
Steinle, G. / Wolf, H.D. / Popp, M. / Egorov, A.Yu. / Kristen, G. / Riechert, H. | 2001
223
Optical solder effects of self-written waveguides in optical circuit devices coupling
Hirose, N. / Yoshimura, T. / Ibaragi, O. | 2001
229
Lithographically fabricated fiber guides for optical subassemblies
Cohen, M.S. / Cordes, M.J. / Cordes, S.A. / Gelorme, J.D. / Kuchta, D.M. / Lacey, D.L. / Rosner, J. / Speidell, J.L. | 2001
238
A silicon optical bench approach to low cost high speed transceivers
Goodrich, J. | 2001
242
Analysis and measures against heat-expansion for sub-micron LD assembly by passive alignment
Yamauchi, A. / Arai, Y. | 2001
247
Monte Carlo tolerance analysis of a passively aligned silicon waferboard package
Breedis, J.B. | 2001
255
Predicting solder joint reliability for thermal, power, and bend cycle within 25% accuracy
Syed, A. | 2001
264
On the effect of system constraints on mechanical integrity of high density packages used in telecommunication applications
Langari, A.R. / Morris, W.L. / Kuhlman, M. / Hashemi, H.S. / Dadkhah, M.S. | 2001
270
Design method for high reliable flip chip BGA package
Saito, N. / Yamada, O. / Ono, T. / Uda, T. | 2001
276
Reliability study of high-pin-count flip-chip BGA
Yuan Li, / Xie, J. / Verma, T. / Wang, V. | 2001
281
Solder parameter sensitivity for CSP life-time prediction using simulation-based optimization method
Vandevelde, B. / Beyne, E. / Zhang, K. / Caers, J. | 2001
288
The Characterization of Molded Underfill Material for Flip Chip Ball Grid Array Packages
Lui, F. / Wang, Y. P. / Chai, K. T. / Her, T. D. / Institute of Electrical and Electronics Engineers | 2001
288
Characterization of molded underfill material for flip chip ball grid array packages
Liu, F. / Wang, Y.P. / Chai, K. / Her, T.D. | 2001
293
On the performance of epoxy molding compounds for flip chip transfer molding encapsulation
Rector, L.P. / Shaoqin Gong, / Gaffney, K. | 2001
298
Development of new no-flow underfill materials for both eutectic solder and a high temperature melting lead-free solder
Haiying Li, / Wong, C.P. | 2001
304
Evaluation of commercially available, thick, photosensitive films as a stress compensation layer for wafer level packaging
Keser, B. / Prack, E.R. / Fang, T. | 2001
310
A novel approach for incorporating silica filler into no-flow underfill
Zhuqing Zhang, / Jicun Lu, / Wong, C.P. | 2001
317
New developments in single pass reflow encapsulant for flip chip application
Liu, J. / Kraszewski, R. / Xin Lin, / Wong, L. / Goh, S.H. / Allen, J. | 2001
323
RF micromechanical switches that can be post processed on commercial MMICs
Sloan, L.R. / Sullivan, C.T. / Tigges, C.P. / Sandoval, C.E. / Palmer, D.W. / Hietala, S. / Christenson, T.R. / Dyck, C.W. / Plut, T.A. / Schuster, G.R. | 2001
327
Modeling and design of RF MEMS structures using computationally efficient numerical techniques
Bushyager, N.A. / Tentzeris, M.M. | 2001
331
mm-wave microstrip and novel slot antennas on low cost large area panel MCM-D substrates-a feasibility and performance study
Grzyb, J. / Cottet, D. / Troster, G. | 2001
339
Simultaneous switching noise suppression for high speed systems using embedded decoupling
Hobbs, J.M. / Windlass, H. / Sundaram, V. / Sungjun Chun, / White, G.E. / Swaminathan, M. / Tummala, R.R. | 2001
344
Distributed Models for Multi-Terminal Capacitors
Li, Y.-L. / Elzinga, M. / Yahyaei-Moayyed, F. / Institute of Electrical and Electronics Engineers | 2001
348
Modeling and evaluating leadframe CSPs for RFICs in wireless applications
Horng, T.S. / Wu, S.M. / Huang, H.H. / Chiu, C.T. / Hung, C.P. | 2001
353
Advanced packaging technologies on 3D stacked LSI utilizing the micro interconnections and the layered microthin encapsulation
Tomita, Y. / Morifuji, T. / Ando, T. / Tago, M. / Kajiwara, R. / Nemoto, Y. / Fujii, T. / Kitayama, Y. / Takahashi, K. | 2001
361
Stacked thin dice packaging
Pienimaa, S.K. / Valtanen, J. / Heikkila, R. / Ristolainen, E. | 2001
367
A Wide Area Vertical Expansion (WAVE™) Packaging Process Development
Li, D. / Light, D. / Castillo, D. / Beroz, M. / Nguyen, M. / Wang, T. / Institute of Electrical and Electronics Engineers | 2001
367
A Wide Area Vertical Expansion (WAVE/sup TM/) packaging process development
Delin Li, / Light, D. / Castillo, D. / Beroz, M. / Nguyen, M. / Wang, T. | 2001
372
Solder wetting in a wafer-level flip chip assembly
Jicun Lu, / Busch, S.C. / Baldwin, D.F. | 2001
378
Design and thermo-mechanical analysis of a Dimple-Array Interconnect technique for power semiconductor devices
Wen, S.S. / Huff, D. / Guo-Quan Lu, | 2001
384
Room-temperature interconnection of electroplated Au microbump by means of surface activated bonding method
Matsuzawa, Y. / Itoh, T. / Suga, T. | 2001
388
Electronics packaging education: NSF and IEEE initiatives and modules
Wesling, P. | 2001
388
Electronics Packaging Education: NSF and IEEE Initiatives, Modules
Wesling, P. / Institute of Electrical and Electronics Engineers | 2001
392
Using an electromagnetic simulation tool for a course on electronics packaging
Kroger, H. | 2001
397
A web-based graduate course on the Mechanical Design of High Temperature and High Power Electronics
McCluskey, P. | 2001
401
Electronics packaging-a graduate course for Rutgers University School of Electrical and Computer Engineering
Caggiano, M.F. | 2001
405
A hands-on multi-disciplinary product development course for micro systems packaging education at Georgia Tech
Bhattacharya, S.K. / Hobbs, J.M. / Varadarajan, M. / Sanchez, O. / Tummala, R.R. / May, G.S. | 2001
410
Modeling and 3D visualization of laser material processing
Illyefalvi-Vitez, Z. / Gordon, P. | 2001
416
MEMS technology in optical layer networks
Walker, J.A. | 2001
423
MEMS technology-micromachines enabling the "all optical network"
Robinson, S.D. | 2001
429
Automated opto-electronic packaging for 10 Gb/s applications
Verdiell, J.-M. / Webjorn, J. / Kohler, R. / Epitaux, M. / Finot, M. / Kirkpatrick, P. / Lake, R. / Colin, S. / Mader, T. / Bennett, J. | 2001
433
SOA-based optical network components
Renaud, M. / Keller, D. / Sahri, N. / Silvestre, S. / Prieto, D. / Dorgeuille, F. / Pommereau, F. / Emery, J.Y. / Grard, E. / Mayer, H.P. | 2001
439
Packaging of optical Fibre Bragg Gratings
Psaila, D.C. / Inglis, H.G. | 2001
444
Optical components and their role in optical networks
Lebby, M. | 2001
448
Interfacial reaction studies on lead (Pb)-free solder alloys
Kang, S.K. / Shih, D.Y. / Fogel, K. / Lauro, P. / Yim, M.J. / Advocate, G. / Griffin, M. / Goldsmith, C. / Henderson, D.W. / Gosselin, T. et al. | 2001
455
Characterization of lead-free solders and under bump metallurgies for flip-chip package
Jong-Kai Lin, / De Silva, A. / Frear, D. / Yifan Guo, / Jin-Wook Jang, / Li Li, / Mitchell, D. / Yeung, B. / Zhang, C. | 2001
463
Thermal fatigue properties of lead-free solders on Cu and NiP under bump metallurgies
Zhang, C. / Jong-Kai Lin, / Li Li, | 2001
471
Study of the interface microstructure of Sn-Ag-Cu lead-free solders and the effect of solder volume on intermetallic layer formation
Salam, B. / Ekere, N.N. / Rajkumar, D. | 2001
478
Microstructure, joint strength and failure mechanism of Sn-Ag, Sn-Ag-Cu versus Sn-Pb-Ag solders in BGA packages
Ka Yau Lee, / Ming Li, / Olsen, D.R. / Chen, W.T. / Tan, B.T.C. / Mhaisalkar, S. | 2001
486
Fluxless Sn-Bi-Au bonding process using multilayer design
Choe, S. / Chuang, R. / Lee, C.C. | 2001
489
Full wave analysis of planar interconnect structures using FDTD-SPICE
Orhanovic, N. / Raghuram, R. / Matsui, N. | 2001
495
Closed-form representations for triangle impulse responses associated with single and coupled lossy transmission lines
Tingdong Zhou, / Dvorak, S.L. / Prince, J.L. | 2001
503
Exploration of a new, efficient approach to modeling and simulation of interconnects
Bing Zhong, / Dvorak, S.L. / Prince, J.L. | 2001
511
Radiative coupling in BGA packaging for mixed-signal and high-speed digital
Woods, W. / Diaz-Alvarez, E. / Krusius, J.P. | 2001
518
Synthesis of SPICE-compatible broadband electrical models for pins and vias
Pinello, W. / Morsey, J. / Cangellaris, A. | 2001
523
Distributed SPICE circuit model for ceramic capacitors
Smith, L.D. / Hockanson, D. | 2001
529
SoC or SoP? A balanced approach!
Davidson, E. | 2001
535
Process integration for low-cost system on a package (SOP) substrate
Sundaram, V. / Liu, F. / Dalmia, S. / White, G.E. / Tummala, R.R. | 2001
541
Development of advanced 3D chip stacking technology with ultra-fine interconnection
Takahashi, K. / Hoshino, M. / Yonemura, H. / Tomisaka, M. / Sunohara, M. / Tanioka, M. / Sato, T. / Kojima, K. / Terao, H. | 2001
547
Development of a high density pixel multichip module at Fermilab
Cardoso, G. / Zimmermann, S. / Kwan, S.W. / Andresen, J. / Appel, J.A. / Cancelo, G. / Christian, D.C. / Cihangir, S. / Downing, R. / Hall, B.K. et al. | 2001
552
Development of 3-dimensional module package, "System Block Module"
Imoto, T. / Matsui, M. / Takubo, C. / Akejima, S. / Kariya, T. / Nishikawa, T. / Enomoto, R. | 2001
558
A study of electromigration in 3D flip chip solder joint using numerical simulation of heat flux and current density
Lee, T.-Y.T. / Taek Yeong Lee, / King-Ning Tu, | 2001
564
Advanced thermal interface materials for enhanced flip chip BGA
Kohli, P. / Sobczak, M. / Bowin, J. / Matthews, M. | 2001
571
Self-Alignment Feasibility Study and Contact Resistance Improvement of Electrically Conductive Adhesives
Wu, J. / Moon, K.-S. / Wong, C. P. / Institute of Electrical and Electronics Engineers | 2001
571
Self-alignment feasibility study and contact resistance improvement of electrically conductive adhesives (ECAs)
Jiali Wu, / Kyoung-Sik Moon, / Wong, C.P. | 2001
576
Solder alternative: contact resistance improvements for SMCAs. II
Fredrickson, G. / Chih-Min Cheng, | 2001
580
Characterization of anisotropic conducting adhesive used as a flex-to-card interconnection
Prabhakumar, A. / Constable, J.H. | 2001
586
Development of thermoplastic isotropically conductive adhesive
Liong, S. / Wong, C.P. | 2001
593
Microwave cure of metal-filled electrically conductive adhesive
Tiebing Wang, / Ying Fu, / Becker, M. / Liu, J. | 2001
598
Reliability study and failure analysis of fine pitch solder bumped flip chip on low-cost printed circuit board substrate
Guo-Wei Xiao, / Chan, P.C.H. / Teng, A. / Lee, P.S.W. / Yuen, M.M.F. | 2001
606
Mechanical bending fatigue reliability and its application to area array packaging
Skipor, A. / Leicht, L. | 2001
613
Selection of base substrate material for design against interfacial delamination for a multilayered system-on-package (SOP) structure
Weidong Xie, / Hurang Hu, / Sitaraman, S.K. | 2001
620
Fracture mechanics analysis of the effect of geometry on delaminations in rectangular IC packages
Tay, A.A.O. / Zhu, H. | 2001
620
Fracture Mechanics Analysis of the Effect on Delaminations in Rectangular IC Packages
Tay, A. A. O. / Zhu, H. / Institute of Electrical and Electronics Engineers | 2001
624
Buckling driven interface delamination between a thin metal layer and a ceramic substrate
Liu, C.J. / Zhang, G.Q. / Ernst, L.J. / Vervoort, M. / Wisse, G. | 2001
632
Wavelength stability of DFB lasers for non-hermetic applications
Theis, C. / Jongwoo Park, / Kiely, P. / Tohmon, G. / Ping Wu, / Chakrabarti, U. / Osenbach, J. | 2001
637
Epoxy adhesive used in optical fiber/passive component: kinetics, voids and reliability
Jongwoo Park, / Taweeplengsangsuke, J. / Theis, C. / Osenbach, J. | 2001
645
Electromagnetic shielding of plastic material in laser diode modules
Chiu, S.K. / Cheng, J.Y. / Jou, W.S. / Jong, G.J. / Wang, S.C. / Wang, C.M. / Lin, C.S. / Wu, T.L. / Cheng, W.H. | 2001
648
A New Type of Package Incorporating a Thin AIN Heater for Planar Lightwave Circuit Devices
Saito, H. / Nagai, M. / Hirose, Y. / Tatoh, N. / Seki, M. / Saitou, M. / Tomikawa, T. / Yamanaka, S. / Institute of Electrical and Electronics Engineers | 2001
648
A new type of package incorporating a thin AlN heater for planar lightwave circuit devices
Saito, I. / Nagai, M. / Hirose, Y. / Tatoh, N. / Seki, M. / Saitou, M. / Tomikawa, T. / Yamanaka, S. | 2001
655
Low loss deep glass waveguides produced with dry silver electromigration process
Chuang, R.W. / Lee, C.C. | 2001
659
High-performance polymers for optical interconnect applications at 3M
Walker, C.B. / Kling, J.A. / Lee, N.A. / Novack, J. / Watson, J.E. | 2001
665
Development of a lead free chip scale package for wireless applications
Kripesh, V. / Poi-Siong Teo, / Tai, C.T. / Vishwanadam, G. / Yew Cheong Mui, | 2001
671
A fluxless Sn-In bonding process achieving high remelting temperature
Chuang, R.W. / Choe, S. / Lee, C.C. | 2001
675
Lead free interfacial structures and their relationship to Au plating including accelerated thermal cycle testing of non-leaden BGA spheres
Taguchi, T. / Kato, R. / Akita, S. / Okuno, A. / Suzuki, H. / Okuno, T. | 2001
681
Deformation and crack growth characteristics of SnAgCu vs 63Sn/Pb solder joints on a WLP in thermal cycle testing
Deok-Hoon Kim, / Elenius, P. | 2001
687
The kinetics of formation of ternary intermetallic alloys in Pb-Sn and Cu-Ag-Sn Pb-free electronic joints
Zribi, A. / Zavalij, L. / Borgesen, P. / Primavera, A. / Westby, G. / Cotts, E.J. | 2001
693
Intermetallic reactions between lead-free SnAgCu solder and Ni(P)/Au surface finish on PWBs
Zeng, K. / Vuorinen, V. / Kivilahti, J.K. | 2001
699
A study of normal, restoring, and fillet forces and solder bump geometry during reflow in concurrent underfill/reflow flip chip assembly
Renzhe Zhao, / Yun Zhang, / Johnson, R.W. / Harris, D.K. | 2001
704
Stress analysis and design optimization of a wafer-level CSP by FEM simulations and experiments
Rzepka, S. / Hofer, E. / Simon, J. / Meusel, E. / Reichl, H. | 2001
715
Simulation and measurement of thermal stress in quasi-monolithic integration technology (QMIT)
Joodaki, M. / Kompa, G. / Leinhos, T. / Kassing, R. / Hillmer, H. | 2001
721
Coupled thermal electric-modeling of flexible nanospring interconnects for high-performance probing
Ahmad, M. / Sitaraman, S.K. | 2001
730
Thermal characterization of bare-die stacked modules with Cu through-vias
Yamaji, Y. / Ando, T. / Morifuji, T. / Tomisaka, M. / Sunohara, M. / Sato, T. / Takahashi, K. | 2001
738
Parametric studies of the thermal performance of back-to-back tape ball grid array (TBGA) packages
Tonapi, S.S. / Sathe, S.B. / Sammakia, B.G. / Srihari, K. | 2001
738
Parametric Studies of the Thermal Performance of Back-to-Back Tape Bill Grid Array (TBGA) Packages
Tonapi, S. S. / Sathe, S. B. / Sammakia, B. G. / Srihari, K. / Institute of Electrical and Electronics Engineers | 2001
744
50 GHz broadband SMT package for microwave applications
Yoshida, K. / Shirasaki, T. / Matsuzono, S. / Makihara, C. | 2001
750
A pressure sensor using flip-chip on low-cost flexible substrate
Guo-Wei Xiao, / Chan, P.C.H. / Teng, A. / Jian Cai, / Yuen, M.M.F. | 2001
755
Room-temperature direct bonding of CMP-Cu film for bumpless interconnection
Shigetou, A. / Hosoda, N. / Itoh, T. / Suga, T. | 2001
761
Compliant cantilevered spring interconnects for flip-chip packaging
Lunyu Ma, / Qi Zhu, / Sitaraman, S.K. / Chua, C. / Fork, D.K. | 2001
767
Ultra thin electronics for space applications
Vendier, O. / Huan, M. / Drevofi, C. / Cazaux, J.L. / Beyne, E. / Van Hoof, R. / Marty, A. / Pinel, S. / Tasselli, J. / Marco, S. et al. | 2001
772
2 metal layer tape package for improving the performance of high speed DRAM
Tae-Sub Chang, / Dong-Ho Lee, / Jung-Jin Kim, / Mee-Hyun Ahn, | 2001
777
A practical, flip-chip, multi-layer pre-encapsulation technology for wafer-scale underfill
Burress, R.V. / Capote, M.A. / Yong-Joon Lee, / Lenos, H.A. / Zamora, J.F. | 2001
782
Flip chip assembly process development, reliability assessment and process characterization for polymer stud grid array-chip scale package
Paydenkar, C.S. / Jefferson, F.G. / Baldwin, D.F. | 2001
790
Investigation of low cost flip chip under bump metailization (UBM) systems on Cu pads
Jae-Woong Nab, / Kyung-Wook Paik, | 2001
790
Investigation of Low Cost Flip Chip Under Bump Metallization (UBM) Systems on Cu Pads
Nah, J.-W. / Paik, K.-W. / Institute of Electrical and Electronics Engineers | 2001
796
Adhesion/reliability/reworkability study on underfill material from free radical polymerization system and its hybrid composite with epoxy resin
Lianhua Fan, / Wong, C.P. | 2001
803
Assessment of flip chip assembly and reliability via reflowable underfill
Tie Wang, / Chew, T.H. / Lum, C. / Chew, Y.X. / Miao, P. / Foo, L. | 2001
810
Processing design rules for reliable reflowable underfill application
Kallmayer, C. / Becker, K.-F. / Jung, E. / Aschenbrenner, R. / Reichl, H. | 2001
816
Modeling RF passive circuits using coupled lines and scalable models
Dalmia, S. / Sung Hwan Min, / Swaminathan, M. | 2001
824
Experimental analysis of design options for spiral inductors integrated on low cost MCM-D substrates
Cottet, D. / Grzyb, J. / Scheffler, M. / Troster, G. | 2001
831
Parameterized models for a RF chip-to-substrate interconnect
Doerr, I. / Lih-Tyng Hwang, / Sommer, G. / Oppermann, H. / Li, L. / Petras, M. / Korf, S. / Sahli, F. / Myers, T. / Miller, M. et al. | 2001
839
New structure 1608 size chip tantalum capacitor -6.3 WV-10 /spl mu/F with face-down terminals for fillet-less surface mounting
Shirashige, M. / Oka, K. / Okada, K. | 2001
839
New Structure 1608 Size Chip Tantalum Capacitor - 6.3WV 10muF - with Face-Down Terminals for Fillet-less Surface Mounting
Shirashige, M. / Oka, K. / Okada, K. / Institute of Electrical and Electronics Engineers | 2001
847
Embedded TiNxOy thin-film resistors in a build-up CSP for 10 Gbps optical transmitter and receiver modules
Shibuya, A. / Matsui, K. / Takahashi, K. / Kawatani, A. | 2001
852
Simulation, modeling, and testing embedded RF capacitors in low temperature cofired ceramic
Blood, W. / Feng Ling, / Kamgaing, T. / Myers, T. / Petras, M. | 2001
858
Advances in long-wavelength single-mode VCSELs and packaging approaches for single-mode fiber applications
Coldren, L.A. / Hall, E. / Nakagawa, S. | 2001
864
Heterogeneous integration of OE arrays with Si electronics and micro-optics
Yue Liu, | 2001
870
SMT-compatible optical-I/O chip packaging for chip-level optical interconnects
Ishii, Y. / Koike, S. / Arai, Y. / Ando, Y. | 2001
876
Microlens arrays with integrated thin film power monitors
Eugene Ma, / Payne, A. / Nemchuk, N. / Domash, L. | 2001
880
Multi-channel optical interconnection modules up to 2.5 Gb/s/ch
Eichenberger, J. / Toyoda, S. / Takezawa, N. / Keller, C. / Sugiyama, M. / Iwasaki, Y. | 2001
886
Device processing technology for free-space optical interconnect system
Oren, M. / McCarthy, A. / Tooley, F. / Laprise, A.E. / Plant, D. / Kirk, A. / Lu, Y. / Zhao, J. | 2001
890
Constitutive behaviour of lead-free solders vs. lead-containing solders-experiments on bulk specimens and flip-chip joints
Wiese, S. / Schubert, A. / Walter, H. / Dukek, R. / Feustel, F. / Meusel, E. / Michel, B. | 2001
890
Constitutive Behavior of Lead-Free Solders v.s. Lead-Containing Solders - Experiments on Bulk Specimens and Flip-Chip Joints
Wiese, S. / Schubert, A. / Walter, H. / Dudek, R. / Feustel, F. / Meusel, E. / Michel, B. / Institute of Electrical and Electronics Engineers | 2001
903
Mold delamination and die fracture analysis of mechatronic packages
Mercado, L.L. / Wieser, H. / Hauck, T. | 2001
911
Sensitivity derivatives of dissimilar material junctions in electronic packages
Guven, I. / Barut, A. / Madenci, E. | 2001
919
Combined experimental and numerical investigation on flip chip solder fatigue with cure-dependent underfill properties
Yang, D.G. / Zhang, G.Q. / Ernst, L.J. / Caers, J.F.J. / Bressers, H.J.L. / Janssen, J. | 2001
925
Evaluation and optimization of package processing, design, and reliability through solder joint profile prediction
Yeung, B.H. / Lee, T.-Y.T. | 2001
931
Creep behavior of a molding compound and its effect on packaging process stresses
Kiasat, M.S. / Zhang, G.Q. / Ernst, L.J. / Wisse, G. | 2001
933
Studies on a novel flip-chip interconnect structure - pillar bump
Tie Wang, / Tung, F. / Foo, L. / Dutta, V. | 2001
939
Cr/Cu/Ni underbump metallization study
Tay Hui Leng, / Galen Kirkpatrick, / Andrew Tay, / Lu Li, | 2001
950
Investigation of UBM systems for electroplated Sn/37Pb and Sn/3.5Ag solder
Se-Young Jang, / Wolf, J. / Ehrmann, O. / Gloor, H. / Reichl, H. / Kyung-Wook Paik, | 2001
957
Micro-ball wafer bumping for flip chip interconnection
Hashino, E. / Shimokawa, K. / Yamamoto, Y. / Tatsumi, K. | 2001
965
Interfacial adhesion study for copper/SiLK interconnects in flip-chip packages
Miller, M.R. / Ho, P.S. | 2001
971
Thermo-electromigration phenomenon of solder bump, leading to flip-chip devices with 5,000 bumps
Nakagawa, K. / Baba, S. / Watanabe, M. / Matsushima, H. / Harada, K. / Hayashi, E. / Wu, Q. / Maeda, A. / Nakanishi, M. / Ueda, N. | 2001
978
Evaluation of lead(Pb)-free ceramic ball grid array (CBGA): Wettability, microstructure and reliability
Farooq, M. / Ray, S. / Sarkhel, A. / Goldsmith, C. | 2001
987
High speed multichip modules using flip chip mount technology for 10 Gbps optical transmission systems
Takahashi, K. / Ikeuchi, T. / Tsuda, T. / Chuzenji, T. | 2001
993
Improved grounding method for heat sinks of high speed processors
Diepenbrock, J.C. / Archambeault, B. / Hobgood, L.D. | 2001
997
High performance flip chip PBGA development
Stone, B. / Czarnowski, J.M. / Guajardo, J.R. | 2001
1003
Bump-less interconnect for next generation system packaging
Suga, T. / Otsuka, K. | 2001
1009
Flip chip in leaded molded package (FLMP)
Joshi, R. / Manatad, R. / Tangpuz, C. | 2001
1013
A new wafer-bonder of ultra-high precision using surface activated bonding (SAB) concept
Suga, T. / Howlader, M.M.R. / Itoh, T. / Inaka, C. / Arai, Y. / Yamauchi, A. | 2001
1019
Electrical test strategies for a wafer-level batch packaging technology
Keezer, D.C. / Patel, C.S. / Zhou, Q. / Meindl, J.D. | 2001
1024
Flip chip interconnection method applied to small camera module
Karasawa, J. / Segawa, M. / Kishimoto, Y. / Aoki, M. / Sasaki, T. | 2001
1029
Time for change in pre-assembly? The challenge of thin chips
Kroninger, W.J. / Hecht, F. / Lang, G. / Mariani, F. / Geyer, S. / Schneider, L. | 2001
1034
Innovative packaging concepts for ultra thin integrated circuits
Klink, G. / Feil, M. / Ansorge, F. / Aschenbrenner, R. / Reichl, H. | 2001
1040
Development of gold to gold interconnection flip chip bonding for chip on suspension assemblies
Luk, C.F. / Chan, Y.C. / Hung, K.C. | 2001
1045
Underfilled BGAs for a variety of plastic BGA package types and the impact on board-level reliability
Burnette, T. / Johnson, Z. / Koschmieder, T. / Oyler, W. | 2001
1052
The Comparison of Solder Joint Reliability Between BCC++ and MCC
Hung, S. C. / Zheng, P. J. / Ho, S. H. / Lee, S. C. / Wu, J. D. / Institute of Electrical and Electronics Engineers | 2001
1052
The comparison of solder joint reliability between BCC++ and QFN
Hung, S.C. / Zheng, P.J. / Ho, S.H. / Lee, S.C. / Wu, J.D. | 2001
1059
Solder joint crack propagation in plastic and ceramic packaged diodes mounted on insulated metal substrate
Sangalli, N. / Barker, D.B. | 2001
1065
Characterization and Analysis on the Solder Bail Shear Testing Conditions
Huang, X. / Lee, S.-W. R. / Yan, C. C. / Hui, S. / Institute of Electrical and Electronics Engineers | 2001
1065
Characterization and analysis on the solder ball shear testing conditions
Xingjia Huang, / Lee, S.-W.R. / Chien Chun Yan, / Hui, S. | 2001
1072
The effect of variations in nickel/gold surface finish on the assembly quality and attachment reliability of a plastic ball grid array
Coyle, R.J. / Wenger, G.M. / Hodges, D.E. / Mawer, A. / Cullen, D.P. / Solan, P.P. | 2001
1081
An experimental study of failure and fatigue life of a stacked CSP subjected to cyclic bending
Wu, J.D. / Ho, S.H. / Zheng, P.J. / Liao, C.C. / Hung, S.C. | 2001
1087
Comparison of multilayer organic and ceramic package simultaneous switching noise measurements using a 0.16 /spl mu/m CMOS test chip
Budell, T. / Audet, J. / Kent, D. / Libous, J. / O'Connor, D. / Rosser, S. / Tremble, E. | 2001
1087
Comparison of Multilayer Organic and Ceramic Package Simultaneous Switching Noise Measurements using a 0.16-mum CMOS Test Chip
Budell, T. / Audet, J. / Kent, D. / Libous, J. / O Connor, D. / Rosser, S. / Tremble, E. / Institute of Electrical and Electronics Engineers | 2001
1095
Modeling and simulation of core switching noise on a package and board
Na, N. / Swaminathan, M. / Libous, J. / O'Connor, D. | 2001
1102
A simulation study of simultaneous switching noise
Chen, C.-T. / Zhao, J. / Chen, Q. | 2001
1107
Integrated modeling methodology for core and I/O power delivery
Radhakrishnan, K. / Li, Y.-L. / Pinello, W.P. | 2001
1111
A quasi three-dimensional distributed electromagnetic model for complex power distribution networks
Choi, M.J. / Cangellaris, A.C. | 2001
1117
The impact of split power planes on package performance
Miller, J.R. | 2001
1122
A comparison of large I/O flip chip and wire bonded packages
Bulumulla, S.B. / Caggiano, M.F. / Lischner, D.J. / Wolf, R.K. | 2001
1127
High density packaging for mobile terminals
Pienimaa, S.K. / Martin, N.I. | 2001
1127
High Density Packaging for Mobile Tenninals
Pienimaa, S. K. / Martin, N. I. / Institute of Electrical and Electronics Engineers | 2001
1135
Flip chip with lead-free solders on halogen-free microvia substrates
Baynham, G. / Baldwin, D.F. / Boustedt, K. / Wennerholm, C. | 2001
1140
Low cost flip chip package design concepts for high density I/O
Tee-Onn Chong, / Seng-Hooi Ong, / Teong-Guan Yew, / Chee-Yee Chung, / Sankman, R. | 2001
1144
Improvement of the reliability of the C4 for ultrahigh thermal conduction module with the direct solder-attached cooling system (DiSAC)
Yamada, O. / Sawada, Y. / Harada, M. / Yokozuka, T. / Yasukawa, A. / Moriya, H. / Saito, N. / Kasai, K. / Uda, T. / Netsu, T. et al. | 2001
1149
Dual operational amplifier using flip-chip fine package of 1.0/spl times/1.0/spl times/0.6-mm with 8-pin counts
Kurata, H. / Mitsuka, K. / Matsushita, H. | 2001
1149
Dual Operational Amplifier Using Flip-Chip Fine Package of 1.0x1.0x0.6mm with 8-Pin Counts
Kurata, H. / Mitsuka, K. / Matsushita, H. / Institute of Electrical and Electronics Engineers | 2001
1154
Reliability study for CTE mismatching in build-up structure
Nawa, K. | 2001
1159
Reliability assessment of microvias in HDI printed circuit boards
Fuhan Liu, / Jicun Lu, / Sundaram, V. / Sutter, D. / White, G. / Baldwin, D. / Tummala, R.R. | 2001
1164
Global/local modeling for PWB mechanical loading
Jiansen Zhu, / Quander, S. / Reinikainen, T. | 2001
1170
Effect of thermal cycling ramp rate on CSP assembly reliability
Ghaffarian, R. | 2001
1175
Effects of probe damage on wire bond integrity
Hotchkiss, G. / Ryan, G. / Subido, W. / Broz, J. / Mitchell, S. / Rincon, R. / Rolda, R. / Guimbaolibot, L. | 2001
1181
Novel thermal validation metrology based on non-uniform power distribution for Pentium(R) III Xeon/sup TM/ cartridge processor design with integrated level two cache
Teck Joo Goh, / Amir, A.N. / Chia-Pin Chiu, / Torresola, J. | 2001
1181
Novel Thermal Validation Metrology Based on Non-Uniform Power Distribution for Pentium® III Xeon™ Cartridge Processor Design with Integrated Level Two Cache
Goh, T. J. / Amir, A. N. / Chiu, C.-P. / Torresola, J. / Institute of Electrical and Electronics Engineers | 2001
1187
Evaluation of Cu capping alternatives for polyimide-Cu MCM-D
Perfecto, E. / Kang-Wook Lee, / Hamel, H. / Wassick, T. / Cline, C. / Oonk, M. / Feger, C. / McHerron, D. | 2001
1193
Selection and evaluation of materials for future system-on-package (SOP) substrate
Markondeya Raj, P. / Shinotani, K. / Mancheol Seo, / Bhattacharya, S. / Sundaram, V. / Zama, S. / Jicun Lu, / Zweben, C. / White, G.E. / Tummala, R.R. | 2001
1198
Processing and properties of new soluble polyimides
Ezzell, S.A. / Bai, F. / Chien, B. / Givot, B.L. / Ayukawa, H. / Kobayashi, M. / Aoki, S. | 2001
1201
Processing of polymer-ceramic nanocomposites for system-on-package applications
Windlass, H. / Markondeya Raj, P. / Balaraman, D. / Bhattacharya, S.K. / Tummala, R.R. | 2001
1207
Effects of microvia build-up layers on the solder joint reliability of a wafer level chip scale package (WLCSP)
Lau, J.H. / Lee, S.-W.R. | 2001
1216
Effects of O~2/C~2F~6 Plasma Descum with RF Cleaning on Via Formation in MCM-D Substrate Using Photosensitive BCB
Ju, C.-W. / Park, S.-S. / Kim, S.-J. / Pack, K.-H. / Lee, H.-T. / Song, M.-K. / Institute of Electrical and Electronics Engineers | 2001
1216
Effects of O/sub 2//C/sub 2/F/sub 6/ plasma descum with RF cleaning on via formation in MCM-D substrate using photosensitive BCB
Chul-Won Ju, / Seong-Su Park, / Seong-Jin Kim, / Kyu-Ha Pack, / Hee-Tae Lee, / Min-Kyu Song, | 2001
1219
Solder joint attachment reliability and assembly quality of a molded ball grid array socket
Coyle, R.J. / Holliday, A. / Solan, P.P. / Yao, C. / Cyker, H.A. / Manock, J.C. / Bond, R. / Stenerson, R.E. / Furrow, R.G. / Occhipinti, M.V. et al. | 2001
1227
A new coiled microspring contact technology
Marcus, R.B. | 2001
1233
BGA backplane connector for high speed differential signals
Olson, S.W. | 2001
1239
AMP Z-pack 2 mm HM connectors with quiet mate contacts for resolution of nanosecond discontinuity in hot-swap applications
Demirci, H.H. / Laub, M. / Fry, C. | 2001
1245
Electrical modeling of high speed interconnection links
De Geest, J. / Sercu, S. / Nadolny, J. | 2001
1250
High frequency measurement of isotropically conductive adhesives
Liong, S. / Zhuqing Zhang, / Wong, C.P. | 2001
1255
SensEdu-an Internet course for teaching sensorics
Harsanyi, G. / Lepsenyi, I. / Gordon, P. / Bojta, P. / Ballun, G. / Illyefalvi-Vitez, Z. | 2001
1261
Progress on Internet-based educational material development for electronic products and systems cost analysis
Sandborn, P. / Murphy, C.F. | 2001
1267
Progress on developing electronic packaging educational modules
Kim, B.C. / Severance, C. | 2001
1270
Development of an Internet course on electrically conductive adhesives with experiments
Johan Liu, / Xitao Wang, / Morris, J.E. | 2001
1276
Undergraduate microsystems packaging education: needs, status and challenges
Tummala, R. / Conrad, L. | 2001
1282
Electronic packaging and interconnection techniques, education at university level-a Romanian experience
Svasta, P. / Codreanu, N.-D. / Ionescu, C. / Golumbeanu, V. | 2001
1290
A study of underlayer geometry effects on interconnect line characteristics through S-parameter measurements
Jae-Kyung Wee, / Young-Hee Kim, / Yong-Ju Kim, / Pil-Soo Lee, / Yong-Je Jeon, / Jo-Han Kim, / Han-Sub Yoon, / Jin-Yong Chung, | 2001
1295
Plasma treatment process for fluxless reflow soldering
Wolter, K.J. / Zerna, T. / Deltschew, R. / Neumann, H. | 2001
1299
Fracture behaviour of flip chip solder joints
Wiese, S. / Jakschik, S. / Feustel, F. / Meusel, E. | 2001
1299
Fracture Behavior of Flip-Chip Solder Joints
Wiese, S. / Jakschik, S. / Feustel, F. / Meusel, E. / Institute of Electrical and Electronics Engineers | 2001
1307
Nondestructive detection of intermetallics in solder joints by high energy X-ray diffraction
Siewert, T.A. / Balzar, D. / McCowan, C.N. | 2001
1312
Database on lead-free solders
Siewert, T.A. / Smith, D.R. / Liu, S. / Madeni, J.C. | 2001
1315
Gases evolved during cure and solder reflow of encapsulants and underfills
Cheung, A.T. / Yijin Xu, | 2001
1321
Optimization of inspection strategies by use of quality cost models
Oppermann, M. / Sauer, W. / Wohlrabe, H. / Zerna, T. | 2001
1326
Studies on Ni-Sn intermetallic compound and P-rich Ni layer at the electroless nickel UBM-solder interface and their effects on flip chip solder joint reliability
Young-Doo Jeon, / Kyung-Wook Paik, / Kyoung-Soon Bok, / Woo-Suk Choi, / Chul-Lae Cho, | 2001
1326
Studies on Ni-Sn Intermetallic Compound and P-Rich Ni Layer at the Electroless Ni UBM - Solder Interface and Their Effects on Flip Chip Solder Joint Reliability
Jeon, Y.-D. / Paik, K.-W. / Bok, K.-S. / Choi, W.-S. / Cho, C.-L. / Institute of Electrical and Electronics Engineers | 2001
1333
Experimental investigation of time dependent degradation of coupling agent bonded interfaces
Leung, S.Y.Y. / Lam, D.C.C. / Wong, C.P. | 2001
1338
Wetting Characteristics of Lead-Free Solder Pastes and Pb-Free PWB Finishes
Sattiraju, S. V. / Dang, B. / Johnson, R. W. / Li, Y. / Smith, J. S. / Bozack, M. J. / Institute of Electrical and Electronics Engineers | 2001
1338
Wetting characteristics of Pb-free solder pastes and Pb-free PWB finishes
Sattiraju, S.V. / Dang, B. / Johnson, R.W. / Li, Y. / Smith, J.S. / Bozack, M.J. | 2001
1345
Excellent reliability of solder ball made of a compliant plastic core
Okinaga, N. / Kuroda, H. / Nagai, Y. | 2001
1350
Surface property of passivation and solder mask for flip chip packaging
Shijian Luo, / Wong, C.P. | 2001
1356
Study of a controlled thermally degradable epoxy resin system for electronic packaging
Haiying Li, / Lejun Wang, / Wong, C.P. | 2001
1362
A new test method for embedded passives in high density package substrates
Kim, B.C. / Hyek-Hwan Choi, | 2001
1367
Thermal characterization of plastic ball grid array packages via infrared thermography
Sweatlock, L. / Lischner, D. / Weiss, J. | 2001
1372
Precision motion control system for ultra-precision semiconductor and electronic components manufacturing
Tan, K.K. / Dou, H.F. / Tang, K.Z. | 2001
1380
Electrical performance of compliant wafer level package
Patel, C.S. / Martin, K. / Meindl, J.D. | 2001
1384
Development of electroless Ni/Au plated build-up flip chip package with highly reliable solder joints
Yokomine, K. / Shimizu, N. / Miyamoto, Y. / Iwata, Y. / Love, D. / Newman, K. | 2001
1393
High reliable and environmental friendly molding compound for CABGA(R) packages
Byung-Seon Kong, / Hyo-Chang Yun, / Jong-Chan Lim, / Yeon-Su Jung, / Dong-Young Kim, / Kwan-Seek Chung, | 2001
1393
High Reliable and Environmental Friendly Molding Compound for CABGA® Packages
Kong, B.-S. / Yun, H.-C. / Lim, J.-C. / Jung, Y.-S. / Kim, D.-Y. / Chung, K.-S. / Institute of Electrical and Electronics Engineers | 2001
1398
Characterization of wafer level package for mobile phone application
Ji-Yon Kim, / Kang, I.S. / Park, M.G. / Kim, J.H. / Cho, S.J. / Park, L.S. / Chun, H.S. | 2001
1402
Optimum signal integrity through appropriate analysis of signal return path and power delivery
Chee-Yee Chung, / Waizman, A. | 2001
1408
High K polymer-ceramic nano-composite development, characterization, and modeling for embedded capacitor RF application
Yang Rao, / Jireh Yue, / Wong, C.P. | 2001
1413
Precision foil resistors used as electro-pyrotechnic initiators
Troianello, T. | 2001
1413
Precision Foil Resistors Used As Low Energy Electro-Pyrotechnic Initiators
Troianello, T. / Institute of Electrical and Electronics Engineers | 2001
1418
Relationships between suspension formulations and the properties of BaTiO/sub 3//epoxy composite films for integral capacitors
Sung-Dong Cho, / Kyung-Wook Paik, | 2001
1418
Relationships between Suspension Formulations and the Properties of BaTiO~3/Epoxy Composite Films for Integral Capacitors
Cho, S.-D. / Paik, K.-W. / Institute of Electrical and Electronics Engineers | 2001
1423
Zero TCR foil resistor ten fold improvement in temperature coefficient
Goldstein, R. / Szwarc, J. | 2001
1427
Surface Mountable Package (OptoBGA™) for 10G Data Link
Kishida, Y. / Niwa, Y. / Kuba, Y. / Komeda, R. / Setoguchi, K. / Matsubara, T. / Yanagisawa, M. / Tanahashi, S. / Institute of Electrical and Electronics Engineers | 2001
1427
Surface mountable package (OptoBGA/sup TM/) for 10 G data link
Kishida, Y. / Niwa, Y. / Kuba, Y. / Komeda, K. / Setoguchi, K. / Matsubara, T. / Yanagisawa, M. / Tanahashi, S. | 2001
1431
The coupling-loss characterization of an add/drop filter module in DWDM applications
Hsieh, C.S. / Wang, C.Y. / Song, C.F. / Cheng, W.H. | 2001
1434
Optical fiber strain in epoxy-cured fiber optic connectors
Broadwater, K. / Mead, P.F. | 2001
1441
Method of fixing an optical fibre in a laser package
Shaw, M. / Galeotti, R. / Coppo, G. | 2001
1447
Fibre geometry and pigtailing
Law, S.H. / Phan, T.N. / Poladian, L. | 2001
1451
Improving signal integrity in circuit boards by incorporating absorbing materials
Weimin Shi, / Adsure, V. / Yuzhe Chen, / Kroger, H. | 2001
1457
The package bandwidth limitation of high speed broadband products
Yenting Wen, | 2001
1463
Pico-second signal transient characterization technique of meanders through s-parameter measurement in high-speed PWB interconnects
Yong-Ju Kim, / Jo-Han Kim, / Hyo-Seog Ryu, / Young-Suk Suh, / Jae-Kyung Wee, / Heung-Sup Chun, / Joong-Sik Ki, | 2001
1468
A study on the effectiveness of dummy pattern design existence in multi-layer PBGA application
Kim, S.J. / Sohn, E.S. / Wang, G.H. / Son, S.J. / Chung, K.S. / Lee, C.H. | 2001
1474
Study of non-anhydride curing system for no-flow underfill applications
Zhuqing Zhang, / Lianhua Fan, / Wong, C.P. | 2001
1479
Virtual Thermo-Mechanical Prototyping of Electronic Packaging - Challenges in Material Characterization and Modeling
Zhang, G. Q. / Tay, A. A. O. / Ernst, L. J. / Liu, S. / Qian, Z. F. / Bressers, H. J. L. / Janssen, J. / Institute of Electrical and Electronics Engineers | 2001

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