Special issue editorial: Exploitation of hardware accelerators (English)
- New search for: Doallo, R.
- New search for: Amor, M.
- New search for: Fraguela, B. B.
- New search for: Doallo, R.
- New search for: Amor, M.
- New search for: Fraguela, B. B.
In:
MICROPROCESSORS AND MICROSYSTEMS
;
36
, 2
;
63-64
;
2012
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ISSN:
- Article (Journal) / Print
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Title:Special issue editorial: Exploitation of hardware accelerators
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Contributors:
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Published in:MICROPROCESSORS AND MICROSYSTEMS ; 36, 2 ; 63-64
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Publisher:
- New search for: Elsevier Science B.V., Amsterdam.
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Publication date:2012-01-01
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Size:2 pages
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ISSN:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
- New search for: 004.3 / 004.22
- Further information on Dewey Decimal Classification
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Classification:
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Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents – Volume 36, Issue 2
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 63
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Special issue editorial: Exploitation of hardware acceleratorsDoallo, Ramón / Amor, Margarita / Fraguela, Basilio B. et al. | 2012
- 65
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Optimization of sparse matrix–vector multiplication using reordering techniques on GPUsPichel, Juan C. / Rivera, Francisco F. / Fernández, Marcos / Rodríguez, Aurelio et al. | 2011
- 78
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Optimization strategies in different CUDA architectures using llCoMPReyes, Ruymán / de Sande, Francisco et al. | 2011
- 88
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High-performance Monte Carlo radiosity on GPU based on scene partitioningSanjurjo, José R. / Amor, Margarita / Bóo, Montserrat / Doallo, Ramón et al. | 2011
- 96
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Hardware accelerator architecture for simultaneous short-read DNA sequences alignment with enhanced traceback phaseSebastião, Nuno / Roma, Nuno / Flores, Paulo et al. | 2011
- 110
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IMORC: An infrastructure and architecture template for implementing high-performance reconfigurable FPGA acceleratorsSchumacher, Tobias / Plessl, Christian / Platzner, Marco et al. | 2011
- 127
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Energy optimization of Application-Specific Instruction-Set Processors by using hardware accelerators in semicustom ICs technologyMeyer-Baese, Uwe / Botella, Guillermo / Mookherjee, Soumak / Castillo, Encarnación / García, Antonio et al. | 2011
- 138
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A scalable pipelined architecture for real-time computation of MLP-BP neural networksSavich, Antony / Moussa, Medhat / Areibi, Shawki et al. | 2011
- IFC
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Editorial Board / Aims and Scope| 2012
- ii
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Copyright page| 2012
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Editorial Board| 2012