Introduction to the Special Issue on the 2018 International Solid-State Circuits Conference (ISSCC) (English)
- New search for: Frans, Yohan
- New search for: Frans, Yohan
In:
IEEE journal of solid-state circuits
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54
, 1
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3-5
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2019
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ISSN:
- Article (Journal) / Print
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Title:Introduction to the Special Issue on the 2018 International Solid-State Circuits Conference (ISSCC)
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Contributors:Frans, Yohan ( author )
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Published in:IEEE journal of solid-state circuits ; 54, 1 ; 3-5
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Publisher:
- New search for: IEEE
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Publication date:2019-01-01
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Size:3 pages
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ISSN:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
- New search for: 621.3815
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Classification:
DDC: 621.3815 -
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© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents – Volume 54, Issue 1
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
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Table of contents| 2019
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Introduction to the Special Issue on the 2018 International Solid-State Circuits Conference (ISSCC)Frans, Yohan / Dehaene, Wim / Motomura, Masato / Bae, Seung-Jun et al. | 2019
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A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOSDepaoli, Emanuele / Zhang, Hongyang / Mazzini, Marco / Audoglio, Walter / Rossi, Augusto Andrea / Albasini, Guido / Pozzoni, Massimo / Erba, Simone / Temporiti, Enrico / Mazzanti, Andrea et al. | 2019
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A Fully Adaptive 19–58-Gb/s PAM-4 and 9.5–29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFETUpadhyaya, Parag / Poon, Chi Fung / Lim, Siok Wei / Cho, Junho / Roldan, Arianne / Zhang, Wenfeng / Namkoong, Jin / Pham, Toan / Xu, Bruce / Lin, Winson et al. | 2019
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A 112 Gb/s PAM-4 56 Gb/s NRZ Reconfigurable Transmitter With Three-Tap FFE in 10-nm FinFETKim, Jihwan / Balankutty, Ajay / Dokania, Rajeev K. / Elshazly, Amr / Kim, Hyung Seok / Kundu, Sandipan / Shi, Dan / Weaver, Skyler / Yu, Kai / O'Mahony, Frank et al. | 2019
- 43
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A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage RegulatorPoulton, John W. / Wilson, John M. / Turner, Walker J. / Zimmer, Brian / Chen, Xi / Kudva, Sudhir S. / Song, Sanquan / Tell, Stephen G. / Nedovic, Nikola / Zhao, Wenxu et al. | 2019
- 55
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An Electronic Dispersion Compensation Transceiver for 10- and 28-Gb/s Directly Modulated Lasers-Based Optical LinksKwon, Kyeongha / Yoon, Jong-Hyeok / Jeon, Younho / Choi, Hanho / Jeon, Sejun / Bae, Hyeon-Min et al. | 2019
- 65
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Design of Crystal-Oscillator Frequency Quadrupler for Low-Jitter Clock MultipliersMegawer, Karim M. / Elkholy, Ahmed / Gamal Ahmed, Mostafa / Elmallah, Ahmed / Kumar Hanumolu, Pavan et al. | 2019
- 75
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A 55-nm, 1.0–0.4V, 1.25-pJ/MAC Time-Domain Mixed-Signal Neuromorphic Accelerator With Stochastic Synapses for Reinforcement Learning in Autonomous Mobile RobotsAmaravati, Anvesha / Nasir, Saad Bin / Ting, Justin / Yoon, Insik / Raychowdhury, Arijit et al. | 2019
- 88
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A 0.0056-mm2 −249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOsYang, Shiheng / Yin, Jun / Mak, Pui-In / Martins, Rui P. et al. | 2019
- 99
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A 0.0043-mm2 0.3–1.2-V Frequency-Scalable Synthesized Fractional-N Digital PLL With a Speculative Dual-Referenced Interpolating TDCLee, Minseob / Kim, Shinwoong / Park, Hong-June / Sim, Jae-Yoon et al. | 2019
- 109
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A Fully Integrated Digital LDO With Built-In Adaptive Sampling and Active Voltage Positioning Using a Beat-Frequency QuantizerKundu, Somnath / Liu, Muqing / Wen, Shi-Jie / Wong, Richard / Kim, Chris H. et al. | 2019
- 121
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IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe SystemsBerry, Christopher / Wolpert, David / Vezrytzis, Christos / Rizzolo, Richard / Carey, Sean / Maroz, Yaniv / Shi, Hunter / Chidambarrao, Dureseti / Jacobi, Christian / Saporito, Anthony et al. | 2019
- 133
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“Zeppelin”: An SoC for Multichip ArchitecturesBurd, Thomas / Beck, Noah / White, Sean / Paraschou, Milam / Kalyanasundharam, Nathan / Donley, Gregg / Smith, Alan / Hewitt, Larry / Naffziger, Samuel et al. | 2019
- 144
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An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V}_{\text{MIN}}$ OptimizationMeinerzhagen, Pascal A. / Tokunaga, Carlos / Malavasi, Andres / Vaidya, Vaibhav / Mendon, Ashwin / Mathaikutty, D. / Kulkarni, Jaydeep / Augustine, Charles / Cho, Minki / Kim, Stephen T. et al. | 2019
- 158
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An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOSBankman, Daniel / Yang, Lita / Moons, Bert / Verhelst, Marian / Murmann, Boris et al. | 2019
- 173
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UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit PrecisionLee, Jinmook / Kim, Changhyeon / Kang, Sanghoon / Shin, Dongjoo / Kim, Sangyeob / Yoo, Hoi-Jun et al. | 2019
- 186
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QUEST: Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96-MB 3-D SRAM Using Inductive Coupling Technology in 40-nm CMOSUeyoshi, Kodai / Ando, Kota / Hirose, Kazutoshi / Takamaeda-Yamazaki, Shinya / Hamada, Mototsugu / Kuroda, Tadahiro / Motomura, Masato et al. | 2019
- 197
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A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less ClockingKim, Young-Ju / Kwon, Hye-Jung / Doo, Su-Yeon / Ahn, Minsu / Kim, Yong-Hun / Lee, Yong-Jae / Kang, Dong-Seok / Do, Sung-Geun / Lee, Chang-Yong / Cho, Gun-Hee et al. | 2019
- 210
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A 23.6-Mb/mm $^{2}$ SRAM in 10-nm FinFET Technology With Pulsed-pMOS TVC and Stepped-WL for Low-Voltage ApplicationsGuo, Zheng / Kim, Daeyeon / Nalam, Satyanand / Wiedemer, Jami / Wang, Xiaofei / Karl, Eric et al. | 2019
- 217
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CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural NetworksBiswas, Avishek / Chandrakasan, Anantha P. et al. | 2019
- 231
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A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-TerminationDong, Qing / Wang, Zhehong / Lim, Jongyup / Zhang, Yiqun / Sinangil, Mahmut E. / Shih, Yi-Chun / Chih, Yu-Der / Chang, Jonathan / Blaauw, David / Sylvester, Dennis et al. | 2019
- 240
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A Supply Pushing Reduction Technique for LC Oscillators Based on Ripple Replication and CancellationChen, Yue / Liu, Yao-Hong / Zong, Zhirui / Dijkhuis, Johan / Dolmans, Guido / Staszewski, Robert Bogdan / Babaie, Masoud et al. | 2019
- 253
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A Self-Oscillating Boosting Amplifier With Adaptive Soft Switching Control for Piezoelectric TransducersAmir, Saifullah / van der Zee, Ronan / Nauta, Bram et al. | 2019
- 266
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Capacitorless Self-Clocked All-Digital Low-Dropout RegulatorAkram, Muhammad Abrar / Hong, Wook / Hwang, In-Chul et al. | 2019
- 277
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Analysis and Design of Low-Power Continuous-Time Delta-Sigma Modulator Using Negative-R Assisted IntegratorJang, MoonHyung / Lee, Changuk / Chae, Youngcheol et al. | 2019
- 288
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A 65-nm CMOS 6-bit 2.5-GS/s 7.5-mW 8 $\times$ Time-Domain Interpolating Flash ADC With Sequential Slope-Matching Offset CalibrationOh, Dong-Ryeol / Kim, Jong-In / Jo, Dong-Shin / Kim, Woo-Chul / Chang, Dong-Jin / Ryu, Seung-Tak et al. | 2019
- 298
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An ULV PWM CMOS Imager With Adaptive-Multiple-Sampling Linear Response, HDR Imaging, and Energy HarvestingChiou, Albert Yen-Chih / Hsieh, Chih-Cheng et al. | 2019
- 307
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A 232–1996-kS/s Robust Compressive Sensing Reconstruction Engine for Real-Time Physiological Signals MonitoringChen, Ting-Sheng / Kuo, Hung-Chi / Wu, An-Yeu et al. | 2019
- 318
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RFIC: 2019 IEEE Radio Frequency Integrated Circuits Symposium| 2019
- 319
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Introducing IEEE Collabratec| 2019
- 320
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IEEE Open Access Publishing| 2019
- C2
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IEEE JOURNAL OF SOLID-STATE CIRCUITS| 2019
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Information For Authors| 2019