EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering (English)

In: Graphics Hardware   ;  131-137  ;  1997

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EM-Cube is a VLSI architecture for low-cost, high quality volume rendering at full video frame rates. Derived from the Cube4 architecture developed at SUNY at Stony Brook, EM-Cube computes sample points and gradients on-the-fly to project 3-dimensional volume data onto 2-dimensional images with realistic lighting and shading. A modest rendering system based on EM-Cube consists of a PC1 card with four rendering chips (ASICs), four 64Mbit SDRAMs to hold the volume data, and four SRAMs to capture the rendered image. The performance target for this configuration is to render images from a 2563 x 16 bit data set at 30 frames/sec. The EM-Cube architecture can be scaled to larger volume data-sets and/or higher frame rates by adding additional ASKS, SDRAMs, and SRAMs. This paper addresses three major challenges encountered developing EM-Cube into a practical product: exploiting the bandwidth inherent in the SDRAMs containing the volume data, keeping the pin-count between adjacent ASICs at a tractable level, and reducing the on-chip storage required to hold the intermediate results of rendering.

  • Title:
    EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering
  • Author / Creator:
  • Published in:
  • Publisher:
    The Eurographics Association
  • Place of publication:
    Postfach 8043, 38621 Goslar, Germany
  • Year of publication:
    1997
  • Size:
    7 pages
  • ISBN:
  • ISSN:
  • DOI:
  • Type of media:
    Conference paper
  • Type of material:
    Electronic Resource
  • Language:
    English
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Table of contents conference proceedings

The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.

7
Towards Real-Time Photorealistic Rendering: Challenges and Solutions
Schilling, Andreas | 1997
11
Unsolved Problems and Opportunities for High-quality, High-performance 3D Graphics on a PC Platform
Kirk, David B. | 1998
15
Quadratic Bezier Triangles As Drawing Primitives
Bruijns, J. | 1998
17
Characterization of Static 3D Graphics Workloads
Chiueh, Tzi-cker / Lin, Wei-jen | 1997
25
Architectural Implications of Hardware-Accelerated Bucket Rendering on the PC
Cox, Michael / Bhandari, Narendra | 1997
25
An Improved Z-Buffer CSG Rendering Algorithm
Stewart, Nigel / Leach, Geoff / John, Sabu | 1998
31
A Breadth-First Approach To Efficient Mesh Traversal
Mitra, Tulika / Chiueh, Tzi-cker | 1998
35
Memory Access Patterns of Occlusion-Compatible 3D Image Warping
Murk, William R. / Bishop, Gary | 1997
39
View-independent Environment Maps
Heidrich, Wolfgang / Seidel, Hans-Peter | 1998
45
Realizing OpenGL: Two Implementations of One Architecture
Kilgard, Mark J. | 1997
47
Gouraud Bump Mapping
Ernst, I. / Rüsseler, H. / Schulz, H. / Wittig, 0. | 1998
55
Texture Tile Visibility Determination For Dynamic Texture Loading
Goss, Michael E. / Yuasa, Kei | 1998
57
PixelFlow: The Realization
Eyles, John / Molnar, Steven / Poulton, John / Greer, Trey / Lastra, Anselmo / England, Nick / Westover, Lee | 1997
69
Heresy: A Virtual Image-Space 3D Rasterization Architecture
Chiueh, Tzi-cker | 1997
69
High-Quality Volume Rendering Using Texture Mapping Hardware
Dachille, Frank / Kreeger, Kevin / Chen, Baoquan / Bitter, Ingmar / Kaufman, Arie | 1998
77
PAVLOV: A Programmable Architecture for Volume Processing
Kreeger, Kevin / Kaufman, Arie | 1998
79
High Quality Rendering Using the Talisman Architecture
Barkans, Anthony C. | 1997
87
Performance Issues of a Distributed Frame Buffer on a Multicomputer
Wei, Bin / Clark, Douglas W. / Felten, Edward W. / Li, Kai | 1998
89
Triangle Scan Conversion using 2D Homogeneous Coordinates
Olano, Marc / Greer, Trey | 1997
97
Extending Graphics Hardware For Occlusion Queries In OpenGL
Bartz, Dirk / Meißner, Michael / Hüttner, Tobias | 1998
97
Accommodating Memory Latency In A Low-cost Rasterizer
Anderson, Bruce / MacAulay, Rob / Stewart, Andy / Whitted, Turner | 1997
103
Codesign Of Graphics Hardware Accelerators
Ewins, Jon P. / L.Watten, Phil / White, Martin / McNeill, Michael D. J. / Lister, Paul F. | 1997
105
Simple Models of the Impact of Overlap in Bucket Rendering
Chen, Milton / Stall, Gordon / Igehy, Homan / Proudfoot, Kekoa / Hanrahan, Pat | 1998
111
Design Of A High Performance Volume Visualization System
Lichtenbelt, Barthold | 1997
113
IMEM: An Intelligent Memory for Bump- and Reflection-Mapping
Kugler, Anders | 1998
121
A Ray-Slice-Sweep Volume Rendering Engine
Bitter, Ingmar / Kaufman, Arie | 1997
123
Neon: A Single-Chip 3D Workstation Graphics Accelerator
McCormack, Joel / McNamara, Robert / Gianos, Christopher / Seiler, Larry / Jouppi, Norman P. / Correll, Ken | 1998
131
EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering
Osborne, Rändy / Pfister, Hanspeter / Lauer, Hugh / McKenzie, Neil / Gibson, Sarah / Hiatt, Wally / Ohkarni, TakaHide | 1997
133
Prefetching in a Texture Cache Architecture
lgehy, Homan / Eldridge, Matthew / Proudfoot, Kekoa | 1998
139
WARD - Visualization Accelerator for Realtime Display
Knittel, Günter / Straßer, Wolfgang | 1997
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