Modeling of hot carrier degradation using a spherical harmonics expansion of the bipolar Boltzmann transport equation (English)
- New search for: Bina, M.
- New search for: Rupp, K.
- New search for: Tyaginov, S.
- New search for: Triebl, O.
- New search for: Grasser, T.
- New search for: Bina, M.
- New search for: Rupp, K.
- New search for: Tyaginov, S.
- New search for: Triebl, O.
- New search for: Grasser, T.
In:
2012 International Electron Devices Meeting
;
30.5.1-30.5.4
;
2012
- Conference paper / Electronic Resource
-
Title:Modeling of hot carrier degradation using a spherical harmonics expansion of the bipolar Boltzmann transport equation
-
Contributors:Bina, M. ( author ) / Rupp, K. ( author ) / Tyaginov, S. ( author ) / Triebl, O. ( author ) / Grasser, T. ( author )
-
Published in:2012 International Electron Devices Meeting ; 30.5.1-30.5.4
-
Publisher:
- New search for: IEEE
-
Publication date:2012-12-01
-
Size:409075 byte
-
ISBN:
-
ISSN:
-
DOI:
-
Type of media:Conference paper
-
Type of material:Electronic Resource
-
Language:English
-
Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
-
Conference highlights| 2012
- 1
-
2012 IEEE/EDS Fellows| 2012
- 1
-
Welcome from the general chair| 2012
- 1
-
IEDM luncheon [awards and presentation]| 2012
- 1
-
Award presentations| 2012
- 1
-
IEDM executive committee| 2012
- 1
-
[Copyright notice]| 2012
- 1.1.1
-
Bio-integrated electronicsRogers, J. A. et al. | 2012
- 1.2.1
-
State of the art technologies and future prospective in display industryMoon, Joo-Tae et al. | 2012
- 1.3.1
-
Ultimate device technologies, core of a sustainable societyVan den hove, Luc et al. | 2012
- 2.1.1
-
Scaling directions for 2D and 3D NAND cellsGoda, Akira / Parat, Krishna et al. | 2012
- 2.2.1
-
Ultra thin hybrid floating gate and high-k dielectric as IGD enabler of highly scaled planar NAND flash technologyKar, G. S. / Breuil, L. / Blomme, P. / Hody, H. / Locorotondo, S. / Jossart, N. / Richard, O. / Bender, H. / Van den Bosch, G. / Debusschere, I. et al. | 2012
- 2.3.1
-
A highly scalable 8-layer Vertical Gate 3D NAND with split-page bit line layout and efficient binary-sum MiLC (Minimal Incremental Layer Cost) staircase contactsChen, Shih-Hung / Lue, Hang-Ting / Shih, Yen-Hao / Chen, Chieh-Fang / Hsu, Tzu-Hsuan / Chen, Yan-Ru / Hsiao, Yi-Hsuan / Huang, Shih-Cheng / Chang, Kuo-Pin / Hsieh, Chih-Chang et al. | 2012
- 2.4.1
-
Origin of transient Vth shift after erase and its impact on 2D/3D structure charge trap flash memory cell operationsPark, Jong Kyung / Moon, Dong-Il / Choi, Yang-Kyu / Lee, Seok-Hee / Lee, Ki-Hong / Pyi, Seung Ho / Cho, Byung Jin et al. | 2012
- 2.5.1
-
A new erase saturation issue in cylindrical junction-less charge-trap memory arraysMaconi, A. / Compagnoni, C. Monzio / Spinelli, A. S. / Lacaita, A. L. et al. | 2012
- 2.6.1
-
Highly-scalable threshold switching select device based on chaclogenide glasses for 3D nanoscaled memory arraysLee, Myoung-Jae / Lee, Dongsoo / Kim, Hojung / Choi, Hyun-Sik / Park, Jong-Bong / Kim, Hee Goo / Cha, Young-Kwan / Chung, U-In / Yoo, In-Kyeong / Kim, Kinam et al. | 2012
- 2.7.1
-
Sub-30nm scaling and high-speed operation of fully-confined Access-Devices for 3D crosspoint memory based on mixed-ionic-electronic-conduction (MIEC) materialsVirwani, K. / Burr, G. W. / Shenoy, R. S. / Rettner, C. T. / Padilla, A. / Topuria, T. / Rice, P. M. / Ho, G. / King, R. S. / Nguyen, K. et al. | 2012
- 2.8.1
-
Threshold Vacuum Switch (TVS) on 3D-stackable and 4F2 cross-point bipolar and unipolar resistive random access memoryHo, ChiaHua / Huang, Hsin-Hau / Lee, Ming-Taou / Hsu, Cho-Lun / Lai, Tung-Yen / Chiu, Wen-Cheng / Lee, MeiYi / Chou, Tong-Huan / Yang, Ivy / Chen, Min-Cheng et al. | 2012
- 3.1.1
-
A 22nm SoC platform technology featuring 3-D tri-gate and high-k/metal gate, optimized for ultra low power, high performance and high density SoC applicationsJan, C.-H. / Bhattacharya, U. / Brain, R. / Choi, S.-J. / Curello, G. / Gupta, G. / Hafez, W. / Jang, M. / Kang, M. / Komeyli, K. et al. | 2012
- 3.2.1
-
Switching energy efficiency optimization for advanced CPU thanks to UTBB technologyArnaud, F. / Planes, N. / Weber, O. / Barral, V. / Haendler, S. / Flatresse, P. / Nyer, F. et al. | 2012
- 3.3.1
-
22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOLNarasimha, S. / Chang, P. / Ortolland, C. / Fried, D. / Engbrecht, E. / Nummy, K. / Parries, P. / Ando, T. / Aquilino, M. / Arnold, N. et al. | 2012
- 3.4.1
-
Ultra low power design and future device interactionsAmerasekera, Ajith / Bittlestone, Clive et al. | 2012
- 3.5.1
-
Comprehensive extensibility of 20nm low power/high performance technology platform featuring scalable high-k/metal gate planar transistors with reduced design cornerFukutome, H. / Cheon, K. Y. / Kim, J. P. / Kim, J. C. / Lee, J. G. / Cha, S. Y. / Roh, U. J. / Kwon, S. D. / Sohn, D. K. / Maeda, S. et al. | 2012
- 3.6.1
-
UTBB FDSOI transistors with dual STI for a multi-Vt strategy at 20nm node and belowGrenouillet, L. / Vinet, M. / Gimbert, J. / Giraud, B. / Noel, J. P. / Liu, Q. / Khare, P. / Jaud, M. A. / Le Tiec, Y. / Wacquez, R. et al. | 2012
- 4.1.1
-
Intrinsic graphene/metal contactNagashio, K. / Ifuku, R. / Moriyama, T. / Nishimura, T. / Toriumi, A. et al. | 2012
- 4.2.1
-
Electrostatically-reversible polarity of dual-gated graphene transistors with He ion irradiated channel: Toward reconfigurable CMOS applicationsNakaharai, Shu / Iijima, Tomohiko / Ogawa, Shinich / Suzuki, Shingo / Tsukagoshi, Kazuhito / Sato, Shintaro / Yokoyama, Naoki et al. | 2012
- 4.3.1
-
Record high conversion gain ambipolar graphene mixer at 10GHz using scaled gate oxideMadan, H. / Hollander, M. J. / LaBella, M. / Cavalero, R. / Snyder, D. / Robinson, J. A. / Datta, S. et al. | 2012
- 4.4.1
-
Optimized spin relaxation length in few layer graphene at room temperatureGao, Yunfei / Kubo, Yuri J. / Lin, Chia-Ching / Chen, Zhihong / Appenzeller, Joerg et al. | 2012
- 4.5.1
-
Scalable and fully self-aligned n-type carbon nanotube transistors with gate-all-aroundFranklin, Aaron D. / Koswatta, Siyuranga O. / Farmer, Damon / Tulevski, George S. / Smith, Joshua T. / Miyazoe, Hiroyuki / Haensch, Wilfried et al. | 2012
- 4.6.1
-
Large-scale 2D electronics based on single-layer MoS2 grown by chemical vapor depositionWang, H. / Yu, L. / Lee, Y.-H. / Fang, W. / Hsu, A. / Herring, P. / Chin, M. / Dubey, M. / Li, L.-J. / Kong, J. et al. | 2012
- 5.1.1
-
Advanced flexible CMOS integrated circuits on plastic enabled by controlled spalling technologyShahrjerdi, D. / Bedell, S. W. / Khakifirooz, A. / Fogel, K. / Lauro, P. / Cheng, K. / Ott, J. A. / Gaynes, M. / Sadana, D. K. et al. | 2012
- 5.2.1
-
Flexible a-IGZO TFT amplifier fabricated on a free standing polyimide foil operating at 1.2 MHz while bent to a radius of 5 mmMunzenrieder, N. / Petti, L. / Zysset, C. / Salvatore, G. A. / Kinkeldei, T. / Perumal, C. / Carta, C. / Ellinger, F. / Troster, G. et al. | 2012
- 5.3.1
-
Multi-bit-per-Cell a-IGZO TFT resistive-switching memory for system-on-plastic applicationsWu, Shih-Chieh / Feng, Hsien-Tsung / Yu, Ming-Jiue / Wang, I-Ting / Hou, Tuo-Hung et al. | 2012
- 5.4.1
-
Ultra flexible pseudo-lamb wave RF resonators based on ZnO/PI and AlN/PI structuresZhou, C. J. / Yang, Y. / Shu, Y. / Zhang, C. H. / Tian, H. / Zhang, Z. H. / Xie, D. / Ren, T. L. / Zhou, J. / Feng, B. et al. | 2012
- 5.5.1
-
Multilayer transition-metal dichalcogenide channel Thin-Film TransistorsKim, Eok Su / Kim, Sunkook / Lee, Yun Sung / Lee, Sang Yoon / Lee, Sunhee / Choi, Woong / Peelaers, Hartwin / Van de Walle, Chris G. / Hwang, Wan-Sik / Kosel, Thomas et al. | 2012
- 5.6.1
-
High mobility zinc oxynitride-TFT with operation stability under light-illuminated bias-stress conditions for large area and high resolution display applicationsRyu, Myungkwan / Kim, Tae Sang / Son, Kyoung Seok / Kim, Hyun-Suk / Park, Joon Seok / Seon, Jong-Baek / Seo, Seok-Jun / Kim, Sun-Jae / Lee, Eunha / Lee, Hyungik et al. | 2012
- 6.1.1
-
50% Efficiency intermediate band solar cell design using highly periodical silicon nanodisk arrayHu, Weiguo / Igarashi, Makoto / Lee, Ming-Yi / Li, Yiming / Samukawa, Seiji et al. | 2012
- 6.2.1
-
Scaling rules of piezoelectric nanowires in view of sensor and energy harvester integrationHinchet, R. / Ferreira, J. / Keraudy, J. / Ardila, G. / Pauliac-Vaujour, E. / Mouis, M. / Montes, L. et al. | 2012
- 6.3.1
-
A multi-physics simulation technique for integrated MEMSToshiyoshi, H. / Konishi, T. / Machida, K. / Masu, K. et al. | 2012
- 6.4.1
-
MOSFET performance and scalability enhancement by insertion of oxygen layersXu, N. / Damrongplasit, N. / Takeuchi, H. / Stephenson, R. J. / Cody, N. W. / Yiptong, A. / Huang, X. / Hytha, M. / Mears, R. J. / Liu, Tsu-Jae King et al. | 2012
- 6.5.1
-
Stress simulations for optimal mobility group IV p- and nMOS FinFETs for the 14 nm node and beyondEneman, G. / Brunco, D. P. / Witters, L. / Vincent, B. / Favia, P. / Hikavyy, A. / De Keersgieter, A. / Mitard, J. / Loo, R. / Veloso, A. et al. | 2012
- 6.6.1
-
Impact of interface traps on the IV curves of InAs Tunnel-FETs and MOSFETs: A full quantum studyPala, M. G. / Esseni, D. / Conzatti, F. et al. | 2012
- 6.7.1
-
A new generation of surface potential-based poly-Si TFTs compact modelIkeda, Hiroyuki / Sano, Nobuyuki et al. | 2012
- 6.8.1
-
A compact model for double-gate tunneling field-effect-transistors and its implications on circuit behaviorsZhang, Lining / He, Jin / Chan, Mansun et al. | 2012
- 7.1.1
-
The role of silicon, silicon carbide and gallium nitride in power electronicsTreu, M. / Vecino, E. / Pippan, M. / Haberlen, O. / Curatola, G. / Deboy, G. / Kutschak, M. / Kirchner, U. et al. | 2012
- 7.2.1
-
GaN Gate Injection Transistor with integrated Si Schottky barrier diode for highly efficient DC-DC convertersMorita, Tatsuo / Ujita, Shinji / Umeda, Hidekazu / Kinoshita, Yusuke / Tamura, Satoshi / Anda, Yoshiharu / Ueda, Tetsuzo / Tanaka, Tsuyoshi et al. | 2012
- 7.3.1
-
Integrated gate-protected HEMTs and mixed-signal functional blocks for GaN smart power ICsKwan, Alex Man Ho / Liu, Xiaosen / Chen, Kevin J. et al. | 2012
- 7.4.1
-
Performance and reliability improvement in SiC power MOSFETs by implementing AlON high-k gate dielectricsHosoi, Takuji / Azumo, Shuji / Kashiwagi, Yusaku / Hosaka, Shigetoshi / Nakamura, Ryota / Mitani, Shuhei / Nakano, Yuki / Asahara, Hirokazu / Nakamura, Takashi / Kimoto, Tsunenobu et al. | 2012
- 7.5.1
-
Diamond semiconductor JFETs by selectively grown n+-diamond side gates for next generation power devicesIwasaki, T. / Hoshino, Y. / Tsuzuki, K. / Kato, H. / Makino, T. / Ogura, M. / Takeuchi, D. / Matsumoto, T. / Okushi, H. / Yamasaki, S. et al. | 2012
- 7.6.1
-
A 10kV vacuum switch with negative electron affinity of diamond p-i-n electron emitterTakeucni, D. / Koizumi, S. / Makino, T. / Kato, H. / Ogura, M. / Okusni, H. / Onasni, H. / Yamasaki, S. et al. | 2012
- 8.1.1
-
The ultimate CMOS device and beyondKuhn, Kelin J. / Avci, Uygar / Cappellani, Annalisa / Giles, Martin D. / Haverty, Michael / Kim, Seiyon / Kotlyar, Roza / Manipatruni, Sasikanth / Nikonov, Dmitri / Pawashe, Chytra et al. | 2012
- 8.2.1
-
Suppressing Vt and Gm variability of FinFETs using amorphous metal gates for 14 nm and beyondMatsukawa, Takashi / Liu, Yongxun / Mizubayashi, Wataru / Tsukada, Junichi / Yamauchi, Hiromi / Endo, Kazuhiko / Ishikawa, Yuki / O'uchi, Shin-ichi / Ota, Hiroyuki / Migita, Shinji et al. | 2012
- 8.3.1
-
Room-temperature carrier transport in high-performance short-channel Silicon nanowire MOSFETsMajumdar, Amlan / Bangsaruntip, Sarunya / Cohen, Guy M. / Gignac, Lynne M. / Guillorn, Michael / Frank, Martin M. / Sleight, Jeffrey W. / Antoniadis, Dimitri A. et al. | 2012
- 8.4.1
-
Polarity control in double-gate, gate-all-around vertically stacked silicon nanowire FETsDe Marchi, M. / Sacchetto, D. / Frache, S. / Zhang, J. / Gaillardon, P.-E. / Leblebici, Y. / De Micheli, G. et al. | 2012
- 8.5.1
-
A novel Si tunnel FET with 36mV/dec subthreshold slope based on junction depleted-modulation through striped gate configurationHuang, Qianqian / Huang, Ru / Zhan, Zhan / Qiu, Yingxin / Jiang, Wenzhe / Wu, Chunlei / Wang, Yangyuan et al. | 2012
- 8.6.1
-
Electrical performances of junctionless-FETs at the scaling limit (LCH = 3 nm)Migita, Shinji / Morita, Yukinori / Masahara, Meishoku / Ota, Hiroyuki et al. | 2012
- 8.7.1
-
300 K operating full-CMOS integrated Single Electron Transistor (SET)-FET circuitsDeshpande, V. / Wacquez, R. / Vinet, M. / Jehl, X. / Barraud, S. / Coquand, R. / Roche, B. / Voisin, B. / Vizioz, C. / Previtali, B. et al. | 2012
- 9.1.1
-
Radically extending the cycling endurance of Flash memory (to > 100M Cycles) by using built-in thermal annealing to self-heal the stress-induced damageLue, Hang-Ting / Du, Pei-Ying / Chen, Chih-Ping / Chen, Wei-Chen / Hsieh, Chih-Chang / Hsiao, Yi-Hsuan / Shih, Yen-Hao / Lu, Chih-Yuan et al. | 2012
- 9.2.1
-
Quantitative and predictive model of reading current variability in deeply scaled vertical poly-Si channel for 3D memoriesToledano-Luque, M. / Degraeve, R. / Kaczer, B. / Tang, B. / Roussel, Ph. J. / Weckx, P. / Franco, J. / Arreghini, A. / Suhane, A. / Kar, G. S. et al. | 2012
- 9.3.1
-
Characterization of traps in 3-D stacked NAND flash memory devices with tube-type poly-Si channel structureJeong, Min-Kyu / Joe, Sung-Min / Jo, Bong-Su / Kang, Ho-Jung / Bae, Jong-Ho / Han, Kyoung-Rok / Choi, Eunseok / Cho, Gyuseok / Park, Sung-Kye / Park, Byung-Gook et al. | 2012
- 9.4.1
-
Device considerations for high density and highly reliable 3D NAND flash cell in near futureChoi, Eun-Seok / Park, Sung-Kye et al. | 2012
- 9.5.1
-
RRAM SET speed-disturb dilemma and rapid statistical prediction methodologyLuo, Wun-Cheng / Liu, Jen-Chieh / Feng, Hsien-Tsung / Lin, Yen-Chuan / Huang, Jiun-Jia / Lin, Kuan-Liang / Hou, Tuo-Hung et al. | 2012
- 9.6.1
-
Methodology for the statistical evaluation of the effect of random telegraph noise (RTN) on RRAM characteristicsVeksler, D. / Bersuker, G. / Chakrabarti, B. / Vogel, E. / Deora, S. / Matthews, K. / Gilmer, D. C. / Li, H.-F. / Gausepohl, S. / Kirsch, P. D. et al. | 2012
- 9.7.1
-
A 32nm SRAM reliability macro for recovery free evaluation of NBTI and PBTIJain, Pulkit / Paul, Ayan / Wang, Xiaofei / Kim, Chris H. et al. | 2012
- 10.1.1
-
Design innovations to optimize the 3D stackable vertical gate (VG) NAND flashHung, Chun-Hsiung / Lue, Hang-Ting / Hung, Shuo-Nan / Hsieh, Chih-Chang / Chang, Kuo-Pin / Chen, Ti-Wen / Huang, Shih-Lin / Chen, Tzung Shen / Chang, Chih-Shen / Yeh, Wen-Wei et al. | 2012
- 10.2.1
-
RRAM-based synapse for neuromorphic system with pattern recognition functionPark, S. / Kim, H. / Choo, M. / Noh, J. / Sheri, A. / Jung, S. / Seo, K. / Park, J. / Kim, S. / Lee, W. et al. | 2012
- 10.3.1
-
CBRAM devices as binary synapses for low-power stochastic neuromorphic systems: Auditory (Cochlea) and visual (Retina) cognitive processing applicationsSuri, M. / Bichler, O. / Querlioz, D. / Palma, G. / Vianello, E. / Vuillaume, D. / Gamrat, C. / DeSalvo, B. et al. | 2012
- 10.4.1
-
A neuromorphic visual system using RRAM synaptic devices with Sub-pJ energy and tolerance to variability: Experimental characterization and large-scale modelingYu, Shimeng / Gao, Bin / Fang, Zheng / Yu, Hongyu / Kang, Jinfeng / Wong, H.-S. Philip et al. | 2012
- 10.5.1
-
Novel hybrid DRAM/MRAM design for reducing power of high performance mobile CPUAbe, Keiko / Noguchi, Hiroki / Kitagawa, Eiji / Shimomura, Naoharu / Ito, Junichi / Fujita, Shinobu et al. | 2012
- 10.6.1
-
First demonstration of logic mapping on nonvolatile programmable cell using complementary atom switchMiyamura, M. / Tada, M. / Sakamoto, T. / Banno, N. / Okamoto, K. / Iguchi, N. / Hada, H. et al. | 2012
- 11.1.1
-
Spin transport in graphene: Fundamental concepts and practical implicationsDlubak, Bruno / Anane, Abdelmadjid / Martin, Marie-Blandine / Seneor, Pierre / Unite, Albert Fert et al. | 2012
- 11.2.1
-
Thermal spin transport and applicationsHuang, S. Y. / Wang, W. G. / Qu, D. / Lee, S. F. / Kwo, J. / Chien, C. L. et al. | 2012
- 11.3.1
-
Progress of STT-MRAM technology and the effect on normally-off computing systemsYoda, H. / Fujita, S. / Shimomura, N. / Kitagawa, E. / Abe, K. / Nomura, K. / Noguchi, H. / Ito, J. et al. | 2012
- 11.4.1
-
Spin transport in metal and oxide devices at the nanoscaleParui, Subir / Rana, Kumari Gaurav / Banerjee, Tamalika et al. | 2012
- 11.5.1
-
Error immunity techniques for nanomagnetic logicLambson, Brian / Gu, Zheng / Bokor, Jeffrey / Carlton, David / Dhuey, Scott et al. | 2012
- 11.6.1
-
Boolean and non-Boolean computation with spin devicesSharad, Mrigank / Augustine, Charles / Roy, Kaushik et al. | 2012
- 12.1.1
-
Optofluidic devices and applicationsPsaltis, Demetri / Song, Wuzhou / Vasdekis, Andreas E. et al. | 2012
- 12.2.1
-
Hybrid CIS/Si near-IR sensor and 16% PV energy-harvesting technologyShen, Chang-Hong / Shieh, Jia-Min / Wu, Tsung-Ta / Chiou, Uio-Pu / Kuo, Hao-Chung / Yu, Peichen / Lu, Tien-Chang / Chueh, Yu-Lun / Liu, Chee-Wee / Hu, Chenming et al. | 2012
- 12.3.1
-
Device optimization for integration of thin-film power electronics with thin-film energy-harvesting devices to create power-delivery systems on plastic sheetsRieutort-Louis, Warren / Robinson, Josue Sanz / Hu, Yingzhe / Huang, Liechao / Sturm, James C. / Verma, Naveen / Wagner, Sigurd et al. | 2012
- 12.4.1
-
UHF IGZO Schottky diodeChasin, Adrian / Steudel, Soeren / Vanaverbeke, Fre / Myny, Kris / Nag, Manoj / Ke, Tung-Huei / Schols, Sarah / Gielen, Georges / Genoe, Jan / Heremans, Paul et al. | 2012
- 12.5.1
-
An innovative heat harvesting technology (HEATec) for above-Seebeck performancePuscasu, O. / Monfray, S. / Savelli, G. / Maitre, C. / Pemeant, J. P. / Coronel, P. / Domanski, K. / Grabiec, P. / Ancey, P. / Cottinet, P. J. et al. | 2012
- 12.6.1
-
High efficiency silicon and Germanium stack junction solar cellsKim, Dongkyun / Choi, Youngmoon / Do, Eun Cheol / Lee, Yeonil / Kim, Yun Gi et al. | 2012
- 13.1.1
-
Towards understanding the origin of threshold voltage instability of AlGaN/GaN MIS-HEMTsLagger, Peter / Ostermaier, Clemens / Pobegen, Gregor / Pogany, Dionyz et al. | 2012
- 13.2.1
-
Characterization of traps and trap-related effects in recessed-gate normally-off AlGaN/GaN-based MOSHEMTBae, Jong-Ho / Hwang, Injun / Shin, Jong-Min / Kwon, Hyuck-In / Park, Chan Hyeong / Ha, Jongbong / Lee, JaeWon / Choi, Hyoji / Kim, Jongseob / Park, Jong-Bong et al. | 2012
- 13.3.1
-
A novel degradation mechanism of AlGaN/GaN/Silicon heterostructures related to the generation of interface trapsMeneghini, M. / Bertin, M. / dal Santo, G. / Stocco, A. / Chini, A. / Marcon, D. / Malinowski, P. E. / Mura, G. / Musu, E. / Vanzi, M. et al. | 2012
- 13.4.1
-
On the degradation of field-plate assisted RESURF power devicesBoksteen, B. K. / Dhar, S. / Ferrara, A. / Heringa, A. / Hueting, R. J. E. / Koops, G. E. J. / Salm, C. / Schmitz, J. et al. | 2012
- 13.5.1
-
Fully coupled thermoelectroelastic simulations of GaN devicesAncona, M. G. et al. | 2012
- 13.6.1
-
Physics-based GaN HEMT transport and charge model: Experimental verification and performance projectionRadhakrishna, Ujwal / Wei, Lan / Lee, Dong-Seup / Palacios, Tomas / Antoniadis, Dimitri et al. | 2012
- 14.1.1
-
High-performance integrated fan-out wafer level packaging (InFO-WLP): Technology and system integrationLiu, Christianto C. / Chen, Shuo-Mao / Kuo, Feng-Wei / Chen, Huan-Neng / Yeh, En-Hsiang / Hsieh, Cheng-Chieh / Huang, Li-Hsien / Chiu, Ming-Yen / Yeh, John / Lin, Tsung-Shu et al. | 2012
- 14.2.1
-
Cooling three-dimensional integrated circuits using power delivery networksWei, Hai / Wu, Tony F. / Sekar, Deepak / Cronquist, Brian / Pease, Roger Fabian / Mitra, Subhasish et al. | 2012
- 14.3.1
-
Analog and RF circuits design and future devices interactionMatsuzawa, Akira et al. | 2012
- 14.4.1
-
A highly integrated 65-nm SoC process with enhanced power/performance of digital and analog circuitsClark, L. T. / Zhao, D. / Bakhishev, T. / Ahn, H. / Boling, E. / Duane, M. / Fujita, K. / Gregory, P. / Hoffmann, T. / Hori, M. et al. | 2012
- 14.5.1
-
Improving analog/RF performance of multi-gate devices through multi-dimensional design optimization with awareness of variations and parasiticsLiu, Yuchao / Huang, Ru / Wang, Runsheng / Ou, Jiaojiao / Wang, Yangyuan et al. | 2012
- 14.6.1
-
State-of-the-art graphene transistors on hexagonal boron nitride, high-k, and polymeric films for GHz flexible analog nanoelectronicsLee, Jongho / Parrish, Kristen N. / Chowdhury, Sk. Fahad / Ha, Tae-Jun / Hao, Yufeng / Tao, Li / Dodabalapur, Ananth / Ruoff, Rodney S. / Akinwande, Deji et al. | 2012
- 15.1.1
-
Deep Trench capacitor drive of a 3.3 GHz unreleased Si MEMS resonatorWang, Wentao / Weinstein, Dana et al. | 2012
- 15.2.1
-
Resonant-body silicon nanowire field effect transistor without junctionsBartsch, Sebastian T. / Dupre, Cecilia / Ollier, Eric / Ionescu, Adrian M. et al. | 2012
- 15.3.1
-
Large-scale assembly of tunable resonant-body carbon nanotube transistors without hysteresisCao, Ji / Bartsch, Sebastian T. / Ionescu, Adrian M. et al. | 2012
- 15.4.1
-
VLSI platform for the monolithic integration of single-crystal Si NEMS capacitive resonators with low-cost CMOSArcamone, J. / Savoye, M. / Arndt, G. / Philippe, J. / Marcoux, C. / Colinet, E. / Duraffourg, L. / Magis, T. / Laurens, M. / Monroy-Aguirre, A. et al. | 2012
- 15.5.1
-
Monolithic integration of GaN-based micromechanical resonators and HEMTs for timing applicationsAnsari, Azadeh / Gokhale, Vikrant J. / Roberts, John / Rais-Zadeh, Mina et al. | 2012
- 15.6.1
-
Weighted electrode configuration for electromechanical coupling enhancement in a new class of micromachined Lithium Niobate laterally vibrating resonatorsGong, Songbin / Piazza, Gianluca et al. | 2012
- 16.1.1
-
Physical mechanism determining Ge p- and n-MOSFETs mobility in high Ns region and mobility improvement by atomically flat GeOx/Ge interfacesZhang, Rui / Huang, Po-Chin / Lin, Ju-Chin / Takenaka, Mitsuru / Takagi, Shinichi et al. | 2012
- 16.2.1
-
Towards high mobility GeSn channel nMOSFETs: Improved surface passivation using novel ozone oxidation methodGupta, S. / Vincent, B. / Yang, B. / Lin, D. / Gencarelli, F. / Lin, J.-Y. J. / Chen, R. / Richard, O. / Bender, H. / Magyari-Kope, B. et al. | 2012
- 16.3.1
-
Towards direct band-to-band tunneling in P-channel tunneling field effect transistor (TFET): Technology enablement by Germanium-tin (GeSn)Yang, Yue / Su, Shaojian / Guo, Pengfei / Wang, Wei / Gong, Xiao / Wang, Lanxiang / Low, Kain Lu / Zhang, Guangze / Xue, Chunlai / Cheng, Buwen et al. | 2012
- 16.4.1
-
First experimental Ge CMOS FinFETs directly on SOI substrateChung, Cheng-Ting / Chen, Che-Wei / Lin, Jyun-Chih / Wu, Che-Chen / Chien, Chao-Hsin / Luo, Guang-Li et al. | 2012
- 16.5.1
-
High mobility high-κ-all-around asymmetrically-strained Germanium nanowire trigate p-MOSFETsChern, Winston / Hashemi, Pouya / Teherani, James T. / Yu, Tao / Dong, Yuanwei / Xia, Guangrui / Antoniadis, Dimitri A. / Hoyt, Judy L. et al. | 2012
- 16.6.1
-
InAs-Si heterojunction nanowire tunnel diodes and tunnel FETsRiel, H. / Moselund, K. E. / Bessire, C. / Bjork, M. T. / Schenk, A. / Ghoneim, H. / Schmid, H. et al. | 2012
- 17.1.1
-
Towards atomistic simulations of the electro-thermal properties of nanowire transistorsLuisier, Mathieu et al. | 2012
- 17.2.1
-
Current fluctuation in sub-nano second regime in gate-all-around nanowire channels studied with ensemble Monte Carlo/molecular dynamics simulationKamioka, T. / Imai, H. / Kamakura, Y. / Ohmori, K. / Shiraishi, K. / Niwa, M. / Yamada, K. / Watanabe, T. et al. | 2012
- 17.3.1
-
Insights on radio frequency bilayer graphene FETsFiori, G. / Iannaccone, G. et al. | 2012
- 17.4.1
-
A computational study of metal-contacts to beyond-graphene 2D semiconductor materialsKang, Jiahao / Sarkar, Deblina / Liu, Wei / Jena, Debdeep / Banerjee, Kaustav et al. | 2012
- 17.5.1
-
Impact of quasi-ballistic phonon transport on thermal properties in nanoscale devices: A Monte Carlo approachKukita, Kentaro / Adisusilo, Indra Nur / Kamakura, Yoshinari et al. | 2012
- 17.6.1
-
Performance comparison of III-V MOSFETs with source filter for electron energyLam, Kai-Tak / Yeo, Yee-Chia / Liang, Gengchiau et al. | 2012
- 18.1.1
-
High performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFETCheng, K. / Khakifirooz, A. / Loubet, N. / Luning, S. / Nagumo, T. / Vinet, M. / Liu, Q. / Reznicek, A. / Adam, T. / Naczas, S. et al. | 2012
- 18.2.1
-
Phosphorus doped SiC Source Drain and SiGe channel for scaled bulk FinFETsTogo, M. / Lee, J. W. / Pantisano, L. / Chiarella, T. / Ritzenthaler, R. / Krom, R. / Hikavyy, A. / Loo, R. / Rosseel, E. / Brus, S. et al. | 2012
- 18.3.1
-
Is strain engineering scalable in FinFET era?: Teaching the old dog some new tricksNainani, Aneesh / Gupta, Shashank / Moroz, Victor / Choi, Munkang / Kim, Yihwan / Cho, Yonah / Gelatos, Jerry / Mandekar, Tushar / Brand, Adam / Ping, Er-Xuan. et al. | 2012
- 18.4.1
-
Impact of through silicon via induced mechanical stress on fully depleted Bulk FinFET technologyGuo, W. / Van der Plas, G. / Ivankovic, A. / Cherman, V. / Eneman, G. / De Wachter, B. / Togo, M. / Redolfi, A. / Kubicek, S. / Civale, Y. et al. | 2012
- 18.5.1
-
Opportunities and challenges in device scaling by the introduction of EUV lithographyRonse, K. / De Bisschop, P. / Vandenberghe, G. / Hendrickx, E. / Gronheid, R. / Pret, A. Vaglio / Mallik, A. / Verkest, D. / Steegen, A. et al. | 2012
- 18.6.1
-
Effective Schottky Barrier Height modulation using dielectric dipoles for source/drain specific contact resistivity improvementAng, K.-W. / Majumdar, K. / Matthews, K. / Young, C. D. / Kenney, C. / Hobbs, C. / Kirsch, P. D. / Jammy, R. / Clark, R. D. / Consiglio, S. et al. | 2012
- 18.7.1
-
Ti impact in C-doped phase-change memories compliant to Pb-free soldering reflowPerniola, L. / Noe, P. / Hubert, Q. / Souiki, S. / Ghezzi, G. / Navarro, G. / Cabrini, A. / Persico, A. / Delaye, V. / Blachier, D. et al. | 2012
- 18.8.1
-
High on/off-ratio P-type oxide-based transistors integrated onto Cu-interconnects for on-chip high/low voltage-bridging BEOL-CMOS I/OsSunamura, H. / Kaneko, K. / Furutake, N. / Saito, S. / Narihiro, M. / Ikarashi, N. / Hane, M. / Hayashi, Y. et al. | 2012
- 19.1.1
-
Statistical measurement of random telegraph noise and its impact in scaled-down high-κ/metal-gate MOSFETsMiki, H. / Tega, N. / Yamaoka, M. / Frank, D. J. / Bansal, A. / Kobayashi, M. / Cheng, K. / D'Emic, C. P. / Ren, Z. / Wu, S. et al. | 2012
- 19.2.1
-
The understanding of multi-level RTN in trigate MOSFETs through the 2D profiling of traps and its impact on SRAM performance: A new failure mechanism foundHsieh, E. R. / Tsai, Y. L. / Chung, Steve S. / Tsai, C. H. / Huang, R. M. / Tsai, C. T. et al. | 2012
- 19.3.1
-
New and critical aspects of 1/f noise variability in advanced CMOS SoC technologiesSrinivasan, P. / Dey, S. et al. | 2012
- 19.4.1
-
AC transconductance: A novel method to characterize oxide traps in advanced FETs without a body contactSun, X. / Xu, N. / Xue, F. / Alian, A. / Andrieu, F. / Nguyen, B. Y. / Poiroux, T. / Faynot, O. / Lee, J. / Cui, S. et al. | 2012
- 19.5.1
-
New observations on AC NBTI induced dynamic variability in scaled high-κ/Metal-gate MOSFETs: Characterization, origin of frequency dependence, and impacts on circuitsLiu, Changze / Ren, Pengpeng / Wang, Runsheng / Huang, Ru / Ou, Jiaojiao / Huang, Qianqian / Zou, Jibin / Wang, Jianping / Wu, Jingang / Yu, Shaofeng et al. | 2012
- 19.6.1
-
On the microscopic origin of the frequency dependence of hole trapping in pMOSFETsCrasser, T. / Reisinger, H. / Rott, K. / Toledano-Luque, M. / Kaczer, B. et al. | 2012
- 20.1.1
-
Microscopic understanding and modeling of HfO2 RRAM device physicsLarcher, L. / Padovani, A. / Pirrotta, O. / Vandelli, L. / Bersuker, G. et al. | 2012
- 20.2.1
-
Physics in designing desirable ReRAM stack structure — Atomistic recipes based on oxygen chemical potential control and charge injection/removalKamiya, K. / Yang, M. Y. / Magyari-Kope, B. / Niwa, M. / Nishi, Y. / Shiraishi, K. et al. | 2012
- 20.3.1
-
Understanding of the endurance failure in scaled HfO2-based 1T1R RRAM through vacancy mobility degradationChen, Yang Yin / Degraeve, Robin / Clima, Sergiu / Govoreanu, Bogdan / Goux, Ludovic / Fantini, Andrea / Kar, Gouri Sankar / Pourtois, Geoffrey / Groeseneken, Guido / Wouters, Dirk J. et al. | 2012
- 20.4.1
-
Real-time study of switching kinetics in integrated 1T/ HfOx 1R RRAM: Intrinsic tunability of set/reset voltage and trade-off with switching timeKoveshnikov, S. / Matthews, K. / Min, K. / Gilmer, D. C. / Sung, M.G. / Deora, S. / Li, H. F. / Gausepohl, S. / Kirsch, P. D. / Jammy, R. et al. | 2012
- 20.5.1
-
Electrode/oxide interface engineering by inserting single-layer graphene: Application for HfOx-based resistive random access memoryChen, Hong-Yu / Tian, He / Gao, Bin / Yu, Shimeng / Liang, Jiale / Kang, Jinfeng / Zhang, Yuegang / Ren, Tian-Ling / Wong, H.-S. Philip et al. | 2012
- 20.6.1
-
Highly compact 1T-1R architecture (4F2 footprint) involving fully CMOS compatible vertical GAA nano-pillar transistors and oxide-based RRAM cells exhibiting excellent NVM properties and ultra-low power operationWang, X. P. / Fang, Z. / Li, X. / Chen, B. / Gao, B. / Kang, J. F. / Chen, Z. X. / Kamath, A. / Shen, N. S. / Singh, N. et al. | 2012
- 20.7.1
-
HfOx based vertical resistive random access memory for cost-effective 3D cross-point architecture without cell selectorChen, Hong-Yu / Yu, Shimeng / Gao, Bin / Huang, Peng / Kang, Jinfeng / Wong, H.-S. Philip et al. | 2012
- 20.8.1
-
A non-linear ReRAM cell with sub-1μA ultralow operating current for high density vertical resistive memory (VRRAM)Park, Seong-Geon / Yang, Min Kyu / Ju, Hyunsu / Seong, Dong-Jun / Lee, Jung Moo / Kim, Eunmi / Jung, Seungjae / Zhang, Lijie / Shin, Yoo Cheol / Baek, In-Gyu et al. | 2012
- 23.1.1
-
MOS interface and channel engineering for high-mobility Ge/III-V CMOSTakagi, S. / Zhang, R. / Kim, S.-H / Taoka, N. / Yokoyama, M. / Suh, J.-K. / Suzuki, R. / Takenaka, M. et al. | 2012
- 23.2.1
-
Interfacial layer-free ZrO2 on Ge with 0.39-nm EOT, κ∼43, ∼2×10−3 A/cm2 gate leakage, SS =85 mV/dec, Ion/Ioff =6×105, and high strain responseLin, Cheng-Ming / Chang, Hung-Chih / Chen, Yen-Ting / Wong, I-Hsieh / Lan, Huang-Siang / Luo, Shih-Jan / Lin, Jing-Yi / Tseng, Yi-Jen / Liu, C. W. / Hu, Chenming et al. | 2012
- 23.3.1
-
Full low temperature microwave processed Ge CMOS achieving diffusion-less junction and Ultrathin 7.5nm Ni mono-germanideLee, Y.-J. / Chuang, S.-S. / Liu, C.-I. / Hsueh, F.-K. / Sung, P.-J. / Chen, H.-C. / Wu, C.-T. / Lin, K.-L. / Yao, J.-Y. / Shen, Y.-L. et al. | 2012
- 23.4.1
-
An integration path for gate-first UTB III-V-on-insulator MOSFETs with silicon, using direct wafer bonding and donor wafer recyclingCzornomaz, L. / Daix, N. / Caimi, D. / Sousa, M / Erni, R. / Rossell, M. D. / El-Kazzi, M. / Rossel, C. / Marchiori, C. / Uccelli, E. et al. | 2012
- 23.5.1
-
Demonstration of scaled Ge p-channel FinFETs integrated on Sivan Dal, M. J. H. / Vellianitis, G. / Doornbos, G. / Duriez, B. / Shen, T. M / Wu, C. C. / Oxland, R. / Bhuwalka, K. / Holland, M. / Lee, T. L. et al. | 2012
- 23.6.1
-
Triangular-channel Ge NFETs on Si with (111) sidewall-enhanced Ion and nearly defect-free channelsHsu, Shu-Han / Chang, Hung-Chih / Chu, Chun-Lin / Chen, Yen-Ting / Tu, Wen-Hsien / Hou, Fu Ju / Lo, Chih Hung / Sung, Po-Jung / Chen, Bo-Yuan / Huang, Guo-Wei et al. | 2012
- 23.7.1
-
III-V gate-all-around nanowire MOSFET process technology: From 3D to 4DGu, J. J. / Wang, X. W. / Shao, J. / Neal, A. T. / Manfra, M. J. / Gordon, R. G. / Ye, P. D. et al. | 2012
- 24.1.1
-
Evolution of optical structure in image sensorsTeranishi, Nobukazu / Watanabe, Hisashi / Ueda, Takehiko / Sengoku, Naohisa et al. | 2012
- 24.2.1
-
Suppression of crosstalk by using backside deep trench isolation for 1.12μm backside illuminated CMOS image sensorKitamura, Y. / Aikawa, H. / Kakehi, K. / Yousyou, T. / Eda, K. / Minami, T. / Uya, S. / Takegawa, Y. / Yamashita, H. / Kohyama, Y. et al. | 2012
- 24.3.1
-
How to achieve ultra high photoconductive gain for transparent oxide semiconductor image sensorsLee, Sungsik / Jeon, Sanghun / Robertson, John / Nathan, Arokia et al. | 2012
- 24.4.1
-
InGaAs/InP SPAD with improved structure for sharp timing responseTosi, Alberto / Acerbi, Fabio / Anti, Michele / Zappa, Franco et al. | 2012
- 24.5.1
-
High photocurrent and quantum efficiency of graphene photodetector using layer-by-layer stack structure and trap assistanceLi, Hua-Min / Shen, Tian-Zi / Lee, Dae-Yeong / Yoo, Won Jong et al. | 2012
- 24.6.1
-
A CMOS-MEMS-based label-free protein sensor for high-sensitive and compact systemTakahashi, Kazuhiro / Ozawa, Ryo / Oyama, Hiroki / Futagawa, Masato / Dasai, Fumihiro / Ishida, Makoto / Sawada, Kazuaki et al. | 2012
- 24.7.1
-
Exceeding Nernst limit (59mV/pH): CMOS-based pH sensor for autonomous applicationsParizi, Kokab B. / Yeh, Alexander J. / Poon, Ada S. Y. / Wong, H. S. Philip et al. | 2012
- 25.1.1
-
The impact of assist-circuit design for 22nm SRAM and beyondKarl, Eric / Guo, Zheng / Ng, Yong-Gee / Keane, John / Bhattacharya, Uddalak / Zhang, Kevin et al. | 2012
- 25.2.1
-
Process technology implications for FPGAs (Invited Paper)Lewis, David / Chromczak, Jeffery et al. | 2012
- 25.3.1
-
Standard cell level parasitics assessment in 20nm BPL and 14nm BFFSchuddinck, P. / Badaroglu, M. / Stucchi, M. / Demuynck, S. / Hikavyy, A. / Garcia-Bardon, M. / Mercha, A. / Mallik, A. / Chiarella, T. / Kubicek, S. et al. | 2012
- 25.4.1
-
Uniform methodology for benchmarking beyond-CMOS logic devicesNikonov, Dmitri E. / Young, Ian A. et al. | 2012
- 25.5.1
-
Technology assessment of Si and III-V FinFETs and III-V tunnel FETs from soft error rate perspectiveLiu, Huichu / Cotter, Matthew / Datta, Suman / Narayanan, Vijay et al. | 2012
- 25.6.1
-
Impact of random telegraph noise on CMOS logic delay uncertainty under low voltage operationMatsumoto, Takashi / Kobayashi, Kazutoshi / Onodera, Hidetoshi et al. | 2012
- 26.1.1
-
Understanding metal oxide RRAM current overshoot and reliability using Kinetic Monte Carlo simulationYu, Shimeng / Guan, Ximeng / Wong, H.-S. Philip et al. | 2012
- 26.2.1
-
Energy landscape model of conduction and switching in phase change memoriesRizzi, M. / Ielmini, D. et al. | 2012
- 26.3.1
-
Electrochemical simulation of filament growth and dissolution in conductive-bridging RAM (CBRAM) with cylindrical coordinatesLin, Sen / Zhao, Liang / Zhang, Jinyu / Wu, Huaqiang / Wang, Yan / Qian, He / Yu, Zhiping et al. | 2012
- 26.4.1
-
Topological-insulator-based non-volatile memory cells: A quantum device simulationLu, Yang / Guo, Jing et al. | 2012
- 26.5.1
-
Electric field induced magnetic switching at room temperature: Switching speed, device scaling and switching energyAshraf, Khalid / Smith, Samuel / Salahuddin, Sayeef et al. | 2012
- 26.6.1
-
A physical based analytic model of RRAM operation for circuit simulationHuang, P. / Liu, X. Y. / Li, W. H. / Deng, Y. X. / Chen, B. / Lu, Y. / Gao, B. / Zeng, L. / Wei, K. L. / Du, G. et al. | 2012
- 26.7.1
-
Modeling the variability caused by random grain boundary and trap-location induced asymmetrical read behavior for a tight-pitch vertical gate 3D NAND Flash memory using double-gate thin-film transistor (TFT) deviceHsiao, Yi-Hsuan / Lue, Hang-Ting / Chen, Wei-Chen / Chen, Chih-Ping / Chang, Kuo-Ping / Shih, Yen-Hao / Tsui, Bing-Yue / Lu, Chih-Yuan et al. | 2012
- 27.1.1
-
Benchmarking and improving III-V Esaki diode performance with a record 2.2 MA/cm2 peak current density to enhance TFET drive currentPawlik, D. / Romanczyk, B. / Thomas, P. / Rommel, S. / Edirisooriya, M. / Contreras-Guerrero, R. / Droopad, R. / Loh, W-Y / Wong, M. H. / Majumdar, K. et al. | 2012
- 27.1.1
-
Heteroepitaxial growth and power electronics using AlGaN/GaN HEMT on SiEgawa, Takashi et al. | 2012
- 27.2.1
-
Self-aligned-gate GaN-HEMTs with heavily-doped n+-GaN ohmic contacts to 2DEGShinohara, K. / Regan, D. / Corrion, A. / Brown, D. / Tang, Y. / Wong, J. / Candia, G. / Schmitz, A. / Fung, H. / Kim, S. et al. | 2012
- 27.3.1
-
Extremely high current density over 1000 A/cm2 operation in m-plane GaN small size LEDs with low efficiency droop and method for controlling radiation pattern and polarizationInoue, Akira / Kato, Ryo / Yamada, Atsushi / Yokogawa, Toshiya et al. | 2012
- 27.4.1
-
Room-temperature photonic crystal nanocavity light emitting diodes based on Ge self-assembled quantum dotsXu, Xuejun / Maruizumi, Takuya / Shiraki, Yasuhiro et al. | 2012
- 27.5.1
-
Excellent device performance of 3D In0.53Ga0.47As gate-wrap-around field-effect-transistors with high-k gate dielectricsXue, Fei / Jiang, Aiting / Chen, Yen-Ting / Wang, Yanzhen / Zhou, Fei / Chang, Yao-Feng / Lee, Jack et al. | 2012
- 27.6.1
-
20–80nm Channel length InGaAs gate-all-around nanowire MOSFETs with EOT=1.2nm and lowest SS=63mV/decGu, J. J. / Wang, X. W. / Wu, H. / Shao, J. / Neal, A. T. / Manfra, M. J. / Gordon, R. G. / Ye, P. D. et al. | 2012
- 28.1.1
-
Study of piezoresistive properties of advanced CMOS transistors: Thin film SOI, SiGe/SOI, unstrained and strained Tri-Gate NanowiresCasse, M. / Barraud, S. / Le Royer, C. / Koyama, M. / Coquand, R. / Blachier, D. / Andrieu, F. / Ghibaudo, G. / Faynot, O. / Poiroux, T. et al. | 2012
- 28.2.1
-
Experimental study of self-heating effect (SHE) in SOI MOSFETs: Accurate understanding of temperatures during AC conductance measurement, proposals of 2ω method and modified pulsed IVBeppu, Nobuyasu / Oda, Shunri / Uchida, Ken et al. | 2012
- 28.3.1
-
Beyond interface: The impact of oxide border traps on InGaAs and Ge n-MOSFETsLin, D. / Alian, A. / Gupta, S. / Yang, B. / Bury, E. / Sioncke, S. / Degraeve, R. / Toledano, M. L. / Krom, R. / Favia, P. et al. | 2012
- 28.4.1
-
Assessment of the stochastic nature of dielectric breakdown in advanced CMOS technologies utilizing voltage ramp stress methodologyKerber, Andreas / Lipp, Dieter / Lin, Yu-Yin et al. | 2012
- 28.5.1
-
Temperature dependence of TDDB voltage acceleration in high-κ/ SiO2 bilayers and SiO2 gate dielectricsWu, Ernest / Sune, Jordi / LaRow, Charles / Dufresne, Roger et al. | 2012
- 28.6.1
-
Minimizing the local deformation induced around Cu-TSVs and CuSn/InAu-microbumps in high-density 3D-LSIsMurugesan, M. / Kobayashi, H. / Shimamoto, H. / Yamada, F. / Fukushima, T. / Bea, J. C. / Lee, K. W. / Tanaka, T. / Koyanagi, M. et al. | 2012
- 28.7.1
-
Insights in low frequency noise of advanced and high-mobility channel transistorsSimoen, E. / Romeo, T. / Pantisano, L. / Rodriguez, A. Luque / Tejada, J. A. Jimenez / Aoulaiche, M. / Veloso, A. / Jurczak, M. / Krom, R. / Mitard, J. et al. | 2012
- 29.1.1
-
A novel MTJ for STT-MRAM with a dummy free layer and dual tunnel junctionsTsunoda, K. / Noshiro, H. / Yoshida, C. / Yamazaki, Y. / Takahashi, A. / Iba, Y. / Hatada, A. / Nakabayashi, M. / Takenaga, T. / Aoki, M. et al. | 2012
- 29.2.1
-
Impact of stray field on the switching properties of perpendicular MTJ for scaled MRAMWang, Yung-Hung / Huang, Sheng-Huang / Wang, Ding-Yeong / Shen, Kuei-Hung / Chien, Cheng-Wei / Kuo, Keng-Ming / Yang, Shan-Yi / Deng, Duan-Li et al. | 2012
- 29.3.1
-
High density ST-MRAM technology (Invited)Slaughter, J. M. / Rizzo, N. D. / Janesky, J. / Whig, R. / Mancoff, F. B. / Houssameddine, D. / Sun, J. J. / Aggarwal, S. / Nagel, K. / Deshpande, S. et al. | 2012
- 29.4.1
-
Impact of ultra low power and fast write operation of advanced perpendicular MTJ on power reduction for high-performance mobile CPUKitagawa, E. / Fujita, S. / Nomura, K. / Noguchi, H. / Abe, K. / Ikegami, K. / Daibou, T. / Kato, Y. / Kamata, C. / Kashiwada, S. et al. | 2012
- 29.5.1
-
Voltage-induced switching of nanoscale magnetic tunnel junctionsAlzate, J. G. / Amiri, P. Khalili / Upadhyaya, P. / Cherepov, S. S. / Zhu, J. / Lewis, M. / Dorrance, R. / Katine, J. A. / Langer, J. / Galatsis, K. et al. | 2012
- 29.6.1
-
Design and performance of pseudo-spin-MOSFETs using nano-CMOS devicesShuto, Y. / Yamamoto, S. / Sukegawa, H. / Wen, Z. C. / Nakane, R. / Mitani, S. / Tanaka, M. / Inomata, K. / Sugahara, S. et al. | 2012
- 29.7.1
-
Possible route to low current, high speed, dynamic switching in a perpendicular anisotropy CoFeB-MgO junction using Spin Hall Effect of TaBhowmik, Debanjan / You, Long / Salahuddin, Sayeef et al. | 2012
- 29.8.1
-
Improved reliability and switching performance of atom switch by using ternary Cu-alloy and RuTa electrodesTada, M. / Sakamoto, T. / Banno, N. / Okamoto, K. / Miyamura, M. / Iguchi, N. / Hada, H. et al. | 2012
- 30.1.1
-
Molecular Dynamic simulation study of stress memorization in Si dislocationsShen, Tzer-Min / Tung, Yen-Tien / Cheng, Ya-Yun / Chiou, Da-Chin / Chen, Chia-Yi / Wu, Ching-Chang / Sheu, Y. M. / Tsai, Han-Ting / Huang, C. M. / Hsieh, G. et al. | 2012
- 30.2.1
-
Analysis of dopant diffusion and defects in SiGe-channel Implant Free Quantum Well (IFQW) devices using an atomistic kinetic Monte Carlo approachNoda, T. / Mitard, J. / Witters, L. / Hellings, G. / Vrancken, C. / Eyben, P. / Thean, A. / Horiguchi, N. / Vandervorst, W. et al. | 2012
- 30.3.1
-
Evidence for an atomistic-doping induced variability of the band-to-band leakage current of nanoscale device junctionsGhetti, A. / Compagnoni, C. Monzio / Digiacomo, L. / Vendrame, L. / Spinelli, A. S. / Lacaita, A. L. et al. | 2012
- 30.4.1
-
Simulation of the effect of arsenic discrete distribution on device characteristics in silicon nanowire transistorsUematsu, Masashi / Itoh, Kohei M. / Mil'nikov, Gennady / Minari, Hideki / Mori, Nobuya et al. | 2012
- 30.5.1
-
Modeling of hot carrier degradation using a spherical harmonics expansion of the bipolar Boltzmann transport equationBina, M. / Rupp, K. / Tyaginov, S. / Triebl, O. / Grasser, T. et al. | 2012
- 30.6.1
-
Hybrid modeling and analysis of different through-silicon-Via (TSV)-based 3D power distribution networksXu, Zheng / Lu, James J.-Q. et al. | 2012
- 30.7.1
-
A Monte Carlo simulation of electron transport in Cu nano-interconnects: Suppression of resistance degradation due to LER/LWRKurusu, Takashi / Tanimoto, Hiroyoshi / Wada, Makoto / Isobayashi, Atsunobu / Kajita, Akihiro / Aoki, Nobutoshi / Toyoshima, Yoshiaki et al. | 2012
- 31.1.1
-
A thermally robust phase change memory by engineering the Ge/N concentration in (Ge, N)xSbyTe z phase change materialCheng, H. Y. / Wu, J. Y. / Cheek, R. / Raoux, S. / BrightSky, M. / Garbin, D. / Kim, S. / Hsu, T. H. / Zhu, Y. / Lai, E. K. et al. | 2012
- 31.2.1
-
Non-Arrhenius pulse-induced crystallization in phase change memoriesCiocchini, N. / Cassinerio, M. / Fugazza, D. / Ielmini, D. et al. | 2012
- 31.3.1
-
Engineering grains of Ge2Sb2Te5 for realizing fast-speed, low-power, and low-drift phase-change memories with further multilevel capabilitiesWang, W. J. / Loke, D. / Law, L. T. / Shi, L. P. / Zhao, R. / Li, M. H. / Chen, L. L. / Yang, H. X. / Yeo, Y. C. / Adeyeye, A. O. et al. | 2012
- 31.4.1
-
A low power phase change memory using low thermal conductive doped-Ge2Sb2Te 5 with nano-crystalline structureMorikawa, T. / Akita, K. / Ohyanagi, T. / Kitamura, M. / Kinoshita, M. / Tai, M. / Takaura, N. et al. | 2012
- 31.5.1
-
Sb-doped GeS2 as performance and reliability booster in Conductive Bridge RAMVianello, E. / Molas, G. / Longnos, F. / Blaise, P. / Souchier, E. / Cagli, C. / Palma, G. / Guy, J. / Bernard, M. / Reyboz, M. et al. | 2012
- 31.6.1
-
High-K metal gate contact RRAM (CRRAM) in pure 28nm CMOS logic processShen, Wen Chao / Mei, Chin Yu / Chih, Y.-D. / Sheu, Shyh-Shyuan / Tsai, Ming-Jinn / King, Ya-Chin / Lin, Chrong Jung et al. | 2012
- 31.7.1
-
Highly endurable floating body cell memory: Vertical biristorMoon, Dong-Il / Choi, Sung-Jin / Kim, Jee-Yeon / Ko, Seung-Won / Kim, Moon-Seok / Oh, Jae-Sub / Lee, Gi-Sung / Kang, Min-Ho / Kim, Young-Su / Kim, Jeoung-Woo et al. | 2012
- 31.8.1
-
Active Width Modulation (AWM) for cost-effective and highly reliable PRAMHa, Daewon / Lee, K. W. / Sim, K. R. / Yu, J. H. / Ahn, S. J. / Kim, S. Y. / An, T. H. / Hong, S. H. / Kim, S. K. / Lee, J. W. et al. | 2012
- 32.1.1
-
Sub-30 nm InAs Quantum-Well MOSFETs with self-aligned metal contacts and Sub-1 nm EOT HfO2 insulatorLin, J. / Antoniadis, D. A. / del Alamo, J. A. et al. | 2012
- 32.2.1
-
E-mode planar Lg = 35 nm In0.7Ga0.3As MOSFETs with InP/Al2O3/HfO2 (EOT = 0.8 nm) composite insulatorKim, D.-H. / Hundal, P. / Papavasiliou, A. / Chen, P. / King, C. / Paniagua, J. / Urteaga, M. / Brar, B. / Kim, Y. G. / Kuo, J.-M. et al. | 2012
- 32.3.1
-
ETB-QW InAs MOSFET with scaled body for improved electrostaticsKim, T.-W. / Kim, D.-H / Koh, D.-H. / Hill, R. J. W. / Lee, R. T. P. / Wong, M. H / Cunningham, T. / del Alamo, J. A. / Banerjee, S. K. / Oktyabrsky, S. et al. | 2012
- 32.4.1
-
Mechanism of dangling bond elimination on As-rich InGaAs surfaceMelitz, Wilhelm / Chagarov, Evgueni / Kent, Tyler / Droopad, Ravi / Ahn, Jaesoo / Long, Rathnait / McIntyre, Paul C. / Kummel, Andrew C. et al. | 2012
- 32.5.1
-
30nm enhancement-mode In0.53Ga0.47As MOSFETs on Si substrates grown by MOCVD exhibiting high transconductance and low on-resistanceZhou, Xiuju / Li, Qiang / Tang, Chak Wah / Lau, Kei May et al. | 2012
- 32.6.1
-
Novel gate-recessed vertical InAs/GaSb TFETs with record high ION of 180 μA/μm at VDS = 0.5 VZhou, Guangle / Li, R. / Vasen, T. / Qi, M. / Chae, S. / Lu, Y. / Zhang, Q. / Zhu, H. / Kuo, J.-M. / Kosel, T. et al. | 2012
- 33.1.1
-
The evolution of dense embedded memory in high performance logic technologiesIyer, Subramanian S. et al. | 2012
- 33.2.1
-
Characterization of chip-level hetero-integration technology for high-speed, highly parallel 3D-stacked image processing systemLee, K-W / Ohara, Y. / Kiyoyama, K. / Konno, S. / Sato, Y. / Watanabe, S. / Yabata, A. / Kamada, T. / Bea, J-C / Hashimoto, H. et al. | 2012
- 33.3.1
-
New chip-to-wafer 3D integration technology using hybrid self-assembly and electrostatic temporary bondingFukushima, T. / Hashiguchi, H. / Bea, J. / Ohara, Y. / Murugesan, M. / Lee, K.-W. / Tanaka, T. / Koyanagi, M. et al. | 2012
- 33.4.1
-
Thinning, stacking, and TSV proximity effects for Poly and High-K/Metal Gate CMOS devices in an advanced 3D integration processLo, T. / Chen, M. F. / Jan, S. B. / Tsai, W. C. / Tseng, Y. C. / Lin, C. S. / Chiu, T. J. / Lu, W. S. / Teng, H. A. / Chen, S. M. et al. | 2012
- 33.5.1
-
Improved thermal conductivity by vertical graphene contact formation for thermal TSVNihei, Mizuhisa / Kawabata, Akio / Murakami, Tomo / Sato, Motonobu / Yokoyama, Naoki et al. | 2012
- 33.6.1
-
3D Ferroelectric-like NVM/CMOS hybrid chip by sub-400 °C sequential layered integrationLien, Yu-Chung / Shieh, Jia-Min / Huang, Wen-Hsien / Hsieh, Wei-Shang / Tu, Cheng-Hui / Wang, Chieh / Shen, Chang-Hong / Chou, Tung-Huan / Chen, Min-Cheng / Huang, Jung Y. et al. | 2012
- 33.7.1
-
Electromigration extendibility of Cu(Mn) alloy-seed interconnects, and understanding the fundamentalsNogami, T. / Penny, C. / Madan, A. / Parks, C. / Li, J. / Flaitz, P. / Uedono, A. / Chiang, S. / He, M. / Simon, A. et al. | 2012
- 33.8.1
-
A 90nm CMOS integrated Nano-Photonics technology for 25Gbps WDM optical communications applicationsAssefa, Solomon / Shank, Steven / Green, William / Khater, Marwan / Kiewra, Edward / Reinholm, Carol / Kamlapurkar, Swetha / Rylyakov, Alexander / Schow, Clint / Horst, Folkert et al. | 2012