340 mV-1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS (English)

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This paper describes an on-die lightweight nanoAES hardware accelerator, fabricated in 22 nm tri-gate high-k/metal-gate CMOS, targeted for ultra-low power symmetric-key encryption and decryption on mobile SOCs. Compared to conventional 128 bit AES implementations, this design uses a single 8 bit Sbox circuit along with ShiftRows byte-order data processing to compute all AES rounds in native GF(2 4 ) 2 composite-field. This approach along with a serial-accumulating MixColumns circuit, area-optimized encrypt and decrypt Galois-field polynomials and integrated on-the-fly key generation circuit results in a compact encrypt/decrypt layout occupying 2200/2736 μm 2 and lowest-reported gate count of 1947/2090 respectively, while achieving: (i) maximum operating frequency of 1.133 GHz and total power consumption of 13 mW with leakage component of 500 μW, measured at 0.9 V, 25 °C, (ii) nominal AES-128 encrypt/decrypt throughput of 432/671 Mbps respectively, with peak energy-efficiency of 289 Gbps/W measured at near-threshold operation of 430 mV (11 ×higher than previously reported implementations), (iii) encrypt/decrypt latencies of 336/216 cycles and total energy consumption of 3.9/2.5 nJ respectively, (iv) wide operating supply voltage range with robust sub-threshold voltage performance of 45 Mbps, 170 μW, measured at 340 mV, 25 °C and (v) first-reported Galois-field polynomial-based micro-architectural co-optimization, resulting in distinct area-optimized encrypt and decrypt polynomials with up to 9% area reduction at iso-performance.

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15th European Solid-State Circuits Conference. ESSCIRC '89, 20-22 Sept. 1989, Vienna, Austria
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1
An 802.11a/b/g/n Digital Fractional-N PLL With Automatic TDC Linearity Calibration for Spur Cancellation
Liao, Dongyi / Wang, Hechen / Dai, Fa Foster / Xu, Yang / Berenguer, Roc / Hermoso, Sara Munoz | 2017
1
An Energy-Efficient Miniaturized Intracranial Pressure Monitoring System
Ghanbari, Mohammad Meraj / Tsai, Julius M / Nirmalathas, Ampalavanapillai / Muller, Rikky / Gambini, Simone | 2017
1
A 36-V 49% Efficient Hybrid Charge Pump in Nanometer-Scale Bulk CMOS Technology
Ismail, Yousr / Lee, Haechang / Pamarti, Sudhakar / Yang, Chih-Kong Ken | 2017
1
Pole-Converging Intrastage Bandwidth Extension Technique for Wideband Amplifiers
Feng, Guangyin / Boon, Chirn Chye / Meng, Fanyi / Yi, Xiang / Yang, Kaituo / Li, Chenyang / Luong, Howard C | 2017
1
A Fully Integrated Reconfigurable Self-Startup RF Energy-Harvesting System With Storage Capability
Abouzied, Mohamed A / Ravichandran, Krishnan / Sanchez-Sinencio, Edgar | 2016
1
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC
Kim, Shinwoong / Hong, Seunghwan / Chang, Kapseok / Ju, Hyungsik / Shin, Jaewook / Kim, Byungsub / Park, Hong-June / Sim, Jae-Yoon | 2015
1
A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition
Shu, Guanghua / Choi, Woo-Seok / Saxena, Saurabh / Talegaonkar, Mrunmay / Anand, Tejasvi / Elkholy, Ahmed / Elshazly, Amr / Hanumolu, Pavan Kumar | 2015
1
Author Index
| 1999
1
Editor's Notice (March 1967)
Meindl, J.D. | 1967
1
Table of contents (September 1966)
| 1966
1
Foreword (February 1971)
| 1971
1
SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping
de Streel, Guerric / Stas, Francois / Gurne, Thibaut / Durant, Francois / Frenkel, Charlotte / Cathelin, Andreia / Bol, David | 2017
1
Low-power BiCMOS optical receiver with voltage-controlled transimpedance
Tadic, N. / Zimmermann, H. | 2007
1
A 160 dB equivalent dynamic range auto-scaling interface for resistive gas sensors arrays
Grassi, M. / Malcovati, P. / Baschirotto, A. | 2007
1
A 50-Gbit/s 450-mW full-rate 4:1 multiplexer with multiphase clock architecture in 0.13-micrometer InP HEMT technology
Suzuki, T. / Kawano, Y. / Nakasha, Y. / Yamaura, S. / Takahashi, T. / Makiyama, K. / Hirose, T. | 2007
1
Efficient Digital Quadrature Transmitter Based on IQ Cell Sharing
Jin, Hadong / Kim, Dongsu / Kim, Bumman | 2017
1
An Ultra-Wideband IF Millimeter-Wave Receiver With a 20 GHz Channel Bandwidth Using Gain-Equalized Transformers
Rudell, Jacques Christophe / Bhagavatula, Venumadhav / Zhang, Tong / Suvarna, Apsara Ravish | 2016
1
A 7.2 mW 75.3 dB SNDR 10 MHz BW CT Delta-Sigma Modulator Using Gm-C-Based Noise-Shaped Quantizer and Digital Integrator
Kim, Taewook / Han, Changsok / Maghari, Nima | 2016
1
Low leakage SOI CMOS static memory cell with ultra-low power diode
Levacq, D. / Dessard, V. / Flandre, D. | 2007
1
A 24 μ W, Batteryless, Crystal-free, Multinode Synchronized SoC "Bionode" for Wireless Prosthesis Control
Bhamra, Hansraj / Kim, Young-Joon / Joseph, Jithin / Lynch, John / Gall, Oren Z / Mei, Henry / Meng, Chuizhou / Tsai, Jui-Wei / Irazoqui, Pedro | 2015
1
A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS
Rahman, Wahid / Yoo, Danny / Liang, Joshua / Sheikholeslami, Ali / Tamura, Hirotaka / Shibasaki, Takayuki / Yamaguchi, Hisakatsu | 2017
1
An Efficient SSHI Interface With Increased Input Range for Piezoelectric Energy Harvesting Under Variable Conditions
Du, Sijun / Jia, Yu / Do, Cuong D / Seshia, Ashwin A | 2016
1
A 1.3 nJ/b IEEE 802.11ah Fully-Digital Polar Transmitter for IoT Applications
Ba, Ao / Liu, Yao-Hong / van den Heuvel, Johan / Mateman, Paul / Busze, Benjamin / Dijkhuis, Johan / Bachmann, Christian / Dolmans, Guido / Philips, Kathleen / De Groot, Harmke | 2016
1
A Ratiometric Readout Circuit for Thermal-Conductivity-Based Resistive CO₂ Sensors
Cai, Zeyu / van Veldhoven, Robert H. M / Falepin, Annelies / Suy, Hilco / Sterckx, Eric / Bitterlich, Christian / Makinwa, Kofi A. A / Pertijs, Michiel A. P | 2016
1
A ReRAM-Based 4T2R Nonvolatile TCAM Using RC-Filtered Stress-Decoupled Scheme for Frequent-OFF Instant-ON Search Engines Used in IoT and Big-Data Processing
Chang, Meng-Fan / Huang, Lie-Yue / Wen-Zhang-Lin / Chiang, Yen-Ning / Kuo, Chia-Chen / Chuang, Ching-Hao / Yang, Keng-Hao / Tsai, Hsiang-Jen / Chen, Tien-Fu / Sheu, Shyh-Shyuan | 2016
1
Optical Pixel Sensor of Hydrogenated Amorphous Silicon Thin-Film Transistor Free of Variations in Ambient Illumination
Lin, Chih-Lung / Wu, Chia-En / Chen, Po-Syun / Lai, Po-Cheng / Yu, Jian-Shen / Chang, Chun / Tseng, Ya-Hui | 2016
1
A Performance-Aware Low-Quiescent Headphone Amplifier in 65-nm CMOS
Xiao, Fei / Chan, Pak Kwong | 2016
1
Watt-Level mm-Wave Power Amplification With Dynamic Load Modulation in a SiGe HBT Digital Power Amplifier
Datta, Kunal / Hashemi, Hossein | 2016
1
A High-Gain mm-Wave Amplifier Design: An Analytical Approach to Power Gain Boosting
Bameri, Hadi / Momeni, Omeed | 2017
1
Low-Power CMOS Vision Sensor for Gaussian Pyramid Extraction
Suarez, Manuel / Brea, Victor Manuel / Fernandez-Berni, Jorge / Carmona-Galan, Ricardo / Cabello, Diego / Rodriguez-Vazquez, Angel | 2016
1
5.6 Mb/mm² 1R1W 8T SRAM Arrays Operating Down to 560 mV Utilizing Small-Signal Sensing With Charge Shared Bitline and Asymmetric Sense Amplifier in 14 nm FinFET CMOS Technology
Kulkarni, Jaydeep P / Keane, John / Koo, Kyung-Hoae / Nalam, Satyanand / Guo, Zheng / Karl, Eric / Zhang, Kevin | 2016
1
A Digitally Intensive Transmitter/PA Using RF-PWM With Carrier Switching in 130 nm CMOS
Gharpurey, Ranjit / Cho, Kunhee | 2016
1
A 260 MHz IF Sampling Bit-Stream Processing Digital Beamformer With an Integrated Array of Continuous-Time Band-Pass $\Delta \Sigma $ Modulators
Jeong, Jaehun / Collins, Nicholas / Flynn, Michael P | 2016
1
A 0.56-2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G-4G Multistandard Cellular Transceivers
Tak, Geum-Young / Lim, Younghyun / Ho, Yo-Chuol / Choi, Jaehyouk / Yoon, Heein / Kim, Hong-Teuk / Lee, Yongsun | 2016
1
Solid-State Circuits Newsletter
| 1996
1
Editor's Notice (February 1970)
| 1970
1
Table of contents (February 1983)
| 1983
1
Table of contents (February 1979)
| 1979
1
Table of contents (February 1984)
| 1984
1
Table of contents (February 1978)
| 1978
1
Table of contents (February 1986)
| 1986
1
Table of contents (February 1980)
| 1980
1
Table of contents (February 1982)
| 1982
1
Foreword (February 1972)
| 1972
1
IEEE 2003 ISSCC: Analog, Wireless Communications, Wireless and RF Communications, and Imagers, MEMS, and Displays
| 2003
1
Editor's Notice (February 1969)
| 1969
1
Characterization of surface channel CCD image arrays at low light levels
White, M.H. / Lampe, D.R. / Blaha, F.C. / Mack, I.A. | 1974
1
A 40-Gb/s SiGe-BiCMOS MZM Driver With 6-Vp-p Output and On-Chip Digital Calibration
Vera, Leonardo / Long, John R | 2016
1
A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection
Du, Yuan / Cho, Wei-Han / Huang, Po-Tsang / Li, Yilei / Wong, Chien-Heng / Du, Jieqiong / Kim, Yanghyo / Hu, Boyu / Du, Li / Liu, Chunchen et al. | 2016
1
A ±36-A Integrated Current-Sensing System With a 0.3% Gain Error and a 400-μA Offset From .55 °C to +85 °C
Shalmany, Saleh Heidary / Draxelmayr, Dieter / Makinwa, Kofi A. A | 2017
1
Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS
Onuki, Tatsuya / Uesugi, Wataru / Isobe, Atsuo / Ando, Yoshinori / Okamoto, Satoru / Kato, Kiyoshi / Yew, Tri Rung / Wu, J. Y / Shuai, Chi Chang / Wu, Shao Hui et al. | 2017
1
A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage
Briseno-Vidrios, Carlos / Edward, Alexander / Shafik, Ayman / Palermo, Samuel / Silva-Martinez, Jose | 2017
1
8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration
Oike, Yusuke / Akiyama, Kentaro / Hung, Luong D / Niitsuma, Wataru / Kato, Akihiko / Sato, Mamoru / Kato, Yuri / Nakamura, Wataru / Shiroshita, Hiroshi / Sakano, Yorito et al. | 2017
1
A 0.9 μm² 1T1R Bit Cell in 14 nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming
Chen, Zhanping / Kulkarni, Sarvesh H / Dorgan, Vincent E / Rajarshi, Salil Manohar / Jiang, Lei / Bhattacharya, Uddalak | 2017
1
A 20-pW Discontinuous Switched-Capacitor Energy Harvester for Smart Sensor Applications
Wu, Xiao / Shi, Yao / Jeloka, Supreet / Yang, Kaiyuan / Lee, Inhee / Lee, Yoonmyung / Sylvester, Dennis / Blaauw, David | 2017
1
High-Breakdown, High-fmax Multiport Stacked-Transistor Topologies for the W-Band Power Amplifiers
Datta, Kunal / Hashemi, Hossein | 2017
1
An AC Input Switching-Converter-Free LED Driver With Low-Frequency-Flicker Reduction
Gao, Yuan / Li, Lisong / Mok, Philip K. T | 2017
1
A 60-GHz Dual-Vector Doherty Beamformer
Greene, Kevin / Sarkar, Anirban / Floyd, Brian | 2017
1
A 160 × 120 Pixel Analog-Counting Single-Photon Imager With Time-Gating and Self-Referenced Column-Parallel A/D Conversion for Fluorescence Lifetime Imaging
Perenzoni, Matteo / Massari, Nicola / Perenzoni, Daniele / Gasparini, Leonardo / Stoppa, David | 2015
1
A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation
Sinangil, Mahmut E / Poulton, John W / Fojtik, Matthew R / Greer III, Thomas H / Tell, Stephen G / Gotterba, Andreas J / Wang, Jesse / Golbus, Jason / Zimmer, Brian / Dally, William J et al. | 2015
1
Wideband Mixed-Domain Multi-Tap Finite-Impulse Response Filtering of Out-of-Band Noise Floor in Watt-Class Digital Transmitters
Bhat, Ritesh / Zhou, Jin / Krishnaswamy, Harish | 2017
1
An 18 nA, 87% Efficient Solar, Vibration and RF Energy-Harvesting Power Management System With a Single Shared Inductor
Chowdary, Gajendranath / Singh, Arun / Chatterjee, Shouri | 2016
1
A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS
Dong, Yunzhi / Zhao, Jialin / Yang, Wenhua / Caldwell, Trevor / Shibata, Hajime / Li, Zhao / Schreier, Richard / Meng, Qingdong / Silva, Jose B / Paterson, Donald et al. | 2016
1
A 1 A, Dual-Inductor 4-Output Buck Converter With 20 MHz/100 MHz Dual-Frequency Switching and Integrated Output Filters in 65 nm CMOS
Jiang, Yongjie / Fayed, Ayman | 2016
1
A High-Swing 45 Gb/s Hybrid Voltage and Current-Mode PAM-4 Transmitter in 28 nm CMOS FDSOI
Bassi, Matteo / Radice, Francesco / Bruccoleri, Melchiorre / Erba, Simone / Mazzanti, Andrea | 2016
1
A Time-Interleaved Ring-VCO with Reduced 1/f³ Phase Noise Corner, Extended Tuning Range and Inherent Divided Output
Yin, Jun / Mak, Pui-In / Maloberti, Franco / Martins, Rui P | 2016
1
A 2.89 μW Dry-Electrode Enabled Clockless Wireless ECG SoC for Wearable Applications
Zhang, Xiaoyang / Zhang, Zhe / Li, Yongfu / Liu, Changrong / Guo, Yong Xin / Lian, Yong | 2016
1
A 32 Gb/s Bidirectional 4-channel 4 pJ/b Capacitively Coupled Link in 14 nm CMOS for Proximity Communication
Thakkar, Chintan / Sen, Shreyas / Jaussi, James / Casper, Bryan | 2016
1
Frequency-Translational Quadrature-Hybrid Receivers for Very-Low-Noise, Frequency-Agile, Scalable Inter-Band Carrier Aggregation
Zhu, Jianxun / Kinget, Peter R | 2016
1
A 50 nW-to-10 mW Output Power Tri-Mode Digital Buck Converter With Self-tracking Zero Current Detection for Photovoltaic Energy Harvesting
Chen, Po-Hung / Wu, Chung-Shiang / Lin, Kai-Chun | 2016
1
A 60 GHz CMOS Full-Duplex Transceiver and Link with Polarization-Based Antenna and RF Cancellation
Krishnaswamy, Harish / Dinc, Tolga / Chakrabarti, Anandaroop | 2016
1
Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm
Luria, Kosta / Zelikson, Michael / Lyakhov, Alex / Shor, Joseph | 2016
1
A Successive-Approximation Switched-Capacitor DC-DC Converter With Resolution of $V_{\text{IN}}/{2^N}$ for a Wide Range of Input and Output Voltages
Blaauw, David / Bang, Suyoung / Sylvester, Dennis | 2016
1
A 4.7 T/11.1 T NMR Compliant 50 nW Wirelessly Programmable Implant for Bioartificial Pancreas In Vivo Monitoring
Bashirullah, Rizwan / Turner, Walker J | 2016
1
An EEG Acquisition and Biomarker-Extraction System Using Low-Noise-Amplifier and Compressive-Sensing Circuits Based on Flexible, Thin-Film Electronics
Moy, Tiffany / Huang, Liechao / Rieutort-Louis, Warren / Wu, Can / Cuff, Paul / Wagner, Sigurd / Sturm, James C / Verma, Naveen | 2016
1
A 0.4 μg Bias Instability and 1.2 μg/√Hz Noise Floor MEMS Silicon Oscillating Accelerometer With CMOS Readout Circuit
Wang, Xi / Zhao, Jian / Zhao, Yang / Xia, Guo Ming / Qiu, An Ping / Su, Yan / Xu, Yong Ping | 2016
1
Special Issue on High-Speed Circuits: 2002 GaAs IC Symposium
| 2003
1
Foreword (February 1985)
| 1985
1
A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET
Im, Jay / Freitas, Dave / Roldan, Arianne Bantug / Casey, Ronan / Chen, Stanley / Chou, Chuen-Huei Adam / Cronin, Tim / Geary, Kevin / McLeod, Scott / Zhou, Lei et al. | 2017
1
Time-Divided Spread-Spectrum Code-Based 400 fW-Detectable Multichannel fNIRS IC for Portable Functional Brain Imaging
Hwang, Gunpil / Choi, Min-Gyu / Bae, Hyeon-Min / Yang, Jaehyeok / Choi, Jong-Kwan / Kim, Jae-Myoung | 2016
1
A 77 GHz Frequency Doubling Two-Path Phased-Array FMCW Transceiver for Automotive Radar
Jia, Haikun / Kuang, Lixue / Zhu, Wei / Wang, Zhiping / Ma, Feng / Wang, Zhihua / Chi, Baoyong | 2016
1
A 1000 frames/s Vision Chip Using Scalable Pixel-Neighborhood-Level Parallel Processing
Schmitz, Joseph A / Gharzai, Mahir K / Balkir, Sina / Hoffman, Michael W / White, Daniel J / Schemm, Nathan | 2016
1
A Full-Duplex Single-Chip Transceiver With Self-Interference Cancellation in 0.13 μm SiGe BiCMOS for Electron Paramagnetic Resonance Spectroscopy
Yang, Xuebei / Babakhani, Aydin | 2016
1
A 9-bit 1.8 GS/s 44 mW Pipelined ADC Using Linearized Open-Loop Amplifiers
Yu, Lilan / Miyahara, Masaya / Matsuzawa, Akira | 2016
1
A 12-Bit 2 GS/s Dual-Rate Hybrid DAC With Pulse-Error Pre-Distortion and In-Band Noise Cancellation Achieving >74 dBc SFDR and <-80 dBc IM3 up to 1 GHz in 65 nm CMOS
Su, Shiyu / Chen, Mike Shuo-Wei | 2016
1
Adaptive Comparator Bias-Current Control of 0.6 V Input Boost Converter for ReRAM Program Voltages in Low Power Embedded Applications
Ishii, Tomoya / Ning, Sheyang / Tanaka, Masahiro / Tsurumi, Kota / Takeuchi, Ken | 2016
1
1-V rail-to-rail CMOS OpAmp with improved bulk-driven input stage
Carrillo, J.M. / Torelli, G. / Perez-Aloe, R. / Duque-Carrillo, J.F. | 2007
1
A Self-Powered 50-Mb/s OOK Transmitter for Optoisolator LED Emulation
Mallia, S. Sreenivasa / Sreeram, N. S / Adinarayana, Sudhir / Aniruddhan, Sankaran | 2017
1
A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR
Duncan, Lucas / Dupaix, Brian / McCue, Jamin J / Mathieu, Brandon / LaRue, Matthew / Patel, Vipul J / Teshome, Mesfin / Choe, Myung-Jun / Khalil, Waleed | 2017
1
A 0.7-V 0.6-μW 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction
Chen, Long / Tang, Xiyuan / Sanyal, Arindam / Yoon, Yeonam / Cong, Jie / Sun, Nan | 2017
1
3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop
Bae, Sang-Geun / Kim, Yongtae / Park, Yunsoo / Kim, Chulwoo | 2016
1
A BJT-Based Temperature-to-Digital Converter With ±60 mK (3σ) Inaccuracy From -55°C to +125 °C in 0.16 μm CMOS
Yousefzadeh, Bahman / Shalmany, Saleh Heidary / Makinwa, Kofi A. A | 2017
1
A 23-mW 24-GS/s 6-bit Voltage-Time Hybrid Time-Interleaved ADC in 28-nm CMOS
Xu, Benwei / Zhou, Yuan / Chiu, Yun | 2017
1
An Energy-Efficient Precision-Scalable ConvNet Processor in a 40-nm CMOS
Moons, Bert / Verhelst, Marian | 2017
1
A Low-Power Microcontroller in a 40-nm CMOS Using Charge Recycling
Blutman, Kristof / Kapoor, Ajay / Majumdar, Arjun / Martinez, Jacinto Garcia / Echeverri, Juan / Sevat, Leo / van der Wel, Arnoud P / Fatemi, Hamed / Makinwa, Kofi A. A / de Gyvez, Jose Pineda | 2017
2
Editor's Note (February 1977)
| 1977
2
Integrated circuits for a real-time large-vocabulary continuous speech recognition system
Stolzle, A. / Narayanaswamy, S. / Murveit, H. / Rabaey, J.M. / Brodersen, R.W. | 1991
2
Electronic Publishing in the JOURNAL
Abidi, A.A. | 1993
2
Definitions of Terms for Integrated Electronics
Meindl, J.D. | 1967
2
A 5-mW sigma-delta modulator with 84-dB dynamic range for GSM/EDGE
Oliaei, O. / Clement, P. / Gorisse, P. | 2002
2
Voluntary page charges (February 1969)
| 1969
2
Preface (February 1970)
| 1970
2
The Multi-tanh Principle: A Tutorial Overview
Gilbert, B. | 1998
2
A High-Density Data-Path Generator with Stretchable Cells
Tsujihashi, Y. / Matsumoto, H. / Nishimaki, H. / Miyanishi, A. / Nakao, H. / Kitada, O. / Iwade, S. / Kayano, S. / Sakao, M. | 1994
2
Introduction (September 1966)
Ghandi, S.K. | 1966
2
Analog ALC crystal oscillators for high-temperature applications
Bianchi, R.A. / Karam, J.M. / Courtois, B. | 2000
2
Conferences and Workshops Sponsored by the IEEE Solid-State Circuits Council
Abidi, A.A. | 1995
2
Foreword (February 1973
| 1973
2
Foreword (February 1983)
| 1983
2
PAPERS - Analog ALC Crystal Oscillators for High-Temperature Applications
Bianchi, R.A. / Karam, J.M. / Courtois, B. | 2000
2
Introduction to the Special Issue
Shenai, K. | 1996
3
New Associate Editors
Flynn, Michael P. | 2015
3
Introduction to the Special Issue on the 2007 IEEE International Solid-State Circuits Conference
Harris, David Money / Natarajan, Sreedhar / Krishnamurthy, Ram K. / Narendra, Siva Gurusami | 2008
3
Introduction (February 1979)
| 1979
3
EDITORIAL - Introduction to the Special Issue on the 2005 IEEE International Solid-State Circuits Conference
Spiegel, J.Van der / Krishnamurthy, R.K. / Natarajan, S. / Yang, C.-K.K. | 2006
3
Introduction to the January Special Issue on the 2017 IEEE International Solid-State Circuits Conference
Bowman, Keith A. / Khellah, Muhammad M. / Kono, Takashi / Shor, Joseph / Mak, Pui-In | 2018
3
Introduction to the Special Issue on the 2018 International Solid-State Circuits Conference (ISSCC)
Frans, Yohan / Dehaene, Wim / Motomura, Masato / Bae, Seung-Jun | 2019
3
Introduction (February 1978
| 1978
3
Introduction to the Special Issue on the 2005 IEEE International Solid-State Circuits Conference
VanderSpiegel, J. / Krishnamurthy, R.K. / Natarajan, S. / Yang, C.-K. | 2006
3
Introduction to the Special Issue on the ISSCC2004
Konstadinidis, G.K. / Chandrakasan, A. / Natarajan, S. / Xanthopoulos, T. | 2005
03
IEEE Journal of Solid-State Circuits Information for authors
| 2004
3
Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC)
Gerfers, Friedel / Hsieh, Ping-Hsuan / Markovc, Dejan / Deguchi, Jun / Karl, Eric | 2021
3
A 5-MHz IF Digital FM Demodulator
Park, J. / Joe, E. / Choe, M.-J. / Song, B.-S. | 1999
3
Introduction to the Special Issue on the 2009 IEEE International Solid-State Circuits Conference
Alvandpour, Atila / Arimoto, Kazutami / Cantatore, Eugenio / Zhang, Kevin | 2010
3
Introduction to the Special Issue on the 2006 IEEE International Solid-State Circuits Conference
Warnock, James D. / Bidermann, William R. / Van Der Werf, Albert / Sato, Katsuyuki | 2007
3
Introduction to the January Special Issue on the 2015 IEEE International Solid-State Circuits Conference
Beigne, Edith / Shin, Jinuk Luke / Oike, Yusuke / Kim, Chulwoo / Genoe, Jan | 2016
3
Foreword (September 1966)
Meindl, J.D. | 1966
3
PAPERS - A 5-MHz IF Digital FM Demodulator
Park, J. / Joe, E. / Choe, M.-J. / Song, B.-S. | 1999
3
New Associate Editor
Flynn, Michael P. | 2014
3
Introduction to the Special Issue on the 2010 IEEE International Solid-State Circuits Conference
Arimoto, Kazutami / Takeuchi, Ken / Karnik, Tanay / Makinwa, Kofi A. A. / Burdett, Alison | 2011
3
Introduction to the Special Issue on the 2012 IEEE International Solid-State Circuits Conference
Ortmanns, Maurits / Fischer, Timothy / Ko, Uming / Dehaene, Wim / Takai, Yasuhiro | 2013
3
Transistor Schottky-barrier-diode integrated logic circuit
Tarui, Y. / Hayashi, Y. / Teshima, H. / Sekigawa, T. | 1969
3
A Trapping Mechanism for Autodoping in Silicon Epitaxy - I. Theory
Man Wong, / Reif, R. | 1985
3
Introduction to the January Special Issue on the 2016 IEEE International Solid-State Circuits Conference
Sylvester, Dennis / Markovic, Dejan / Genov, Roman / Kawasumi, Atsushi / Mitra, Subhasish | 2017
3
Introduction to the Special Issue on the 2011 IEEE International Solid-State Circuits Conference
Wang, A / Takeuchi, K / Karnik, T / Ghovanloo, M / Shigematsu, S | 2012
3
Integrated electrically tuned X-band power amplifier utilizing Gunn and IMPATT diodes
Hanson, D.C. / Heinz, W.W. | 1973
3
Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference
Ham, Donhee / Hidaka, Hideto / Ho, Ron / Krishnamurthy, Ram K. | 2009
3
Foreword (February 1986)
| 1986
3
A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique
Cheung Fai Lee, / Mok, P.K.T. | 2004
3
Foreword: Joint Special Issue on Charge-Transfer Devices
| 1976
3
Foreword (February 1984)
| 1984
3
Special Issue on High-Speed Circuits: 2002 Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)
| 2003
4
High Q Inductors for Wireless Applications in a Complementary Silicon Bipolar Process
Ashby, K.B. / Koullias, I.A. / Finley, W.C. / Bastek, J.J. / Moinian, S. | 1996
4
Highlights of the IEEE ISSCC 2014 Processors, Digital, Memory, Biomedical & Next-Generation Systems Technologies, and Imagers, MEMS, Medical & Displays Sessions
De, Vivek / Kosonocky, Stephen / Chang, Jonathan / Ramadass, Yogesh K. / Stoppa, David | 2015
4
Six-Terminal MOSFET's: Modeling and Applications in Highly Linear, Electronically Tunable Resistors
Vavelidis, K. / Tsividis, Y.P. / Eynde, F.Op't / Papananos, Y. | 1997
4
High-gain SiGe transimpedance amplifier array for a 12/spl times/10 Gb/s parallel optical-fiber link
Schild, A. / Rein, H.-M. / Mullrich, J. / Altenhain, L. / Blank, J. / Schrodinger, K. | 2003
4
BiCMOS Circuit Technology for High-Speed DRAM's
Watanabe, S. / Sakui, K. / Fuse, T. / Hara, T. / Aritome, S. / Hieda, K. | 1993
4
A 300 MHz Digital Double-Sideband to Single-Sideband Converter in 1 �m CMOS
Hawley, R. A. / Lin, T. / Samueli, H. | 1995
4
An Integrating Digital Light Meter
Murphy, H.E. / Kabell, L.J. | 1966
4
Highlights of the ISSCC 2013 Processors and High Performance Digital Sessions
Fischer, Timothy / Nam, Byeong-Gyu / Chang, Leland / Kuroda, Tadahiro / Pertijs, Michiel A. P. | 2014
4
An Integrated 4-GHz Balanced Transistor Amplifier
Saunders, T.E. / Stark, P.D. | 1967
4
Best Paper Award
| 2001
4
A 300 MHz Digital Double-Sideband to Single-Sideband Converter in 1 mm CMOS
Hawley, R.A. / Lin, T. / Samueli, H. | 1995
4
A CORDIC Arithmetic Processor Chip
Haviland, G.L. / Tuszynski, A.A. | 1980
4
High-Gain SiGe Transimpedance Amplifier Array for a 12 x 10 Gb/s Parallel Optical-Fiber Link
Schild, A. / Rein, H.-M. / Mullrich, J. / Altenhain, L. / Blank, J. / Schrodinger, K. | 2003
4
A Compact, Flexible LPC Vocoder Based on a Commercial Signal Processing Microcomputer
Feldman, J.A. / Hofstetter, E.M. / Malpass, M.L. | 1983
4
Self-checking self-repairing computer nodes using the Mirror Processor
Tamir, Y. | 1992
4
A 300 MHz digital double-sideband to single-sideband converter in 1 micron CMOS
Hawley, R.A. / Lin, T. / Samueli, H. | 1995
5
Perspective on BiCMOS VLSIs
Kubo, M. / Masuda, I. / Miyata, K. / Ogiue, K. | 1988
5
Architecture, design, and test of continuous-time tunable intermediate-frequency bandpass delta-sigma modulators
Raghavan, G. / Jensen, J.F. / Laskowski, J. / Kardos, M. / Case, M.G. / Sokolich, M. / Thomas, S. | 2001
5
A subnanosecond 2000 gate array with ECL 100K compatibility
Sato, F. / Takahashi, T. / Misawa, H. / Kimura, K. | 1984
5
PAPERS - Architecture, Design, and Test of Continuous-Time Tunable Intermediate-Frequency Bandpass Delta-Sigma Modulators
Raghavan, G. / Jensen, J.F. / Laskowski, J. / Kardos, M. / Case, M.G. / Sokolich, M. / Thomas III, S. | 2001
6
A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOS
Depaoli, Emanuele / Zhang, Hongyang / Mazzini, Marco / Audoglio, Walter / Rossi, Augusto Andrea / Albasini, Guido / Pozzoni, Massimo / Erba, Simone / Temporiti, Enrico / Mazzanti, Andrea | 2019
6
DIGITAL - Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip
Nawathe, U.G. / Hassan, M. / Yen, K.C. / Kumar, A. / Ramachandran, A. / Greenhill, D. | 2008
6
Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip
Nawathe, U.G. / Hassan, M. / Yen, K.C. / Kumar, A. / Ramachandran, A. / Greenhill, D. | 2008
7
A 45 nm 8-Core Enterprise Xeon Processor Digital Object Identifier: 10.1109/JSSC.2009.2034076
Rusu, S. / Tam, S. / Muljono, H. / Stinson, J. / Ayers, D. / Chang, J. / Varada, R. / Ratta, M. / Kottapalli, S. / Vora, S. | 2010
7
A 45 nm 8-Core Enterprise Xeon¯ Processor
Rusu, S. / Tam, S. / Muljono, H. / Stinson, J. / Ayers, D. / Chang, J. / Varada, R. / Ratta, M. / Kottapalli, S. / Vora, S. | 2010
7
A Power-Efficient High-Throughput 32-Thread SPARC Processor
Leon, A.S. / Tam, K.W. / Shin, J.L. / Weisner, D. / Schumacher, F. | 2007
7
DIGITAL - A Power-Efficient High-Throughput 32-Thread SPARC Processor
Leon, A.S. / Tam, K.W. / Shin, J.L. / Weisner, D. / Schumacher, E. | 2007
7
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor
Konstadinidis, G.K. / Tremblay, M. / Chaudhry, S. / Rashid, M. / Lai, P.F. / Otaguro, Y. / Orginos, Y. / Parampalli, S. / Steigerwald, M. / Gundala, S. et al. | 2009
7
Simplified bipolar technology and its application to systems
Murphy, B.T. / Neville, S.M. / Pedersen, R.A. | 1970
7
A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET
Im, Jay / Zheng, Kevin / Chou, Chuen-Huei Adam / Zhou, Lei / Kim, J. W. / Chen, Stanley / Wang, Y. / Hung, H.-W. / Tan, K. / Lin, W. et al. | 2021
7
A dual-core 64-bit ultraSPARC microprocessor for dense server applications
Takayanagi, T. / Shin, J.L. / Petrick, B. / Su, J.Y. / Levy, H. / Ha Pham, / Son, J. / Moon, N. / Bistry, D. / Nair, U. et al. | 2005
7
Monolithic above-IC resonator technology for integrated architectures in mobile and wireless communication
Dubois, M.-A. / Carpentier, J.-F. / Vincent, P. / Billard, C. / Parat, G. / Muller, C. / Ancey, P. / Conti, P. | 2006
7
A per-channel LSI codec for PCM communications
Yano, K. / Amano, H. / Nakajima, M. / Shimizu, H. | 1979
7
HIGH-PERFORMANCE DIGITAL PAPERS - A 45 nm 8-Core Enterprise Xeon® Processor
Rusu, S / Tam, S / Muljono, H / Stinson, J / Ayers, D / Chang, J / Varada, R / Ratta, M / Kottapalli, S / Vora, S | 2010
7
A wide-band class AB monolithic power amplifier
Meyer, R.G. / Mack, W.D. | 1989
7
TECHNOLOGY DIRECTIONS - Monolithic Above-IC Resonator Technology for Integrated Architectures in Mobile and Wireless Communication
Dubois, M.-A. / Carpentier, J.-F. / Vincent, P. / Billard, C. / Parat, G. / Muller, C. / Ancey, P. / Conti, P. | 2006
7
DIGITAL PAPERS - A Dual-Core 64-bit UltraSPARC Microprocessor for Dense Server Applications
Takayanagi, T. / Shin, J.L. / Petrick, B. / Su, J.Y. / Levy, H. / Pham, H. / Son, J. / Moon, N. / Bistry, D. | 2005
8
Analysis of Electrothermal Integrated Circuits
Gray, P.R. / Hamilton, D.J. | 1971
8
A 0.0021 mm2 1.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS
Zhu, Junheng / Nandwana, Romesh Kumar / Shu, Guanghua / Elkholy, Ahmed / Kim, Seong Joong / Hanumolu, Pavan Kumar | 2017
8
Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE
Studer, C / Benkeser, C / Belfanti, S / Quiting Huang, | 2011
8
A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for Supply Voltage Droop Tolerance Across a Wide Operating Range
Bowman, Keith A. / Raina, Sarthak / Bridges, J. Todd / Yingling, Daniel J. / Nguyen, Hoan H. / Appel, Brad R. / Kolla, Yesh N. / Jeong, Jihoon / Atallah, Francois I. / Hansquine, David W. | 2016
8
ENERGY EFFICIENT DIGITAL PAPERS - A Highly Parallel and Scalable CABAC Decoder for Next Generation Video Coding
Sze, V / Chandrakasan, A P | 2012
8
A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS
Krishnamurthy, Harish K. / Vaidya, Vaibhav / Kumar, Pavan / Jain, Rinkle / Weng, Sheldon / Kim, Stephen T. / Matthew, George E. / Desai, Nachiket / Liu, Xiaosen / Ravichandran, Krishnan et al. | 2018
8
A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control
Lutkemeier, Sven / Jungeblut, Thorsten / Berge, Hans Kristian Otnes / Aunet, Snorre / Porrmann, Mario / Ruckert, Ulrich | 2013
8
LOW-POWER DIGITAL PAPERS Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE
Studer, C / Benkeser, C / Belfanti, S / Huang, Q | 2011
8
An Integrated Temperature Sensor-Controller
Prosser, T.F. | 1966
8
ENERGY EFFICIENT DIGITAL - A 65 nm 32b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control
Lütkemeier, S / Jungeblut, T / Berge, H K O / Aunet, S / Porrmann, M / Rückert, U | 2013
8
A Highly Parallel and Scalable CABAC Decoder for Next Generation Video Coding
Sze, V. / Chandrakasan, A. P. | 2012
9
Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module
Warnock, James / Chan, Yuen / Harrer, Hubert / Carey, Sean / Salem, Gerard / Malone, Doug / Puri, Ruchir / Zitz, Jeffrey A. / Jatkowski, Adam / Strevig, Gerald et al. | 2014
9
Offset Compensating Bit-Line Sensing Scheme for High Density DRAM's
Watanabe, Y. / Nakamura, N. / Watanabe, S. | 1994
9
A Trapping Mechanism for Autodoping in Silicon Epitaxy - II. Parameter Extraction and Simulations
Man Wong, / Reif, R. / Srinivasan, G.R. | 1985
10
A gallium arsenide SDFL gate array with on-chip RAM
Vu, T.T. / Roberts, P.C.T. / Nelson, R.D. / Lee, G.M. / Hanzal, B.R. / Lee, K.W. / Zafar, N. / Lamb, D.R. / Helix, M.J. / Jamison, S.A. et al. | 1984
10
A Wide-Band, Low-Power, High Slew Rate Voltage-Feedback Operational Amplifier
Moraveji, F. | 1996
10
The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking
Fluhr, Eric J. / Baumgartner, Steve / Boerstler, David / Bulzacchelli, John F. / Diemoz, Timothy / Dreps, Daniel / English, George / Friedrich, Joshua / Gattiker, Anne / Gloekler, Tilman et al. | 2015
10
Trading Speed for Low Power by Choice of Supply and Threshold Voltages
Liu, D. / Svensson, C. | 1993
10
Antiparallel operation of multiple high-efficiency avalanche diodes
Kawamoto, H. | 1972
11
Design of a CMOS Buffered Switch for a Gigabit ATM Switching Network
Mirfakhraei, N. | 1995
11
A wideband CMOS sigma-delta modulator with incremental data weighted averaging
Tai-Haur Kuo, / Kuan-Dar Chen, / Horng-Ru Yeng, | 2002
12
Subject index
| 2000
12
PAPERS - A 557-mW, 2.5-Gbit-s SONET-SDH Regenerator-Section Terminating LSI Chip Using Low-Power Bipolar-LSI Design
Kawai, K. / Koike, K. / Takei, Y. / Onozawa, A. / Obara, H. / Ichino, H. | 1999
12
A 557-mW, 2.5-Gbit/s SONET/SDH Regenerator-Section Terminating LSI Chip Using Low-Power Bipolar-LSI Design
Kawai, K. / Koike, K. / Takei, Y. / Onozawa, A. / Obara, H. / Ichino, H. | 1999
12
A flexible redundancy technique for high-density DRAMs
Horiguchi, M. / Etoh, J. / Aoki, M. / Itoh, K. / Matsumoto, T. | 1991
12
A 30- mu A data-retention pseudostatic RAM with virtually static RAM mode
Sawada, K. / Sakurai, T. / Nogami, K. / Sato, K. / Shirotori, T. / Kakuma, M. / Morita, S. / Kinugawa, M. / Asami, T. / Narita, K. et al. | 1988
12
A subnanosecond Josephson tunneling memory cell with nondestructive readout
Zappe, H.H. | 1975
13
Delta-Sigma Modulators Using Frequency-Modulated Intermediate Values
Høvin, M. / Olsen, A. / Lande, T.S. / Toumazou, C. | 1997
13
A 10-Gb/s CMOS clock and data recovery circuit with a half-rate binary phase/frequency detector
Savoj, J. / Razavi, B. | 2003
13
Very Low-Drift Complimentary Semiconductor Network dc Amplifiers
Emmons, S.P. / Spence, H.W. | 1966
13
A 10-bit 20-MHz two-step parallel A/D converter with internal S/H
Shimizu, T. / Hotta, M. / Maio, K. / Ueda, S. | 1989
13
A flexible approach to emitter-coupled logic arrays
D'Agostino, M. / Feller, A. | 1969
14
A 0.5-W CW IMPATT diode amplifier for high-capacity 11-GHz FM radio-relay equipment
Komizo, H. / Ito, Y. / Ashida, H. / Shinoda, M. | 1973
14
An integrated per-channel PCM encoder based on interpolation
Wooley, B.A. / Henry, J.L. | 1979
14
Impact of the radiation environment on integrated-circuit technology
Spratt, J.P. / Schnable, G.L. / Standeven, J.D. | 1970
14
A 1-V CMOS switched-opamp switched-capacitor pseudo-2-path filter
Cheung, V.S.-L. / Luong, H.C. / Wing-Hung Ki, | 2001
14
Dynamic Computational Blocks for Bit-Level Systolic Arrays
Jullien, G.A. / Miller, W.C. / Grondin, R. / Del Pup, L. / Bizzan, S.S. / Zhang, D. | 1994
14
PAPERS - A 1-V CMOS Switched-Opamp Switched-Capacitor Pseudo-2-Path Filter
Cheung, V.S.-L. / Luong, H.C. / Ki, W.-H. | 2001
15
A fully integrated 0.18-/spl mu/m CMOS direct conversion receiver front-end with on-chip LO for UMTS
Gatta, F. / Manstretta, D. / Rossi, P. / Svelto, F. | 2004
15
A Fully Integrated 0.18-mum CMOS Direct Conversion Receiver Front-End With On-Chip LO for UMTS
Gatta, F. / Manstretta, D. / Rossi, P. / Svelto, F. | 2004
15
PAPERS - Noise in RF-CMOS Mixers: A Simple Physical Model
Darabi, H. / Abidi, A.A. | 2000
15
A Chip-Stacked Memory for On-Chip SRAM-Rich SoCs and Processors Digital Object Identifier: 10.1109/JSSC.2009.2034078
Saito, H. / Nakajima, M. / Okamoto, T. / Yamada, Y. / Ohuchi, A. / Iguchi, N. / Sakamoto, T. / Yamaguchi, K. / Mizuno, M. | 2010
15
Noise in RF-CMOS mixers: a simple physical model
Darabi, H. / Abidi, A.A. | 2000
15
A Chip-Stacked Memory for On-Chip SRAM-Rich SoCs and Processors
Saito, H. / Nakajima, M. / Okamoto, T. / Yamada, Y. / Ohuchi, A. / Iguchi, N. / Sakamoto, T. / Yamaguchi, K. / Mizuno, M. | 2010
15
A CMOS digitally controlled audio attenuator for Hi-Fi systems
Hynes, M.J. / Burton, D.P. | 1981
15
A Fully Integrated 0.18-mm CMOS Direct Conversion Receiver Front-End With On-Chip LO for UMTS
Gatta, F. / Manstretta, D. / Rossi, P. / Svelto, F. | 2004
17
DIGITAL - A 65-nm Dual-Core Multithreaded Xeon(R) Processor With 16-MB L3 Cache
Rusu, S. / Tam, S. / Muljono, H. / Ayers, D. / Chang, J. / Cherkauer, B. / Stinson, J. / Benoit, J. / Varada, R. / Leung, J. et al. | 2007
17
A 60-GHz CMOS receiver front-end
Razavi, B. | 2006
17
A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache
Rusu, S. / Tam, S. / Muljono, H. / Ayers, D. / Chang, J. / Cherkauer, B. / Stinson, J. / Benoit, J. / Varada, R. / Leung, J. et al. | 2007
17
An Adjustment-Free Single-Chip Video Signal Processing LSI for VHS VCR's
Yamamoto, N. / Nakagawa, O. / Takebuchi, K. / Kitamura, Y. | 1996
17
An experimental single-chip data flow CPU
Uvieghara, G.A. / Hwu, W.W. / Nakagome, Y. / Jeong, D.K. / Lee, D.D. / Hodges, D.A. / Patt, Y.N. | 1992
17
A monolithic decode-drive circuit for magnetic memories
Jordon, W.F. | 1969
17
TECHNOLOGY DIRECTIONS - A 60-GHz CMOS Receiver Front-End
Razavi, B. | 2006
18
A byte organized NMOS/CCD memory with dynamic refresh logic
Varshney, R.C. / Guidry, M.R. / Amelio, G.F. / Early, J.M. | 1976
18
A 65 nm 2-Billion Transistor Quad-Core Itanium Processor
Stackhouse, B. / Bhimji, S. / Bostak, C. / Bradley, D. / Cherkauer, B. / Desai, J. / Francom, E. / Gowan, M. / Gronowski, P. / Krueger, D. et al. | 2009
18
Design of a New Race-Free Four-Phase Cmos Logic
Analysis, n. / Wu, C.-Y. / Cheng, K.-H. / Wang, J.-S. | 1993
18
A Fully Adaptive 19–58-Gb/s PAM-4 and 9.5–29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET
Upadhyaya, Parag / Poon, Chi Fung / Lim, Siok Wei / Cho, Junho / Roldan, Arianne / Zhang, Wenfeng / Namkoong, Jin / Pham, Toan / Xu, Bruce / Lin, Winson et al. | 2019
18
A � 1.5-V, 4-MHz CMOS Continuous-Time Filter with a Single-Integrator Based Tuning
Yoo, C. / Lee, S.-W. / Kim, W. | 1998
18
PAPERS - A Wide-Dynamic-Range, High-Transimpedance Si Bipolar Preamplifier IC for 10-Gb-s Optical Fiber Links
Ohhata, K. / Masuda, T. / Imai, K. / Takeyari, R. / Washio, K. | 1999
18
Enabling Wide Autonomous DVFS in a 22 nm Graphics Execution Core Using a Digitally Controlled Fully Integrated Voltage Regulator
Kim, Stephen T. / Shih, Yi-Chun / Mazumdar, Kaushik / Jain, Rinkle / Ryan, Joseph F. / Tokunaga, Carlos / Augustine, Charles / Kulkarni, Jaydeep P. / Ravichandran, Krishnan / Tschanz, James W. et al. | 2016
18
A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation
Bull, D / Das, S / Shivashankar, K / Dasika, G S / Flautner, K / Blaauw, D | 2011
18
A 2.5-Mb-s GFSK 5.0-Mb-s 4-FSK Automatically Calibrated S-D Frequency Synthesizer
McMahill, D.R. / Sodini, C.G. | 2002
18
A Wide-Dynamic-Range, High-Transimpedance Si Bipolar Preamplifier IC for 10-Gb/s Optical Fiber Links
Ohhata, K. / Masuda, T. / Imai, K. / Takeyari, R. / Washio, K. | 1999
18
Analysis and Design of a New Race-Free Four-Phase CMOS Logic
Wu, C.-Y. / Cheng, K.-H. / Wang, J.-S. | 1993
18
A 2.5-Mb/s GFSK 5.0-Mb/s 4-FSK automatically calibrated /spl Sigma/-/spl Delta/ frequency synthesizer
McMahill, D.R. / Sodini, C.G. | 2002
18
A (plus-minus) 1.5-V, 4-MHz CMOS Continuous-Time Filter with a Single-Integrator Based Tuning
Yoo, C. / Lee, S.-W. / Kim, W. | 1998
18
ECL-CMOS and CMOS-ECL interface in 1.2- mu m CMOS for 150-MHz digital ECL data transmission systems
Steyaert, M.S.J. / Bijker, W. / Vorenkamp, P. / Sevenhans, J. | 1991
18
A 2.5-Mb/s GFSK 5.0-Mb/s 4-FSK Automatically Calibrated Sigma-Delta Frequency Synthesizer
McMahill, D. R. / Sodini, C. G. | 2002
19
Very-High-Speed Si Bipolar Static Frequency Dividers with New T-Type Flip-Flops
Ishii, K. / Ichino, H. / Togashi, M. / Kobayashi, Y. / Yamaguchi, C. | 1995
19
A 3.6 GHz 16-Core SPARC SoC Processor in 28 nm
Hart, Jason M. / Cho, Hoyeol / Ge, Yuefei / Gruber, Gregory / Huang, Dawei / Hwang, Changku / Jian, Daisy / Johnson, Tim / Konstadinidis, Georgios K. / Krishnaswamy, Venkat et al. | 2014
19
A Highly Desensitized, Wide-Band Monolithic Amplifier
Solomon, J.E. / Wilson, G.R. | 1966
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