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Method of making a logic transistor and non-volatile memory (NVM) cell
Free accessEuropean Patent Office | 2016| -
METHOD OF MAKING A LOGIC TRANSISTOR AND NON-VOLATILE MEMORY (NVM) CELL
Free accessEuropean Patent Office | 2015| -
Methods of making semiconductor devices with non-volatile memory cells
Free accessEuropean Patent Office | 2015| -
Semiconductor device with upset event detection and method of making
Free accessEuropean Patent Office | 2017| -
SEMICONDUCTOR DEVICE WITH UPSET EVENT DETECTION AND METHOD OF MAKING
Free accessEuropean Patent Office | 2016| -
Integration technique using thermal oxide select gate dielectric for select gate and apartial replacement gate for logic
Free accessEuropean Patent Office | 2015| -
Method of making a logic transistor and a non-volatile memory (NVM) cell
Free accessEuropean Patent Office | 2015|
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