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    340 mV-1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS

    Mathew, Sanu / Satpathy, Sudhir / Suresh, Vikram et al. | Online Contents | 2015
    Keywords: area-optimized encrypt-decrypt GF(2 4 ) 2 polynomial
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