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  1. Memory models: A case for rethinking parallel languages and hardware

    Adve, Sarita V. / Boehm, Hans J. | Tema Archive | 2010

  2. Review Articles Memory Models: A Case for Rethinking Parallel Languages and Solving the memory model problem will require an ambitious and cross-disciplinary research direction.

    Adve, Sarita V | Online Contents | 2010

  3. Chasing Away RAts: Semantics and evaluation for relaxed atomics on heterogeneous systems

    Sinclair, Matthew D. / Alsop, Johnathan / Adve, Sarita V. | IEEE | 2017

  4. Efficient GPU synchronization without scopes: Saying no to complex consistency models

    Sinclair, Matthew D. / Alsop, Johnathan / Adve, Sarita V. | IEEE | 2015

  5. Guest Editors' Introduction: Reliability-Aware Microarchitecture

    Adve, Sarita V. | Online Contents | 2005

  6. Memory-side prefetching for linked data structures for processor-in-memory systems

    Hughes, Christopher J. / Adve, Sarita V. | Elsevier | 2004

  7. DeNovoND: Efficient Hardware for Disciplined Nondeterminism

    Sung, Hyojin / Komuravelli, Rakesh / Adve, Sarita V. | IEEE | 2014

  8. DeNovoND: Efficient Hardware for Disciplined Nondeterminism

    Sung, Hyojin / Komuravelli, Rakesh / Adve, Sarita V. | British Library Online Contents | 2014

  9. HeteroSync: A benchmark suite for fine-grained synchronization on tightly coupled GPUs

    Sinclair, Matthew D. / Alsop, Johnathan / Adve, Sarita V. | IEEE | 2017

  10. Changing Interaction of Compiler and Architecture

    Adve, Sarita V. | Online Contents | 1997

  11. Shared memory consistency models: A tutorial

    Adve, Sarita V. | Online Contents | 1996

  12. Eliminating on-chip traffic waste: are we there yet?

    Smolinski, Robert / Komuravelli, Rakesh / Sung, Hyojin et al. | IEEE | 2015

  13. GSI: A GPU Stall Inspector to characterize the sources of memory stalls for tightly coupled GPUs

    Alsop, Johnathan / Sinclair, Matthew D. / Komuravelli, Rakesh et al. | IEEE | 2016

  14. Low-cost program-level detectors for reducing silent data corruptions

    Hari, Siva Kumar Sastry / Adve, Sarita V. / Naeimi, Helia | IEEE | 2012

  15. Approxilyzer: Towards a systematic framework for instruction-level approximate computing and its application to hardware resiliency

    Venkatagiri, Radha / Mahmoud, Abdulrahman / Hari, Siva Kumar Sastry et al. | IEEE | 2016

  16. GangES: Gang error simulation for hardware resiliency evaluation

    Hari, Siva Kumar Sastry / Venkatagiri, Radha / Adve, Sarita V. et al. | IEEE | 2014

  17. Exploring Extended Reality with ILLIXR: A New Playground for Architecture Research

    Free access
    Huzaifa, Muhammad / Desai, Rishi / Jiang, Xutao et al. | ArXiv | 2020

  18. A unified formalization of four shared-memory models

    Adve, Sarita V. / Hill, Mark D. | TIBKAT | 1991

  19. Weak ordering - a new definition and some implications

    Adve, Sarita V. / Hill, Mark D. | TIBKAT | 1989

  20. Online Estimation of Architectural Vulnerability Factor for Soft Errors

    Li, Xiaodong / Adve, Sarita V. / Bose, Pradip et al. | IEEE | 2008

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