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3D Interconnect Architectures for Heterogeneous Technologies [2022]

1
Introduction to 3D Technologies
2
Interconnect Architectures for 3D Technologies
3
High-Level Formulas for the 3D-Interconnect Power Consumption and Performance
4
High-Level Estimation of the 3D-Interconnect Capacitances
5
Models for Application Traffic and 3D-NoC Simulation
6
Estimation of the Bit-Level Statistics
7
Ratatoskr: A Simulator for NoCs in Heterogeneous 3D SoCs
8
Low-Power Technique for 3D Interconnects
9
Low-Power Technique for High-Performance 3D Interconnects
10
Low-Power Technique for High-Performance 3D Interconnects in the Presence of Temporal Misalignment
11
Low-Power Technique for Yield-Enhanced 3D Interconnects
12
Heterogeneous Buffering for 3D NoCs
13
Heterogeneous Routing for 3D NoCs
14
Heterogeneous Virtualisation for 3D NoCs
15
Network Synthesis and SoC Floor Planning
16
Conclusion
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