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Formal Techniques in Real-Time and Fault-Tolerant Systems [2002]

1
Stability of Discrete Sampled Systems
2
Issues in the Refinement of Distributed Programs
3
Challenges in the Verification of Electronic Control Units
4
Scaling up Uppaal
5
Decidable Model Checking of Probabilistic Hybrid Automata
6
Invariant-Based Synthesis of Fault-Tolerant Systems
7
Modeling Faults of Distributed, Reactive Systems
8
Threshold and Bounded-Delay Voting in Critical Control Systems
9
Automating the Addition of Fault-Tolerance
11
A Methodology for the Construction of Scheduled Systems
12
A Dual Interpretation of “Standard Constraints” in Parametric Scheduling
13
Co-Simulation of Hybrid Systems: Signal-Simulink
14
A System for Object Code Validation
15
Real-Time Program Refinement Using Auxiliary Variables
16
On Refinement and Temporal Annotations
17
Generalizing Action Systems to Hybrid Systems
18
Compositional Verification of Synchronous Networks
19
Modelling Coordinated Atomic Actions in Timed CSP
20
A Logical Characterisation of Event Recording Automata
21
Using Cylindrical Algebraic Decomposition for the Analysis of Slope Parametric Hybrid Automata
22
Probabilistic Neighbourhood Logic
23
An On-the-Fly Tableau Construction for a Real-Time Temporal Logic
24
Verifying Universal Properties of Parameterized Networks
3
<Emphasis Type="SmallCaps">UppaaL</Emphasis> Implementation Secrets
23
Software Hazard and Safety Analysis
37
Real-Time Operating Systems: Problems and Novel Solutions
53
Real-Time UML
71
Eager Class Initialization for Java
81
Applications of Formal Methods in Biology
83
An Overview of Formal Verification for the Time-Triggered Architecture
107
Scheduler Modeling Based on the Controller Synthesis Paradigm
111
Component-Based Synthesis of Dependable Embedded Software
129
From the Specification to the Scheduling of Time-Dependent Systems
147
On Control with Bounded Computational Resources
165
Decidability of Safety Properties of Timed Multiset Rewriting
185
Extending Timed Automaton and Real-Time Logic to Many-Valued Reasoning
205
Fault Diagnosis for Timed Automata
225
Verification of Timed Automata via Satisfiability Checking
245
Take It NP-Easy: Bounded Model Construction for Duration Calculus
265
Towards Bounded Model Checking for the Universal Fragment of TCTL
291
A Typed Interrupt Calculus
311
Parametric Verification of a Group Membership Algorithm
331
A Method for Testing the Conformance of Real Time Systems
355
A Probabilistic Extension of UML Statecharts
375
Eliminating Queues from RT UML Model Representations
395
Model Checking Timed UML State Machines and Collaborations
417
Partial Order Path Technique for Checking Parallel Timed Automata
433
Constructing Test Automata from Graphical Real-Time Requirements
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