Coverage Optimization for Defect-Tolerance Logic Mapping on Nanoelectronic Crossbar Architectures (Englisch)
- Neue Suche nach: Yuan, B.
- Neue Suche nach: Li, B.
- Neue Suche nach: Yuan, B.
- Neue Suche nach: Li, B.
In:
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
;
27
, 5
;
979-988
;
2012
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ISSN:
- Aufsatz (Zeitschrift) / Print
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Titel:Coverage Optimization for Defect-Tolerance Logic Mapping on Nanoelectronic Crossbar Architectures
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Beteiligte:
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Erschienen in:JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY ; 27, 5 ; 979-988
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Verlag:
- Neue Suche nach: Springer Science + Business Media
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Erscheinungsdatum:01.01.2012
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Format / Umfang:10 pages
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ISSN:
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Medientyp:Aufsatz (Zeitschrift)
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Format:Print
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Sprache:Englisch
- Neue Suche nach: 004
- Weitere Informationen zu Dewey Decimal Classification
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Klassifikation:
DDC: 004 -
Datenquelle:
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