The 24th Annual International Symposium on Computer Architecture : conference proceedings, June 2-4, 1997, Denver, Colorado (Englisch)
- Neue Suche nach: International Symposium on Computer Architecture
- Neue Suche nach: Association for Computing Machinery
- Neue Suche nach: IEEE Computer Society
- Neue Suche nach: Sigarch
- Neue Suche nach: International Symposium on Computer Architecture
- Neue Suche nach: Association for Computing Machinery
- Neue Suche nach: IEEE Computer Society
- Neue Suche nach: Sigarch
2010
- Konferenzband / Elektronische Ressource
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Titel:The 24th Annual International Symposium on Computer Architecture : conference proceedings, June 2-4, 1997, Denver, Colorado
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Weitere Titelangaben:Computer architecture
Proceedings of the 24th Annual International Symposium on Computer Architecture
Computer Architecture, 1997, conference proceedings, the 24th Annual International Symposium on
ISCA '24 -
Beteiligte:
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Kongress:International Symposium on Computer Architecture ; 24th
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Verlag:
- Neue Suche nach: ACM Press
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Erscheinungsort:New York, N.Y
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Erscheinungsdatum:2010
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Format / Umfang:1 Online-Ressource (vii, 350 pages)
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Anmerkungen:illustrations
Includes bibliographical references and index
Use copy Restrictions unspecified star MiAaHDL -
ISBN:
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Medientyp:Konferenzband
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Format:Elektronische Ressource
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Sprache:Englisch
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Schlagwörter:
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Datenquelle:
Inhaltsverzeichnis Konferenzband
Die Inhaltsverzeichnisse werden automatisch erzeugt und basieren auf den im Index des TIB-Portals verfügbaren Einzelnachweisen der enthaltenen Beiträge. Die Anzeige der Inhaltsverzeichnisse kann daher unvollständig oder lückenhaft sein.
- 1
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Improving Superscalar Instruction Dispatch And Issue By Exploiting Dynamic Code SequencesVajapeyam, S. / Mitra, T. et al. | 1997
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Exploiting Instruction Level Parallelism In Processors By Caching Scheduled GroupsNair, R. / Hopkins, M.E. et al. | 1997
- 26
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Daisy: Dynamic Compilation For 10o?40 Architectural CompatibilityEbcioglu, K. / Altman, E.R. et al. | 1997
- 26
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DAISY: Dynamic Compilation for 100% Architectural CompatibilityEbcioglu, K. / Altman, E. R. et al. | 1997
- 38
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On Deadlocks In Interconnection NetworksPinkston, T.M. / Warnakulasuriya, S. et al. | 1997
- 50
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Implementing Multidestination Worms In Switch-based Parallel Systems: Architectural Alternatives And Their ImpactStunkel, C.B. / Sivaram, R. / Panda, D.K. et al. | 1997
- 62
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Tolerating Multiple Failures In Raid Architectures With Optimal Storage And Uniform DeclusteringAlvarez, G.A. / Burkhard, W.A. / Cristian, F. et al. | 1997
- 73
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Hardware Fault Containment In Scalable Shared-memory MultiprocessorsTeodosiu, D. / Baxter, J. / Govil, K. / Chapin, J. / Rosenblum, M. / Horowitz, M. et al. | 1997
- 85
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Effects Of Communication Latency, Overhead, And Bandwidth In A Cluster ArchitectureMartin, R.P. / Vahdat, A.M. / Culler, D.E. / Anderson, T.E. et al. | 1997
- 98
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The Mercury Interconnect Architecture: A Cost-effective Infrastructure For High-performance ServersWeber, W.-D. / Gold, S. / Helland, P. / Shimizu, T. / Wicki, T. / Wilcke, W. et al. | 1997
- 108
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The Design And Analysis Of A Cache Architecture For Texture MappingHakura, Z.S. / Gupta, A. et al. | 1997
- 121
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Designing High Bandwidth On-chip CachesWilson, K.M. / Olukotun, K. et al. | 1997
- 133
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Memory-system Design Considerations For Dynamically-scheduled ProcessorsFarkas, K.I. / Chow, P. / Jouppi, N.P. / Vranesic, Z. et al. | 1997
- 144
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The Interaction Of Software Prefetching With Ilp Processors In Shared-memory SystemsRanganathan, P. / Pai, V.S. / Abdel-Shafi, H. / Adve, S.V. et al. | 1997
- 157
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Vm-based Shared Memory On Low-latency, Remote-memory-access NetworksKontothanassis, L. / Hunt, G. / Stets, R. / Hardavellas, N. / Cierniak, M. / Parthasarathy, S. / Meira, W. / Dwarkadas, S. / Scott, M. et al. | 1997
- 170
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Efficient Synchronization: Let Them Eat QOLBKaegi, A. / Burger, D. / Goodman, J. R. et al. | 1997
- 170
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Efficient Synchronization: Let Them Eat QOLB /sup1/Kagi, A. / Burger, D. / Goodman, J.R. et al. | 1997
- 181
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Dynamic Speculation and Synchronization of Data DependencesMoshovos, A. / Breach, S. E. / Vijaykumar, T. N. / Sohi, G. S. et al. | 1997
- 181
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Dynamic Speculation And Synchronization Of Data DependenceMoshovos, A. / Breach, S.E. / Vijaykumar, T.N. / Sohi, G.S. et al. | 1997
- 194
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Dynamic Instruction ReuseSodani, A. / Sohi, G.S. et al. | 1997
- 206
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Complexity-Effective Superscalar ProcessorsPalacharla, S. / Jouppi, N.P. / Smith, J.E. et al. | 1997
- 219
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Coherence Controller Architectures For Smp-based Cc-numa MultiprocessorsMichael, M.M. / Nanda, A.K. / Beng-Hong Lim, / Scott, M.L. et al. | 1997
- 229
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Reactive NUMA: A Design For Unifying S-COMA And CC-NUMAFalsafi, B. / Wood, D.A. et al. | 1997
- 241
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The SGI Origin: A ccnuma Highly Scalable ServerLaudon, J. / Lenoski, D. et al. | 1997
- 252
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Prefetching Using Markov PredictorsJoseph, D. et al. | 1997
- 264
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Data Prefetching On The HP PA-8000Santhanam, V. / Gornish, E.H. / Wei-Chung Hsu, et al. | 1997
- 274
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Target Prediction For Indirect JumpsPo-Yung Chang, / Hao, E. / Patt, Y.N. et al. | 1997
- 284
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The Agree Predictor: A Mechanism For Reducing Negative Branch History InterferenceSprangle, E. / Chappell, R.S. / Alsup, M. / Patt, Y.N. et al. | 1997
- 292
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Trading Conflict And Capacity Aliasing In Conditional Branch PredictorsMichaud, P. / Seznec, A. / Uhlig, R. et al. | 1997
- 304
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A Language For Describing Predictors And Its Application To Automatic SynthesisEmer, J. et al. | 1997
- 315
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Run-time Adaptive Cache Hierarchy Management via Reference AnalysisJohnson, T. L. / Hwu, W.-M. et al. | 1997
- 315
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Run-time Adaptive Cache Hierarchy Via Reference AnalysisJohnson, T.L. / Wen-mei W. Hwu, et al. | 1997
- 327
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The Energy Efficiency Of Iram ArchitecturesFromm, R. / Perissakis, S. / Cardwell, N. / Kozyrakis, C. / McGaughy, B. / Patterson, D. / Anderson, T. / Yelick, K. et al. | 1997
- 338
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Datascalar ArchitecturesBurger, D. / Kaxiras, S. / Goodman, J.R. et al. | 1997
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The 24th Annual International Symposium On Computer Architecture [front matter]| 1997