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In printed circuit design, placement of elements consists of two interrelated procedures, that is, assignment of logic gates to IC's (integrated circuit), and placement of IC's on a given board. These two procedures are usually performed in sequential order by using two kinds of evaluating measures, i.e. max conjunction and min disjunction for the assignment and minimum-length connection path for the placement. One of the unique features of this program is that the placement is performed by a step-by-step improvement, applying alternate repetition of gate-assignment and IC-placement, where the minimum-length connection path is employed as an evaluating measure. In this paper, DA techniques developed in this program, computer program, and results of computation are described.