Nanoelektronik, optische Technologien und Photonik: Verbundprojekt SyreNe: Systemreduktion für IC Design in der Nanoelektronik. Teilprojekt Modellreduktion zur gekoppelten Simulation von ICs. Fachlicher Abschlussbericht
(Englisch)
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We consider simulation based POD-MOR of integrated circuits in electrical networks. The network is modeled by modified nodal analysis, while the integrated circuits are modeled with the nonlinear drift-diffusion equations. The spatial discretization of the drift-diffusion equations with finite elements gives rise to a high dimensional differential-algebraic equation system. We show how proper orthogonal decomposition (POD) can be used to reduce the dimension of the model. It turns out that the reduced model for a semiconductor depends on the position of the semiconductor in the network. We present numerical investigations for the reduction of a 4-diode rectifier network, which clearly indicate this fact. Furthermore, we apply the Discrete Empirical Interpolation Method (DEIM) for a further reduction of the nonlinearity, yielding a further reduction of the overall computational complexity. Moreover, we adapt to the present situation the Greedy sampling approach to construct POD models which are valid over certain parameter ranges. In a next step we combine the balancing-related model reduction PABTEC to reduce the dimension of the decoupled linear network equations with POD-MOR for the semiconductor model. Finally, we present numerical examples which demonstrate the performance of our approach.
Nanoelektronik, optische Technologien und Photonik: Verbundprojekt SyreNe: Systemreduktion für IC Design in der Nanoelektronik. Teilprojekt Modellreduktion zur gekoppelten Simulation von ICs. Fachlicher Abschlussbericht