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This work reports an effective ESD (electrostatic discharge) protection circuit design for CMOS IC's by using WCFOD (well-coupled field-oxide device). The bipolar action of the field-oxide device is triggered by well-coupling technique. The ESD-trigger voltage of WCFOD is lowered below the snapback-breakdown voltage of an output transistor, so it can perform efficient ESD protection for output transistors. A 0.5-micron high-speed 256K SRAM produced had been fabricated with this proposed well-coupled technique to practically verify the excellent efficiency for output ESD protection. The ESD failure voltage of this SRAM product has been improved up to above 6 kV without any extra ESD-Implant process, whereas the original output buffer just can systain the HBM ESD stress of 1 kV only.