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A critical review of design and fabrication challenges in InP HEMTs for future terahertz frequency applications
Elsevier | 2021|Schlagwörter: Drain induced barrier lowering (DIBL) -
Analytical modelling and simulation of negative capacitance junctionless FinFET considering fringing field effects
Elsevier | 2021|Schlagwörter: Drain induced barrier lowering (DIBL) -
Temperature dependent study of Fin-FET drain current through optimization of controlling gate parameters and dielectric material
Elsevier | 2017|Schlagwörter: Drain Induced Barrier Lowering (DIBL) -
A novel bottom-spacer ground-plane (BSGP) FinFET for improved logic and analog/RF performance
Elsevier | 2020|Schlagwörter: Drain induced barrier lowering (DIBL) -
A novel nanoscale fin field effect transistor by amended channel: Investigation and fundamental physics
Elsevier | 2015|Schlagwörter: Drain-induced barrier lowering (DIBL) -
Analytical modeling and simulation of multigate FinFET devices and the impact of high-k dielectrics on short channel effects (SCEs)
Elsevier | 2015|Schlagwörter: Drain induced barrier lowering (DIBL) -
Simulation Analysis in Sub-0.1 μm for Partial Isolation Field-Effect Transistors
Freier ZugriffDOAJ | 2018|Schlagwörter: drain-induced barrier lowering (DIBL) -
A two-dimensional (2D) analytical surface potential and subthreshold current model for the underlap dual-material double-gate (DMDG) FinFET
Online Contents | 2016|Schlagwörter: Drain-induced barrier lowering (DIBL) -
An analytical threshold voltage model for a short-channel dual-metal-gate (DMG) recessed-source/drain (Re-S/D) SOI MOSFET
Elsevier | 2013|Schlagwörter: Drain induced barrier lowering (DIBL) -
Threshold voltage modeling for dual‐metal quadruple‐gate (DMQG) MOSFETs
Wiley | 2016|Schlagwörter: drain‐induced barrier lowering (DIBL) -
Performance estimation of sub-30 nm junctionless tunnel FET (JLTFET)
Online Contents | 2013|Schlagwörter: Drain induced barrier lowering (DIBL) -
Influence of dummy active patterns on mechanical stress induced by spin-on-glass-filled shallow trench isolation in n-MOSFETs
Elsevier | 2010|Schlagwörter: Drain induced barrier lowering (DIBL) -
A unified analytical drain current model for Double-Gate Junctionless Field-Effect Transistors including short channel effects
Elsevier | 2017|Schlagwörter: Drain Induced Barrier Lowering (DIBL) -
Investigation of RF and DC Performance of E-Mode In0.80Ga0.20As/InAs/In0.80Ga0.20as Channel based DG-HEMTs for Future Submillimetre Wave and THz Applications
Taylor & Francis Verlag | 2021|Schlagwörter: Drain induced barrier lowering (DIBL) -
A Two-Dimensional (2D) Analytical Modeling and Improved Short Channel Performance of Graded-Channel Gate-Stack (GCGS) Dual-Material Double-Gate (DMDG) MOSFET
Online Contents | 2018|Schlagwörter: Drain induced barrier lowering (DIBL) -
Performance Enhancement of FinFET Devices with Gate-Stack (GS) High-K Dielectrics for Nanoscale Applications
Online Contents | 2018|Schlagwörter: Drain induced barrier lowering (DIBL) -
The effect of channel length on turn-on voltage in pentacene-based thin film transistor
Elsevier | 2006|Schlagwörter: Drain induced barrier lowering (DIBL) -
Analytical modeling and simulation of a fully depleted three-gate silicon MESFET on SOI material
Online Contents | 2019|Schlagwörter: Drain-induced barrier lowering (DIBL) -
GaAs metamorphic high electron mobility transistors for future deep space-biomedical-millitary and communication system applications: A review
Elsevier | 2019|Schlagwörter: Drain induced barrier lowering (DIBL) -
Surface Potential Modeling of Graded-Channel Gate-Stack (GCGS) High-K Dielectric Dual-Material Double-Gate (DMDG) MOSFET and Analog/RF Performance Study
Online Contents | 2018|Schlagwörter: Drain induced barrier lowering (DIBL)
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