Architecture Issues and Solutions for a High-Capacity FPGA (Englisch)
- Neue Suche nach: Trimberger, S.
- Neue Suche nach: Duong, K.
- Neue Suche nach: Conn, B.
- Neue Suche nach: ACM; Special Interest Group on Design and Automation
- Neue Suche nach: Trimberger, S.
- Neue Suche nach: Duong, K.
- Neue Suche nach: Conn, B.
- Neue Suche nach: ACM; Special Interest Group on Design and Automation
In:
FPGA '97: Field-programmable gate arrays
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3-9
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1997
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ISBN:
- Aufsatz (Konferenz) / Print
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Titel:Architecture Issues and Solutions for a High-Capacity FPGA
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Beteiligte:Trimberger, S. ( Autor:in ) / Duong, K. ( Autor:in ) / Conn, B. ( Autor:in ) / ACM; Special Interest Group on Design and Automation
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Kongress:International symposium; 5th, FPGA '97: Field-programmable gate arrays ; 1997 ; Monterey; CA
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Erschienen in:
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Verlag:
- Neue Suche nach: ACM
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Erscheinungsdatum:01.01.1997
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Format / Umfang:7 pages
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ISBN:
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Medientyp:Aufsatz (Konferenz)
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Format:Print
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Sprache:Englisch
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Schlagwörter:
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Datenquelle:
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Inhaltsverzeichnis Konferenzband
Die Inhaltsverzeichnisse werden automatisch erzeugt und basieren auf den im Index des TIB-Portals verfügbaren Einzelnachweisen der enthaltenen Beiträge. Die Anzeige der Inhaltsverzeichnisse kann daher unvollständig oder lückenhaft sein.
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Architecture Issues and Solutions for a High-Capacity FPGATrimberger, S. / Duong, K. / Conn, B. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 10
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Memory-to-Memory Connection Structures in FPGAs with Embedded Memory ArraysWilton, S. J. E. / Rose, J. / Vranesic, Z. G. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 17
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Laser Correcting Defects to Create Transparent Routing for Large Area FPGAsChapman, G. H. / Dufort, B. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 27
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I/O and Performance Tradeoffs with the FunctionBus during Multi-FPGA PartitioningVahid, F. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 35
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Partially-Dependent Functional Decomposition with Applications in FPGA Synthesis and MappingCong, J. / Hwang, Y. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 43
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General Modeling and Technology-Mapping Technique for LUT-based FPGAsChowdhary, A. / Hayes, J. P. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 53
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The Transmogrifier-2: A 1 Million Gate Rapid Prototyping SystemLewis, D. M. / Galloway, D. R. / Ierssel, M. V. / Rose, J. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 62
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Signal Processing at 250 MHz using High-Performance FPGA'sHerzen, B. V. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 69
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Module Generation of Complex Macros for Logic-Emulation ApplicationsFang, W. J. / Wu, C. H. / Chen, D. P. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 79
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Wormhole Run-time ReconfigurationBittner, R. / Athanas, P. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 86
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Improving Functional Density Through Run-Time Constant PropagationWirthlin, M. J. / Hutchings, B. L. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 93
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YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data ProcessingTsutsui, A. / Miyazaki, T. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 105
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Synthesis and Floorplanning for Large Hierarchical FPGAsKrupnova, H. / Rabedaoro, C. / Saucier, G. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 112
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Performance Driven Floorplanning for FPGA Based DesignsShi, J. / Bhatia, D. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 119
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FPGA Routing and Routability Estimation Via Boolean SatisfiabilityWood, R. G. / Rutenbar, R. A. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 129
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Architectural and Physical Design Challenges for One Million Gate FPGAs and BeyondRose, J. / Hill, D. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 133
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Challenges in CAD for the One Million Gate FPGAKeutzer, K. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 137
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A CMOS Continuous-time Field Programmable Analog ArrayLooby, C. A. / Lyden, C. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 142
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Buffer Minimization and Time-multiplexed I/O on Dynamically Reconfigurable FPGAsChang, D. / Marek-Sadowska, M. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 149
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Generation of Synthetic Sequential Benchmark CircuitsHutton, M. / Rose, J. / Corneil, D. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 159
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Synchronous Up/Down Binary Counter for LUT FPGAs with Counting Frequency Independent of Counter SizeTenca, A. F. / Ercegovac, M. D. / ACM; Special Interest Group on Design and Automation et al. | 1997
- 166
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A FPGA-based Implementation of Fault-Tolerant Neural Architecture for Photon IdentificationAlderight, M. / Gummati, E. L. / Piuri, V. / Sechi, G. R. / ACM; Special Interest Group on Design and Automation et al. | 1997