Hardware Design and Implementation of Fixed-Width Standard and Truncated 4x4, 6x6, 8x8 and 12x12-Bit Multipliers Using FPGA (Englisch)
- Neue Suche nach: Rais, M.H.
- Neue Suche nach: Rais, M.H.
- Neue Suche nach: Barsoum, Nader N.
- Neue Suche nach: Weber, Gerhard-Wilhelm
- Neue Suche nach: Vasant, Pandian
In:
International conference on power control and optimization
1239
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192-196
;
2010
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ISBN:
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ISSN:
- Aufsatz (Konferenz) / Print
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Titel:Hardware Design and Implementation of Fixed-Width Standard and Truncated 4x4, 6x6, 8x8 and 12x12-Bit Multipliers Using FPGA
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Beteiligte:
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Kongress:3rd, International conference on power control and optimization ; 2010 ; Gold Coast, Australia
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Erschienen in:International conference on power control and optimization , 1239 ; 192-196AIP CONFERENCE PROCEEDINGS , 1239 ; 192-196
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Verlag:
- Neue Suche nach: American Institute of Physics
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Erscheinungsort:Melville, N.Y.
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Erscheinungsdatum:01.01.2010
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Format / Umfang:5 pages
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Anmerkungen:"All papers have been peer reviewed." Includes bibliographical references and index. 3rd Global Conference on Power Control and Optimization. Third Global Conference on Power Control and Optimization. PCO 2010.
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ISBN:
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ISSN:
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Medientyp:Aufsatz (Konferenz)
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Format:Print
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Sprache:Englisch
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Schlagwörter:
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Datenquelle:
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