Parallel Algorithms and VLSI Architectures for Stack Filtering Using Fibonacci p-Codes (Unbekannt)
- Neue Suche nach: Gevorkian, D. Z.
- Neue Suche nach: Egiazarian, K. O.
- Neue Suche nach: Agaian, S. S.
- Neue Suche nach: Astola, J. T.
- Neue Suche nach: Gevorkian, D. Z.
- Neue Suche nach: Egiazarian, K. O.
- Neue Suche nach: Agaian, S. S.
- Neue Suche nach: Astola, J. T.
In:
IEEE TRANSACTIONS ON SIGNAL PROCESSING
;
43
, 1
;
286
;
1995
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ISSN:
- Aufsatz (Zeitschrift) / Print
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Titel:Parallel Algorithms and VLSI Architectures for Stack Filtering Using Fibonacci p-Codes
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Beteiligte:Gevorkian, D. Z. ( Autor:in ) / Egiazarian, K. O. ( Autor:in ) / Agaian, S. S. ( Autor:in ) / Astola, J. T. ( Autor:in )
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Erschienen in:IEEE TRANSACTIONS ON SIGNAL PROCESSING ; 43, 1 ; 286
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Verlag:
- Neue Suche nach: IEEE INSTITUTE OF ELECTRICAL AND ELECTRONICS
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Erscheinungsdatum:01.01.1995
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Format / Umfang:286 pages
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ISSN:
-
Medientyp:Aufsatz (Zeitschrift)
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Format:Print
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Sprache:Unbekannt
- Neue Suche nach: 621.3822 / 621.38
- Weitere Informationen zu Dewey Decimal Classification
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Klassifikation:
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Datenquelle:
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