Keynotes [3 abstracts] (Englisch)
In:
2012 15th Euromicro Conference on Digital System Design
;
xxviii-xxxiii
;
2012
- Aufsatz (Konferenz) / Elektronische Ressource
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Titel:Keynotes [3 abstracts]
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Erschienen in:2012 15th Euromicro Conference on Digital System Design ; xxviii-xxxiii
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Verlag:
- Neue Suche nach: IEEE
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Erscheinungsdatum:01.09.2012
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Format / Umfang:199466 byte
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ISBN:
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DOI:
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Medientyp:Aufsatz (Konferenz)
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Format:Elektronische Ressource
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Sprache:Englisch
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Datenquelle:
Inhaltsverzeichnis Konferenzband
Die Inhaltsverzeichnisse werden automatisch erzeugt und basieren auf den im Index des TIB-Portals verfügbaren Einzelnachweisen der enthaltenen Beiträge. Die Anzeige der Inhaltsverzeichnisse kann daher unvollständig oder lückenhaft sein.
- 1
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Impact of Duty Factor, Stress Stimuli, and Gate Drive Strength on Gate Delay Degradation with an Atomistic Trap-Based BTI ModelKukner, Halil / Weckx, Pieter / Raghavan, Praveen / Kaczer, Ben / Catthoor, Francky / Van Der Perre, Liesbet / Lauwereins, Rudy / Groeseneken, Guido et al. | 2012
- 8
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Architecture and Design Analysis of a Digital Single-Event Transient/Upset Measurement ChipVeeravalli, Varadan Savulimedu / Polzer, Thomas / Steininger, Andreas / Schmid, Ulrich et al. | 2012
- 18
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Accurate Estimation of Leakage Power Variability in Sub-micrometer CMOS CircuitsAssare, Omid / Momtazpour, Mahmoud / Goudarzi, Maziar et al. | 2012
- 26
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reMORPH: A Runtime Reconfigurable ArchitecturePaul, Kolin / Dash, Chinmaya / Moghaddam, Mansureh Shahraki et al. | 2012
- 34
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Designing a High Performance and Reliable Networks-on-Chip Using Network Interface Assisted Routing StrategyLatif, Khalid / Rahmani, Amir-Mohammad / Seceleanu, Tiberiu / Tenhunen, Hannu et al. | 2012
- 42
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A Scalable Monitoring Infrastructure for Self-Organizing Many-Core ArchitecturesKramer, David / Karl, Wolfgang et al. | 2012
- 50
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On the Design of Configurable Modulo 2n±1 Residue GeneratorsEfstathiou, Constantinos / Moschopoulos, Nikos / Tsoumanis, Kostas / Pekmestzi, Kiamal et al. | 2012
- 57
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Projected Don't CaresBernasconi, Anna / Ciriani, Valentina / Trucco, Gabriella / Villa, Tiziano et al. | 2012
- 65
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SUT-RNS Residue-to-Binary Converters DesignEvangelos, Vassalos / Dimitris, Bakalis / Vergos, Haridimos T. et al. | 2012
- 73
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Automated Generation of Built-In Self-Repair Architectures for Random Logic SoC CoresDobai, Roland / Balaz, Marcel / Fischerova, Maria et al. | 2012
- 79
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Miscellaneous Types of Partial Duplication Modifications for Availability ImprovementsKohlik, Martin / Borecky, Jaroslav / Kubatova, Hana et al. | 2012
- 84
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Reliability of Task Execution During Safe Software ProcessingRaab, Peter / Kramer, Stefan / Mottok, Jurgen / Racek, Stanislav et al. | 2012
- 90
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Power Optimization Opportunities for a Reconfigurable Arithmetic Component in the Deep Submicron DomainBekiaris, Dimitris / Economakos, George et al. | 2012
- 98
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OWQS: One-Way Quantum Computation SimulatorNikahd, Eesa / Houshmand, Mahmoobeh / Zamani, Morteza Saheb / Sedighi, Mehdi et al. | 2012
- 105
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The ACROSS MPSoC -- A New Generation of Multi-core Processors Designed for Safety-Critical Embedded SystemsSalloum, Christian El / Elshuber, Martin / Hoftberger, Oliver / Isakovic, Haris / Wasicek, Armin et al. | 2012
- 114
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From Scilab to High Performance Embedded Multicore Systems: The ALMA ApproachBecker, Juergen / Stripf, Timo / Oey, Oliver / Huebner, Michael / Derrien, Steven / Menard, Daniel / Sentieys, Olivier / Rauwerda, Gerard / Sunesen, Kim / Kavvadias, Nikolaos et al. | 2012
- 122
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FPGA Based Real-Time Tracking Approach with Validation of Precision and PerformanceBochem, Alexander / Kent, Kenneth B. / Herpers, Rainer et al. | 2012
- 128
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Analyzing Bus Load Data Using an FPGA and a MicrocontrollerDombrowski, Marcel / Kent, Kenneth B. / Losier, Yves / Wilson, Adam / Herpers, Rainer et al. | 2012
- 132
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On the Development of a Runtime Reconfigurable Multicore System-on-ChipCazzaniga, Andrea / Durelli, Gianluca / Pilato, Christian / Sciuto, Donatella / Santambrogio, Marco D. et al. | 2012
- 136
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Resilient Adaptive Algebraic Architecture for Parallel Detection and Correction of Soft-ErrorsItturriet, Fabio / Ferreira, Ronaldo / Girao, Gustavo / Nazar, Gabriel / Moreira, Alvaro / Carro, Luigi et al. | 2012
- 140
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Improving the Soft Error Resilience of the Register Files Using SRAM Bitcells with Built-In ComparatorsKayaalp, Mehmet / Koc, Fahrettin / Ergin, Oguz et al. | 2012
- 144
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Vulnerability Analysis for Custom InstructionsAzarpeyvand, Ali / Salehi, Mostafa E. / Fakhraie, Sied Mehdi et al. | 2012
- 148
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A Three-Dimensional Integrated AcceleratorMehdipour, Farhad / Nunna, Krishna C. / Inoue, Koji / Murakami, Kazuaki J. et al. | 2012
- 152
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Algorithm Parallelism Estimation for Constraining Instruction-Set Synthesis for VLIW ProcessorsJordans, Roel / Corvino, Rosilde / Jozwiak, Lech et al. | 2012
- 156
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An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUFCherif, Zouha / Danger, Jean-Luc / Guilley, Sylvain / Bossuet, Lilian et al. | 2012
- 163
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No Principal Too Small: Memory Access Control for Fine-Grained Protection DomainsLeontie, Eugen / Bloom, Gedare / Narahari, Bhagirath / Simha, Rahul et al. | 2012
- 171
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Hardware Strengthening a Distributed Logging SchemeVliegen, Jo / Wouters, Karel / Grahn, Christian / Pulls, Tobias et al. | 2012
- 177
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Trojan Immune Circuits Using DualityAlkabani, Yousra et al. | 2012
- 185
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Semi-distributed Control for FPGA-based Reconfigurable SystemsTrabelsi, Chiraz / Meftali, Samy / Dekeyser, Jean-Luc et al. | 2012
- 193
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FPGA-based Neural Network for Nonuniformity Correction on Infrared Focal Plane ArraysCeledon, Nicolas / Redlich, Rodolfo / Figueroa, Miguel et al. | 2012
- 201
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MAFA: Adaptive Fault-Tolerant Routing Algorithm for Networks-on-ChipEbrahimi, Masoumeh / Daneshtalab, Masoud / Plosila, Juha / Tenhunen, Hannu et al. | 2012
- 208
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Power and Thermal Analysis of Stacked Mesh 3D NoC Using AdaptiveXYZ Routing AlgorithmRahmani, Amir-Mohammad / Vaddina, Kameswar Rao / Liljeberg, Pasi / Plosila, Juha / Tenhunen, Hannu et al. | 2012
- 216
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ASAM: Automatic Architecture Synthesis and Application MappingJozwiak, Lech / Lindwer, Menno / Corvino, Rosilde / Meloni, Paolo / Micconi, Laura / Madsen, Jan / Diken, Erkan / Gangadharan, Deepak / Jordans, Roel / Pomata, Sebastiano et al. | 2012
- 226
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Controlling Hardware Synthesis with AspectsCardoso, Joao M.P. / Carvalho, Tiago / Coutinho, Jose G.F. / Diniz, Pedro C. / Petrov, Zlatko / Luk, Wayne et al. | 2012
- 234
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FASTER: Facilitating Analysis and Synthesis Technologies for Effective ReconfigurationPnevmatikatos, D. / Becker, T. / Brokalakis, A. / Bruneel, K. / Gaydadjiev, G. / Luk, W. / Papadimitriou, K. / Papaefstathiou, I. / Pell, O. / Pilato, C. et al. | 2012
- 242
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Energy-Aware Fault-Tolerant Network-on-Chips for Addressing Multiple Traffic ClassesJafri, Syed M.A.H. / Guang, Liang / Hemani, Ahmed / Paul, Kolin / Plosila, Juha / Tenhunen, Hannu et al. | 2012
- 250
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Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGAKastil, Jan / Straka, Martin / Miculka, Lukas / Kotasek, Zdenek et al. | 2012
- 258
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Activity Migration in M-of-N-Systems by Means of Load-BalancingUlbricht, Markus / Vierhaus, Heinrich Theodor / Koal, Tobias et al. | 2012
- 264
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Protecting an Asynchronous NoC against Transient Channel FaultsNaqvi, Syed Rameez / Veeravalli, Varadan Savulimedu / Steininger, Andreas et al. | 2012
- 272
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On Distribution and Impact of Fault Effects at Real-Time Kernel and Application LevelsStrnadel, Josef / Slimarik, Frantiek et al. | 2012
- 280
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Exploiting Bus Level and Bit Level Inactivity for Preventing Wire Degradation due to ElectromigrationKayaalp, Mehmet / Koc, Fahrettin / Ergin, Oguz et al. | 2012
- 288
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A Heuristic Energy-Aware Approach for Hard Real-Time Systems on Multi-core PlatformsHe, Da / Mueller, Wolfgang et al. | 2012
- 296
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ONC3: All-Optical NoC Based on Cube-Connected Cycles with Quasi-DOR AlgorithmAbdollahi, Meisam / Tavana, Mohammad Khavari / Koohi, Somayyeh / Hessabi, Shaahin et al. | 2012
- 304
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Architecture Support and Comparison of Three Memory Consistency Models in NoC Based SystemsNaeem, Abdul / Jantsch, Axel / Lu, Zhonghai et al. | 2012
- 312
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A Simple On-Chip Optical Interconnection for Improving Performance of Coherency Traffic in CMPsBartolini, Sandro / Grani, Paolo et al. | 2012
- 319
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High Speed Dynamic Partial Reconfiguration for Real Time Multimedia Signal ProcessingBhandari, S. / Subbaraman, S. / Pujari, S. / Cancare, F. / Bruschi, F. / Santambrogio, M.D. / Grassi, P.R. et al. | 2012
- 327
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The Seat Adaptation System of REFLECT Project: Implementation of a Biocybernetic Loop in an Automotive EnvironmentBertolotti, Gian Mario / Cristiani, Andrea / Lombardi, Remo / Serbedzija, Nikola et al. | 2012
- 335
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The DeSyRe Project: On-Demand System ReliabilitySourdis, I. / Strydis, C. / Bouganis, C.S. / Falsafi, B. / Gaydadjiev, G.N. / Malek, A. / Mariani, R. / Pnevmatikatos, D. / Pradhan, D.K. / Rauwerda, G. et al. | 2012
- 343
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FASTCUDA: Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA KernelsMavroidis, Iakovos / Mavroidis, Ioannis / Papaefstathiou, Ioannis / Lavagno, Luciano / Lazarescu, Mihai / de la Torre, Eduardo / Schafer, Florian et al. | 2012
- 349
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COMPLEX: COdesign and Power Management in PLatform-Based Design Space EXplorationGruttner, Kim / Hartmann, Philipp A. / Hylla, Kai / Rosinger, Sven / Nebel, Wolfgang / Herrera, Fernando / Villar, Eugenio / Brandolese, Carlo / Fornaciari, William / Palermo, Gianluca et al. | 2012
- 359
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Using Genetic Algorithm to Identify Soft-Error Derating Blocks of an Application ProgramArasteh, Bahman / Rahmani, Amir Masoud / Mansoor, Ali / Miremadi, Seyed Ghassem et al. | 2012
- 368
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The Influence of Implementation Technology on Dependability ParametersSchmidt, Jan / Fier, Petr / Balcarek, Jiri et al. | 2012
- 374
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TSV-virtualization for Multi-protocol-Interconnect in 3D-ICsMiller, Felix / Wild, Thomas / Herkersdorf, Andreas et al. | 2012
- 382
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A Methodology for Early Exploration of TSV Placement Topologies in 3D Stacked ICsJagtap, Radhika / Kumar, Sumeet S. / van Leuken, Rene et al. | 2012
- 389
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Multi-device Driver Synthesis Flow for Heterogeneous Hierarchical SystemsChagoya-Garzon, Alexandre / Rousseau, Frederic / Petrot, Frederic et al. | 2012
- 397
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A Verifiable High Level Data Path Synthesis FrameworkMalazgirt, Gorker Alp / Culha, Ender / Sen, Alper / Baskaya, Faik / Yurdakul, Arda et al. | 2012
- 405
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Finite State Machine Synthesis Based on Relay-Based AlgorithmYang, M. / Lai, Jinmei / Xu, Hongying et al. | 2012
- 411
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VLSI Reverse Converter for RNS Based on the Moduli SetSousa, Leonel / Antao, Samuel et al. | 2012
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EJOP: An Extensible Java Processor with Reasonable Performance/Flexibility Trade-offTalebi, Samaneh / Abolghasemi, Niloofar / Jahanian, Ali et al. | 2012
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A Dual-Core Coprocessor with Native 4D Clifford Algebra SupportFranchini, Silvia / Gentile, Antonio / Vassallo, Giorgio / Sorbello, Filippo / Vitabile, Salvatore et al. | 2012
- 423
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SystemC Model Generation for Realistic Simulation of Networked Embedded SystemsLazarescu, Mihai / Sayyah, Parinaz / Quaglia, Davide / Stefanni, Francesco et al. | 2012
- 427
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How to Prove that a Circuit is Fault-Free?Ubar, Raimund / Kostin, Sergei / Raik, Jaan et al. | 2012
- 431
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On Modeling and Evaluation of Logic Circuits under Timing VariationsDehbashi, Mehdi / Fey, Gorschwin / Roy, Kaushik / Raghunathan, Anand et al. | 2012
- 437
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IEEE 802.11p Receiver Design for Software Defined Radio PlatformsSchmidt-Knorreck, Carina / Knorreck, Daniel / Knopp, Raymond et al. | 2012
- 445
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Analytical Design Space Exploration Based on Statistically Refined Runtime and Logic Estimation for Software Defined RadiosIhmig, Matthias / Feilen, Michael / Herkersdorf, Andreas et al. | 2012
- 453
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HDCRAM Proof-of-Concept for Opportunistic Spectrum AccessLazrak, Oussama / Leray, Pierre / Moy, Christophe et al. | 2012
- 459
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A Flexible Hardware Platform for Mobile Cognitive Radio ApplicationsBerg, Vincent / Noguet, Dominique / Popon, Xavier et al. | 2012
- 463
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Flexible OFDM Waveform for PLC/RF In-Vehicle CommunicationsNouvel, Fabienne / Tanguy, Philippe et al. | 2012
- 469
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Open Problems in Verification and Refinement of Autonomous Robotic SystemsBresolin, Davide / Di Guglielmo, Luigi / Geretti, Luca / Muradore, Riccardo / Fiorini, Paolo / Villa, Tiziano et al. | 2012
- 477
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Cyber-Physical Systems Design for Electric VehiclesLukasiewycz, Martin / Steinhorst, Sebastian / Sagstetter, Florian / Chang, Wanli / Waszecki, Peter / Kauer, Matthias / Chakraborty, Samarjit et al. | 2012
- 485
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Simulation-Based Analysis of Cyberphysical SystemsFujita, Masahiro et al. | 2012
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Model Checking on Hybrid AutomataCasagrande, Alberto / Piazza, Carla et al. | 2012
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Apple-CORE: Microgrids of SVP Cores -- Flexible, General-Purpose, Fine-Grained Hardware Concurrency ManagementPoss, Raphael / Lankamp, Mike / Yang, Qiang / Fu, Jian / van Tol, Michiel W. / Jesshope, Chris et al. | 2012
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HEAP: A Highly Efficient Adaptive Multi-processor FrameworkLavagno, Luciano / Lazarescu, Mihai / Papaefstathiou, Ioannis / Brokalakis, Andreas / Walters, Johan / Kienhuis, Bart / Schaefer, Florian et al. | 2012
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System Adaptivity and Fault-Tolerance in NoC-based MPSoCs: The MADNESS Project ApproachMeloni, Paolo / Tuveri, Giuseppe / Raffo, Luigi / Cannella, Emanuele / Stefanov, Todor / Derin, Onur / Fiorin, Leandro / Sami, Mariagiovanna et al. | 2012
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Coverage-Driven Stimuli GenerationYang, Shuo / Wille, Robert / Grosse, Daniel / Drechler, Rolf et al. | 2012
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Convolutional Decoding on Deep-pipelined SIMD Processor with Flexible Parallel MemoryWang, Jian / Karlsson, Andreas / Sohl, Joar / Liu, Dake et al. | 2012
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Hardware Acceleration of STON Algorithm for Comparing 3-D Structure of ProteinsKashi, Somayeh / Zamani, Morteza Saheb et al. | 2012
- 537
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High Level Modeling and Simulation of a Baseband Processor for the 60 GHz BandCabral, Ruben / Sarmento, Helena et al. | 2012
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A Virtual Platform for Performance Estimation of Many-core ImplementationsMarugan, Pablo Gonzalez de_Aledo / Gonzalez-Bayon, Javier / Espeso, Pablo Sanchez et al. | 2012
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Differential Scan Attack on AES with X-tolerant and X-masked Test Response CompactorEge, Baris / Das, Amitabh / Gosh, Santosh / Verbauwhede, Ingrid et al. | 2012
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A Parallel Architecture for Koblitz Curve Scalar Multiplications on FPGA PlatformsRoy, Sujoy Sinha / Rebeiro, Chester / Mukhopadhyay, Debdeep et al. | 2012
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Evaluating Cryptanalytical Strength of Lightweight Cipher PRESENT on Reconfigurable HardwarePospiil, Jan / Novotny, Martin et al. | 2012
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A High-Speed Unified Hardware Architecture for AES and the SHA-3 Candidate GrøstlRogawski, Marcin / Gaj, Kris et al. | 2012
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Minimizing Power Consumption of Spatial Division Based Networks-on-Chip Using Multi-path and Frequency ReductionWang, Sheng Hao / Das, Anup / Kumar, Akash / Corporaal, Henk et al. | 2012
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Optimal 2D Data Partitioning for DMA Transfers on MPSoCsSaidi, Selma / Tendulkar, Pranav / Lepley, Thierry / Maler, Oded et al. | 2012
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Distance-Constrained Force-Directed Process Mapping for MPSoC ArchitecturesSchonwald, Timo / Viehl, Alexander / Bringmann, Oliver / Rosenstiel, Wolfgang et al. | 2012
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Reducing Instruction Issue Overheads in Application-Specific Vector ProcessorsSykora, Jaroslav / Bartosinski, Roman / Kohout, Lukas / Danek, Martin / Honzik, Petr et al. | 2012
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Partitioning and Assignment Exploration for Multiple Modes of IEEE 802.11n Modem on Heterogeneous MPSoC PlatformsAgrawal, Prashant / Sugand, Kanishk / Palkovic, Martin / Raghavan, Praveen / Van Der Perre, Liesbet / Catthoor, Francky et al. | 2012
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Adaptive Field Strength ScalingL: A Power Optimization Technique for Contactless Reader / Smart Card SystemsDruml, Norbert / Menghin, Manuel / Steger, Christian / Weiss, Reinhold / Genser, Andreas / Bock, Holger / Haid, Josef et al. | 2012
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RF-Interconnect Resource Assignment and Placement Algorithms in Application Specific ICs to Improve Performance and Reduce Routing CongestionPourshirazi, Bahareh / Jahanian, Ali et al. | 2012
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High Performance Unified Architecture for Forward and Inverse Quantization in H.264/AVCDias, Tiago / Rosario, Luis / Roma, Nuno / Sousa, Leonel et al. | 2012
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JAAVR: Introducing the Next Generation of Security-Enabled RFID TagsWenger, Erich / Baier, Thomas / Feichtner, Johannes et al. | 2012
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FPGA-based Design Approaches of Keccak Hash FunctionProvelengios, George / Kitsos, Paris / Sklavos, Nicolas / Koulamas, Christos et al. | 2012
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PROCOMON: An Automatically Generated Predictive Control Signal MonitorKrieg, Armin / Grinschgl, Johannes / Druml, Norbert / Steger, Christian / Weiss, Reinhold / Bock, Holger / Haid, Josef et al. | 2012
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A Hardware-In-the-Design Methodology for Wireless Sensor Networks Based on Event-Driven Impulse Radio Ultra-Wide BandBonanno, Alberto / Sanginario, Alessandro / Crepaldi, Marco / Demarchi, Danilo et al. | 2012
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Energy Characterization and Classification of Embedded Operating System ServicesOuni, Bassem / Belleudy, Cecile / Senn, Eric et al. | 2012
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Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSEHerrera, F. / Posadas, H. / Villar, E. / Calvo, D. et al. | 2012
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Automated Generation of Embedded Systems Software from Timed DEVS Model of Computation SpecificationsMolter, H. Gregor / Kohlmann, Johannes / Huss, Sorin A. et al. | 2012
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Generation of VHDL Code from UML/MARTE Sequence Diagrams for Verification and SynthesisEbeid, Emad / Quaglia, Davide / Fummi, Franco et al. | 2012
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Extending MARTE to Support the Specification and the Generation of Data Intensive Applications for Massively Parallel SoCAmmar, M. / Baklouti, M. / Abid, M. et al. | 2012
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Managing a Massively-Parallel Resource-Constrained Computing ArchitecturePatterson, Cameron / Preston, Thomas / Galluppi, Francesco / Furber, Steve et al. | 2012
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Evaluation of a Connectionless NoC for a Real-Time Distributed Shared Memory Many-Core SystemRutgers, Jochem H. / Bekooij, Marco J.G. / Smit, Gerard J.M. et al. | 2012
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CoolMap: A Thermal-Aware Mapping Algorithm for Application Specific Networks-on-ChipMoazzen, Mostafa / Reza, Akram / Reshadi, Midia et al. | 2012
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Efficient DPA-Resistance Verification Method with Smaller Number of Power Traces on AES Cryptographic CircuitIto, Hiroki / Shiozaki, Mitsuru / Hoang, Anh-Tuan / Fujino, Takeshi et al. | 2012
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A Distributed Feedback Control Mechanism for Quality-of-Service Maintenance in Wireless Sensor NetworksSteine, Marcel / Geilen, Marc / Basten, Twan et al. | 2012
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MAMOT: Memory-Aware Mapping Optimization Tool for MPSoCJovanovic, Olivera / Marwedel, Peter / Bacivarov, Iuliana / Thiele, Lothar et al. | 2012
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OpenMP-based Synergistic Parallelization and HW Acceleration for On-Chip Shared-Memory ClustersBurgio, Paolo / Marongiu, Andrea / Heller, Dominique / Chavet, Cyrille / Coussy, Philippe / Benini, Luca et al. | 2012
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A Game Theoretical Thermal -- Aware Run -- Time Task Synchronization Method for Multiprocessor Systems -- on -- ChipAsgarieh, Yashar / Khabbazian, Mohammad-Hassan / Modarressi, Mehdi / Sarbazi-Azad, Hamid et al. | 2012
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Composable Virtual Memory for an Embedded SoCMeenderinck, Cor / Molnos, Anca / Goossens, Kees et al. | 2012
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Transformation-Based Exploration of Data Parallel Architecture for Customizable Hardware: A JPEG Encoder Case StudyCorvino, Rosilde / Diken, Erkan / Gamatie, Abdoulaye / Jozwiak, Lech et al. | 2012
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Parallel Decimal Multipliers and Squarers Using Karatsuba-Ofman's AlgorithmVestias, Mario / Neto, Horacio et al. | 2012
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The Synthesis of Combined Mealy and Moore Machines Structural Model Using Values of Output Variables as Codes of StatesKlimowicz, Adam / Salauyou, Valery et al. | 2012
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RNS Arithmetic Units for Modulo {2^n+-k}Matutino, Pedro Miguens / Pettenghi, Hector / Chaves, Ricardo / Sousa, Leonel et al. | 2012
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Scalability Study of Polymorphic Register FilesCiobanu, Catalin / Kuzmanov, Georgi / Gaydadjiev, Georgi et al. | 2012
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Pipelined Large Multiplier Designs on FPGAsSenturk, Ali / Gok, Mustafa et al. | 2012
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Implementation Study of FFT on Multi-lane Vector ProcessorsSpinean, Bogdan / Gaydadjiev, Georgi et al. | 2012
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Robust Evaluation of Weighted Random Logic BIST Structures in Industrial DesignsKrenz-Baath, Rene / Hapke, Friedrich / Hinze, Rolf / Meier, Reinhard / Ryynaenen, Maija / Glowatz, Andreas et al. | 2012
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Test Generation Approach for Post-Silicon Validation of High End MicroprocessorSadasivam, Satish Kumar / Alapati, Sangram / Mallikarjunan, Varun et al. | 2012
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Investigating Dependability of Short-Range Wireless Embedded Systems through Hardware Platform Based DesignSenouci, B. / Annema, A.J. / Bentum, M.J. / Kerkhoff, H.G. et al. | 2012
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Scan Based Tests via Standard InterfacesGleichner, Christian / Vierhaus, Heinrich T. / Engelke, Piet et al. | 2012
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Soft Error Analysis on Communication Channels in On-Chip Communication NetworksNajafi, Mohammadreza / Safari, Saeed / Navabi, Zainalabdein et al. | 2012
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Virtual Platform for Wireless Sensor NetworksDiaz, Alvaro / Diego, Raul / Sanchez, Pablo et al. | 2012
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Energy-Aware FPGA-based Architecture for Wireless Sensor NetworksGrassi, Paolo Roberto / Sciuto, Donatella et al. | 2012
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Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor NetworksGrassi, Paolo Roberto / Rana, Vincenzo / Beretta, Ivan / Sciuto, Donatella et al. | 2012
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A Predictor-Based Power-Saving Policy for DRAM MemoriesThomas, Gervin / Chandrasekar, Karthik / Akesson, Benny / Juurlink, Ben / Goossens, Kees et al. | 2012
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Evaluation of an FPGA-based Reconfigurable SoC for All-Digital Flexible RF TransmittersSilva, Nelson V. / Ventura, Manuel / Oliveira, Arnaldo S.R. / Carvalho, Nuno Borges et al. | 2012
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Design and Implementation of a Circuit for Mesh Networks with Application in Body Area NetworksDerogarian, Fardin / Ferreira, Joao Canas / Tavares, Vitor M. Grade et al. | 2012
- 902
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H.264 Macroblock Line Level Parallel Video Decoding on Embedded Multicore ProcessorsBaaklini, Elias / Sbeity, Hassan / Niar, Smail et al. | 2012
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Enhanced Omnidirectional Image Reconstruction Algorithm and Its Real-Time HardwareAkin, Abdulkadir / Erdede, Elif / Afshari, Hossein / Schmid, Alexandre / Leblebici, Yusuf et al. | 2012
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A Small and High-Performance Coprocessor for Fingerprint Match-on-CardChouta, Taoufik / Danger, Jean-Luc / Sauvage, Laurent / Graba, Tarik et al. | 2012
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On-Package Scalability of RF and Inductive Memory ControllersMarino, Mario Donato et al. | 2012
- 931
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A Hardware Accelerator for Real Time Simulation of Complex Neuronal ModelsMajani, Alessandra / Lorena, Maria Chiara / Danese, Giovanni / Leporati, Francesco et al. | 2012
- 938
-
Design of High-Speed Viterbi Decoders on Virtex-6 FPGAsVestias, Mario / Neto, Horacio / Sarmento, Helena et al. | 2012
- 946
-
Author index| 2012
- 952
-
[Publisher's information]| 2012
- C4
-
[Cover art]| 2012
- i
-
[Title page i]| 2012
- iii
-
[Title page iii]| 2012
- iv
-
[Copyright notice]| 2012
- v
-
Table of contents| 2012
- xix
-
Message from Program Chair| 2012
- xviii
-
Message from General Chair| 2012
- xxi
-
Organizing Committee| 2012
- xxiii
-
Program Committee| 2012
- xxvii
-
Reviewers| 2012
- xxviii
-
Keynotes [3 abstracts]| 2012