18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm (Englisch)
- Neue Suche nach: Ahmad, F.
- Neue Suche nach: Mellati, A.
- Neue Suche nach: Fernandez, A.
- Neue Suche nach: Iyer, A.
- Neue Suche nach: Fan, A.
- Neue Suche nach: Reyes, B.
- Neue Suche nach: Abidin, C.
- Neue Suche nach: Nani, C.
- Neue Suche nach: Albano, D.
- Neue Suche nach: Solis, F.
- Neue Suche nach: Minoia, G.
- Neue Suche nach: Hatcher, G.
- Neue Suche nach: Carrer, H.
- Neue Suche nach: Kota, K.
- Neue Suche nach: Wang, L.
- Neue Suche nach: Bachu, M.
- Neue Suche nach: Garampazzi, M.
- Neue Suche nach: Hassanpourghadi, M.
- Neue Suche nach: Fan, N.
- Neue Suche nach: Prabha, P.
- Neue Suche nach: Nguyen, R.
- Neue Suche nach: Ho, S.
- Neue Suche nach: Dusatko, T.
- Neue Suche nach: Wu, T.
- Neue Suche nach: Elsharkasy, W.
- Neue Suche nach: Sun, Z.
- Neue Suche nach: Jantzi, S.
- Neue Suche nach: Tse, L.
- Neue Suche nach: Ahmad, F.
- Neue Suche nach: Mellati, A.
- Neue Suche nach: Fernandez, A.
- Neue Suche nach: Iyer, A.
- Neue Suche nach: Fan, A.
- Neue Suche nach: Reyes, B.
- Neue Suche nach: Abidin, C.
- Neue Suche nach: Nani, C.
- Neue Suche nach: Albano, D.
- Neue Suche nach: Solis, F.
- Neue Suche nach: Minoia, G.
- Neue Suche nach: Hatcher, G.
- Neue Suche nach: Carrer, H.
- Neue Suche nach: Kota, K.
- Neue Suche nach: Wang, L.
- Neue Suche nach: Bachu, M.
- Neue Suche nach: Garampazzi, M.
- Neue Suche nach: Hassanpourghadi, M.
- Neue Suche nach: Fan, N.
- Neue Suche nach: Prabha, P.
- Neue Suche nach: Nguyen, R.
- Neue Suche nach: Ho, S.
- Neue Suche nach: Dusatko, T.
- Neue Suche nach: Wu, T.
- Neue Suche nach: Elsharkasy, W.
- Neue Suche nach: Sun, Z.
- Neue Suche nach: Jantzi, S.
- Neue Suche nach: Tse, L.
In:
2024 IEEE International Solid-State Circuits Conference (ISSCC)
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67
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342-344
;
2024
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ISBN:
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ISSN:
- Aufsatz (Konferenz) / Elektronische Ressource
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Titel:18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm
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Beteiligte:Ahmad, F. ( Autor:in ) / Mellati, A. ( Autor:in ) / Fernandez, A. ( Autor:in ) / Iyer, A. ( Autor:in ) / Fan, A. ( Autor:in ) / Reyes, B. ( Autor:in ) / Abidin, C. ( Autor:in ) / Nani, C. ( Autor:in ) / Albano, D. ( Autor:in ) / Solis, F. ( Autor:in )
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Erschienen in:
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Verlag:
- Neue Suche nach: IEEE
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Erscheinungsdatum:18.02.2024
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Format / Umfang:904311 byte
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ISBN:
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ISSN:
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DOI:
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Medientyp:Aufsatz (Konferenz)
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Format:Elektronische Ressource
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Sprache:Englisch
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Datenquelle:
Inhaltsverzeichnis Konferenzband
Die Inhaltsverzeichnisse werden automatisch erzeugt und basieren auf den im Index des TIB-Portals verfügbaren Einzelnachweisen der enthaltenen Beiträge. Die Anzeige der Inhaltsverzeichnisse kann daher unvollständig oder lückenhaft sein.
- 1
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31.9 An 85-264Vac to 3-4.2Vdc 1.05W Capacitive Power Converter with Idle Power Reduction and 4-Phase 1/10X SC Converter Achieving 5.11mW Quiescent Power and 78.2% Peak EfficiencyLiu, Gang / Wu, Han / Hu, Chen / Huang, Cheng / Liu, Xun / Jiang, Junmin et al. | 2024
- 1
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29.1 A 22nm FD-SOI <1.2mW/Active-Qubit AWG-Free Cryo-CMOS Controller for Fluxonium QubitsGuevel, Loick Le / Wang, Chen / Bardin, Joseph C. et al. | 2024
- 1
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19.3 An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F−1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMTKang, Zehui / Yu, Chen / Wu, Liang et al. | 2024
- 1
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8.8 A 97.18% Peak-Efficiency Asymmetrically Implemented Dual-phase (AID) Converter with a full Voltage-Conversion Ratio (VCR) between 0-and-1Park, Hyo-Jin / Cho, Joo-Mi / Lee, Chan-Ho / Oh, Young-Ju / Jeong, Hyunwoo / Yang, Jun-Hyeok / Lee, Jaeseung / Hong, Sung-Wan et al. | 2024
- 2
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ISSCC 2024 Copyright Page| 2024
- 3
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ISSCC 2024 TOC| 2024
- 4
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ISSCC 2024 Reflections| 2024
- 5
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ISSCC 2024 Foreword| 2024
- 8
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ISSCC 2024 Session 1 Overview: Plenary| 2024
- 10
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1.1 Semiconductor Industry: Present & FutureZhang, Kevin et al. | 2024
- 16
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1.2 Racing Down the Slopes of Moore’s LawNauta, Bram et al. | 2024
- 24
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ISSCC 2024 Awards Page| 2024
- 26
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1.3 Computing in the Era of Generative AIAlben, Jonah et al. | 2024
- 29
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1.4 Fueling Semiconductor Innovation and Entrepreneurship in the Next DecadeTan, Lip-Bu et al. | 2024
- 34
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ISSCC 2024 Session 2 Overview: Processors and Communication SoCs| 2024
- 36
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2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoCVarma, Anshul / Gururajarao, Sumanth / Chen, HsinChen / Chen, Tao / Gammie, Gordon / Mair, Hugh / Yang, Jen-Hang / Yu, Hao-Hsiang / Chang, Shun-Chieh / Yang, Cheng-Hao et al. | 2024
- 38
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2.2 “Zen 4c”: The AMD 5nm Area-Optimized ×86-64 Microprocessor CoreBurd, Thomas / Venkataraman, Srividhya / Li, Wilson / Johnson, Timothy / Lee, Jerry / Velaga, Srikirti / Wasio, Mark / Yiu, Thomas / Bodine, Franklin / McCabe, Michael et al. | 2024
- 40
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2.3 Emerald Rapids: 5th-Generation Intel® Xeon® Scalable ProcessorsMunch, Ashley O. / Nassif, Nevine / Molnar, Carleton L. / Crop, Jason / Gammack, Rich / Joshi, Chinmay P. / Zelic, Goran / Munshi, Kambiz / Huang, Min / Morganti, Charles R. et al. | 2024
- 42
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2.4 ATOMUS: A 5nm 32TFLOPS/128TOPS ML System-on-Chip for Latency Critical ApplicationsYu, Chang-Hyo / Kim, Hyo-Eun / Shin, Sungho / Bong, Kyeongryeol / Kim, Hyunsuk / Boo, Yoonho / Bae, Jaewan / Kwon, Minjae / Charfi, Karim / Kim, Jinseok et al. | 2024
- 44
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2.5 A 28nm Physical-Based Ray-Tracing Rendering Processor for Photorealistic Augmented Reality with Inverse Rendering and Background Clustering for Mobile DevicesGuo, Shiyu / Sapatnekar, Sachin / Gu, Jie et al. | 2024
- 46
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2.6 A 131mW 6.4Gbps 256×32 Multi-User MIMO OTFS Detector for Next-Gen Communication SystemsLee, Tang / Chen, Ting-Yang / Liu, I-Hsuan / Yang, Chia-Hsiang et al. | 2024
- 48
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2.7 BayesBB: A 9.6Gbps 1.61ms Configurable All-MessagePassing Baseband-Accelerator for B5G/6G Cell-Free Massive-MIMO in 40nm CMOSZhang, Yi / Zhou, Wenyue / Zhang, Yiwei / Ji, Houren / Huang, Yongming / You, Xiaohu / Zhang, Chuan et al. | 2024
- 50
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2.8 A 21.9ns 15.7 Gbps/mm² (128,15) BOSS FEC Decoder for 5G/6G URLLC ApplicationsKam, Dongyun / Yun, Sangbu / Choe, Jeongwon / Zhang, Zhengya / Lee, Namyoon / Lee, Youngjoo et al. | 2024
- 52
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ISSCC 2024 Session 3 Overview: Analog Techniques| 2024
- 54
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3.1 A PVT-Insensitive Sub-Ranging Current Reference Achieving 11.4ppm/°C from −20°C to 125°CPark, Pangi / Lee, Junghyup / Cho, SeongHwan et al. | 2024
- 56
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3.2 A 0.028mm² 32MHz RC Frequency Reference in 0.18μm CMOS with ±900ppm Inaccuracy from −40°C to 125°C and ±1600ppm Inaccuracy After Accelerated AgingPan, Sining / Cheng, Yihang / Wu, Guohua / Wang, Zhihua / Makinwa, Kofi A. A. / Wu, Huaqiang et al. | 2024
- 58
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3.3 A 0.5V 6.14μW Trimming-Free Single-XO Dual-Output Frequency Reference with [5.1nJ, 120μs] XO Startup and [8.1nJ, 200μs] Successive-Approximation-Based RTC CalibrationLuo, Rui / Lei, Ka-Meng / Martins, Rui P. / Mak, Pui-In et al. | 2024
- 60
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3.4 A 14b 98Hz-to-5.9kHz 1.7-to-50.8 μ W BW/Power Scalable Sensor Interface with a Dynamic Bandgap Reference and an Untrimmed Gain Error of ± 0.26 % from −40°C to 125°CTang, Zhong / Liu, Yuyan / Chen, Pengpeng / Wang, Haining / Yu, Xiaopeng / Makinwa, Kofi A. A. / Tan, Nick Nianxiong et al. | 2024
- 62
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3.5 A 4mW 45pT/√Hz Magnetoimpedance-Based ΔΣ Magnetometer with Background Gain Calibration and Short-Time CDS TechniquesAkita, Ippei / Tatematsu, Shunichi et al. | 2024
- 64
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3.6 An Amplifier-Less CMOS Potentiostat IC Consuming 3.7nW Power all over 129.5dB Dynamic Range for Electrochemical BiosensingAkram, Muhammad Abrar / Aberra, Aida / Kweon, Soon-Jae / Ha, Sohmyung et al. | 2024
- 66
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3.7 A β-Compensated NPN-Based Temperature Sensor with ±0.1°C (3σ) Inaccuracy from -55°C to 125°C and a 200fJ·K2 Resolution FoMToth, Nandor G. / Kofi Makinwa, A. A. et al. | 2024
- 68
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3.8 A 0.65V 900µm² BEoL RC-Based Temperature Sensor with ±1°C Inaccuracy from −25°C to 125°CLien, Bei-Shing / Liu, Szu Lin / Lai, Wei-Lin / Lu, Yi-Chen / Peng, Yung-Chow / Hsieh, Kenny Cheng-Hsiang et al. | 2024
- 70
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3.9 A 1.2V High-Voltage-Tolerant Bootstrapped Analog Sampler in 12-bit SAR ADC Using 3nm GAA’s 0.7V Thin-Gate-Oxide TransistorLee, Sangheon / Park, Jinwoo / Park, Junsang / Lee, Sangkyu / Lee, Jungho / Cho, Youngjae / Choi, Michael / Shin, Jongshin et al. | 2024
- 72
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3.10 A 0.69/0.58-PEF 1.6nW/24nW Capacitively Coupled Chopper Instrumentation Amplifier with an Input-Boosted First Stage in 22nm/180nm CMOSXu, Xinhang / Ye, Siyuan / Luan, Yaohui / Gao, Jihang / Li, Jie / Cui, Jiajia / Zhang, Hao / Huang, Ru / Shen, Linxiao / Ye, Le et al. | 2024
- 74
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ISSCC 2024 Session 4 Overview: High Performance Transceivers and Transmitters for Communication and Ranging| 2024
- 76
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4.1 A 79.7μW Two-Transceiver Direct-RF 7.875GHz UWB Radar SoC in 40nm CMOSAndersen, Nikolaj / Bagga, Sumit / Michaelsen, Jorgen Andreas / Hjortland, Hakon A. / Leene, Lieuwe / Skar, Torleif / Stenersen, Espen / Wisland, Dag T. et al. | 2024
- 78
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4.2 A Tri-Band Dual-Concurrent Wi-Fi 802.11be Transceiver Achieving -46dB TX/RX EVM Floor at 7.1GHz for a 4K-QAM 320MHz SignalLee, Jongsoo / Jang, Jaehyuk / Lee, Wooseok / Suh, Bosung / Yoo, Heeyong / Park, Beomyu / Woo, Jeongkyun / Jang, Jaeeun / Ryu, Inhyo / Han, Honggul et al. | 2024
- 80
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4.3 A 43mm2 Fully Integrated Legacy Cellular and 5G FR1 RF Transceiver with 24RX/3TX Supporting Inter-Band 7CA/5CA 4×4 MIMO with 1K-QAMBae, Jeongyeol / Lee, Sangsung / Lee, Joonggeun / Jo, Ikkyun / Kim, Heesoo / Yoon, Kyunghyun / Kim, Taejong / Lee, Jiyoung / Lee, Myunghun / Lee, Jaeseung et al. | 2024
- 82
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4.4 A Highly-Integrated 6-Phase Cell-Reused Digital Transmitter Using 1/3 Duty-Cycle LO Signals for Harmonic RejectionLi, Jiaxiang / Li, Zimu / Yin, Yun / Yan, Changgu / Qi, Nan / Liu, Ming / Xu, Hongtao et al. | 2024
- 84
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4.5 A Reconfigurable, Multi-Channel Quantized-Analog Transmitter with <-35dB EVM and <-51dBc ACLR in 22nm FDSOIZhong, John / Vasilakopoulos, Konstantinos / Liscidini, Antonio et al. | 2024
- 86
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ISSCC 2024 Session 5 Overview: Wireless RF and mm-Wave Receiver Techniques| 2024
- 88
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5.1 A 5-to-16GHz Reconfigurable Quadrature Receiver with 50% Duty-Cycle LO and IQ-Leakage SuppressionXu, Hao / Bi, Junyan / Zou, Tenghao / He, Weitao / Zeng, Yaxin / Gu, Junjie / Jiao, Ziyang / Liu, Shubin / Zhu, Zhangming / Yan, Na et al. | 2024
- 90
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5.2 0.25-to-4GHz Harmonic-Resilient Receiver with Built-In HR at Antenna and BB Achieving +14/+16.5dBm 3rd/5th IB Harmonic B1dBAraei, Soroush / Mohin, Shahabeddin / Reiskarimian, Negar et al. | 2024
- 92
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5.3 A 0.072mm2 18-to-21GHz Non-Uniform Sub-Sampling Receiver with a Non-Uniform Discrete-Time FIR Filter Achieving 42dB Blocker Rejection in 28nm CMOSAyesh, Mostafa / Mahapatra, Soumya / Yang, Ce / Chen, Mike Shuo-Wei et al. | 2024
- 94
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5.4 A 22.4-to-30.7GHz Phased-Array Receiver with Beam-Pattern Null-Steering and Beam-Tracking Techniques Achieving >30.2dB OTA-Tested Spatial RejectionYu, Yiming / Sun, Bohan / Geng, Mengqian / Zhao, Chenxi / Liu, Huihua / Wu, Yunqiu / Zhang, Jingzhi / Kang, Kai et al. | 2024
- 96
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5.5 A Stacking Mixer-First Receiver Achieving >20dBm Adjacent-Channel IIP3 Consuming less than 25mWvan Zanten, Stef / van der Zee, Ronan / Nauta, Bram et al. | 2024
- 98
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ISSCC 2024 Session 6 Overview: Imagers and Ultrasound| 2024
- 100
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6.1 12Mb/s 4×4 Ultrasound MIMO Relay with Wireless Power and Communication for Neural InterfacesSo, Ernest / Arbabian, Amin et al. | 2024
- 102
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6.2 An Ultrasound-Powering TX with a Global Charge-Redistribution Adiabatic Drive Achieving 69% Power Reduction and 53° Maximum Beam Steering Angle for Implantable ApplicationsGourdouparis, Marios / Shi, Chengyao / He, Yuming / Stanzione, Stefano / Ukropec, Robert / Gijsenbergh, Pieter / Rochus, Veronique / Helleputte, Nick Van / Serdijn, Wouter / Liu, Yao-Hong et al. | 2024
- 104
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6.3 Imager with In-Sensor Event Detection and Morphological Transformations with 2.9pJ/pixel×frame Object Segmentation FOM for Always-On Surveillance in 40nmVohra, Japesh / Gupta, Animesh / Alioto, Massimo et al. | 2024
- 106
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6.4 A Resonant High-Voltage Pulser for Battery-Powered Ultrasound DevicesBellouki, Imad / Rozsa, Nuriel / Chang, Zu-Yao / Chen, Zhao / Tan, Mingliang / Pertijs, Michiel et al. | 2024
- 108
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6.5 A 0.5° - Resolution Hybrid Dual-Band Ultrasound Imaging SoC for UAV ApplicationsGuo, Jiaqi / Feng, Junwei / Chen, Silin / Wu, Liuhao / Tsai, Chne-Wuen / Huang, Yingna / Lin, Bochi / Yoo, Jerald et al. | 2024
- 110
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ISSCC 2024 Withdrawn by ISSCC| 2024
- 112
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6.7 A 160×120 Flash LiDAR Sensor with Fully Analog-Assisted In- Pixel Histogramming TDC Based on Self-Referenced SAR ADCHan, Su-Hyun / Park, Seonghyeok / Chun, Jung-Hoon / Choi, Jaehyuk / Kim, Seong-Jin et al. | 2024
- 114
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6.8 A 256×192-Pixel 30fps Automotive Direct Time-of-Flight LiDAR Using 8× Current-Integrating-Based TIA, Hybrid Pulse Position/Width Converter, and Intensity/CNN-Guided 3D InpaintingZou, Chaorui / Ou, Yaozhong / Zhu, Yan / Martins, R. P. / Chan, Chi-Hang / Zhang, Minglei et al. | 2024
- 116
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6.9 A 0.35V 0.367TOPS/W Image Sensor with 3-Layer Optical-Electronic Hybrid Convolutional Neural NetworkWang, Xuecheng / Huang, Zheng / Liu, Tianyi / Shi, Wanxin / Chen, Hongwei / Zhang, Milin et al. | 2024
- 118
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6.10 A 1/1.56-inch 50Mpixel CMOS Image Sensor with 0.5μm pitch Quad Photodiode Separated by Front Deep Trench IsolationKim, DongHyun / Cho, Kwansik / Ji, Ho-Chul / Kim, Minkyung / Kim, Junghye / Kim, Taehoon / Seo, Seungju / Im, Dongmo / Lee, You-Na / Choi, Jinyong et al. | 2024
- 120
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6.11 A 320x240 CMOS LiDAR Sensor with 6-Transistor nMOS-Only SPAD Analog Front-End and Area-Efficient Priority Histogram MemoryKim, Minkyung / Seo, Hyeongseok / Kim, Songhyeon / Chun, Jung-Hoon / Kim, Seong-Jin / Choi, Jaehyuk et al. | 2024
- 122
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ISSCC 2024 Session 7 Overview: Ultra-High Speed Wireline| 2024
- 123
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7.1 A 2.69pJ/b 212Gb/s DSP-Based PAM-4 Transceiver for Optical Direct-Detect Application in 5nm FinFETWang, J. Q. / Tan, A. / Iyer, A. / Fan, A. / Farhoodfar, A. / Alnabulsi, B. / Smith, B. / Loi, C. / Ho, C. R. / Cartina, D. et al. | 2024
- 126
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7.2 A 224Gb/s sub pJ/b PAM-4 and PAM-6 DAC-Based Transmitter in 3nm FinFETCusmai, Marco / Familia, Noam / Kuperberg, Elad / Nashash, Mohammad / Gottesman, Dovid / Kumar, Daljeet / Marcus, Zvi / Horwitz, Yeshayahu / Zalcman, Sagi / Kim, Jihwan et al. | 2024
- 128
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7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOSPfaff, Dirk / Nummer, Muhammad / Hai, Noman / Xia, Peter / Yang, Kai Ge / Mohsenpour, Mohammad-Mahdi / LaCroix, Marc-Andre / Zamanlooy, Babak / Eeckelaert, Tom / Petrov, Dmitry et al. | 2024
- 130
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7.4 A 0.027mm2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and -74.2dBc Reference SpurHuang, Yunbo / Chen, Yong / Yang, Zunsong / Martins, Rui P. / Mak, Pui-In et al. | 2024
- 132
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7.5 A 224Gb/s/wire Single-Ended PAM-4 Transceiver Front-End with 29dB Equalization for 800GbE/1.6TbELuo, Xiongshi / You, Xuewei / Li, Zhenghao / Mosalam, Hamed / Xu, Dongfan / Fan, Taiyang / Qiao, Hongchang / Zhou, Wentao / Wu, Hongzhi / Zhong, Liping et al. | 2024
- 134
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7.6 A 112Gb/s/pin Single-Ended Crosstalk-Cancellation Transceiver with 31dB Loss Compensation in 28nm CMOSZhong, Liping / Wu, Hongzhi / Zhang, Yangyi / Cheng, Xuxu / Wu, Weitao / Wang, Catherine / Luo, Xiongshi / Fan, Taiyang / Xu, Dongfan / Pan, Quan et al. | 2024
- 136
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7.7 A 2.16pJ/b 112Gb/s PAM-4 Transceiver with Time-Interleaved 2b/3b ADCs and Unbalanced Baud-Rate CDR for XSR Applications in 28nm CMOSLin, Yen-Po / Peng, Pen-Jui / Lu, Chun-Chang / Shen, Po-Ting / Jao, Yun-Cheng / Hsieh, Ping-Hsuan et al. | 2024
- 138
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7.8 A 69.3fs Ring-Based Sampling-PLL Achieving 6.8GHz-14GHz and −54.4dBc Spurs Under 50mV Supply NoiseKhalil, Mahmoud A. / Younis, Mohamed Badr / Xia, Ruhao / Abdelrahman, Ahmed E. / Wang, Tianyu / Park, Kyu-Sang / Hanumolu, Pavan Kumar et al. | 2024
- 140
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7.9 An 8b 6-12GHz 0.18mW/GHz DC Modulated Ramp-Based Phase Interpolator in 65nm CMOS ProcessMohapatra, Soumen / Afshar, Emad / Zhou, Zhiyuan / Heo, Deukhyoun et al. | 2024
- 142
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ISSCC 2024 Session 8 Overview: Hybrid DC-DC Converters| 2024
- 144
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8.1 A 94.5%-Peak-Efficiency 3.99W/mm2-Power-Density Single-Inductor Bipolar-Output Converter with a Concise PWM Control for AMOLED DisplaysJin, Ji / Xu, Weiwei / Cheng, Lin et al. | 2024
- 146
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8.2 A 96.9%-Peak-Efficiency Bilaterally-Symmetrical Hybrid Buck-Boost Converter Featuring Seamless Single-Mode Operation, Always-Reduced Inductor Current, and the Use of All CMOS SwitchesKim, Dae-Hyeon / Kim, Hyun-Sik et al. | 2024
- 148
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A Li-ion-Battery-Input 1-to-6V-Output Bootstrap-Free Hybrid Buck-or-Boost Converter Without RHP Zero Achieving 97.3% Peak Efficiency 6μs Recovery Time and 1.13μs/V DVS RateRuan, Junyi / Jiang, Junmin / Ding, Chenzhou / Yuan, Kai / Leung, Ka Nang / Liu, Xun et al. | 2024
- 150
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8.4 A Fast-Transient 3-Fine-Level Buck-Boost Hybrid DC-DC Converter with Half-Voltage-Stress on All Switches and 98.2% Peak EfficiencyZhao, Shuangxing / Zhan, Chenchang / Lu, Yan et al. | 2024
- 152
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8.5 A 6nA Fully-Autonomous Triple-Input Hybrid-Inductor-Capacitor Multi-Output Power Management System with Multi-Rail Energy Sharing, All-Rail Cold Startup, and Adaptive Conversion Control for mm-scale Distributed SystemsLiu, Xinjian / Agrawal, Anjali / Tanaka, Akiyoshi / Calhoun, Benton et al. | 2024
- 156
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8.7 A 92.7% Peak Efficiency 12V-to-60V Input to 1.2V Output Hybrid DC-DC Converter Based on a Series-Parallel-Connected Switched CapacitorChoi, Hyeon-Ji / Lee, Chan-Ho / Jeon, Young-Jun / Park, Hyeonho / Kim, Jeong-Hun / Woo, Young-Jin / Hong, Ju-Pyo / Jin, Haifeng / Hong, Sung-Wan et al. | 2024
- 160
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8.9 A 96.5% Peak Efficiency Duty-Independent DC-DC Step-Up Converter with Low Input-Level Voltage Stress and Mode-Adaptive Inductor Current ReductionKim, Minsu / Jung, Woojoong / Park, Hyunjun / Song, Junho / Ahn, Youngkook / Nam, Taekyu / Shin, Yoonsoo / Woo, Young-Jin / Lee, Hyung-Min et al. | 2024
- 162
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8.10 A 5V-to-150V Input-Parallel Output-Series Hybrid DC-DC Boost Converter Achieving 76.4mW/mg Power Density and 80% Peak EfficiencyHan, Shousheng / Fang, Zanfeng / Tong, Zhiguo / Wu, Xiaoming / Jiang, Hanjun / Ren, Tianling / Lu, Yan et al. | 2024
- 164
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8.11 A 48V-to-5V Buck Converter with Triple EMI Suppression Circuit Meeting CISPR 25 Automotive StandardsKao, Yi-Hsiang / Hung, Chieh-Sheng / Chang, Hui-Hsuan / Huang, Wei-Cheng / Guo, Rong-Bin / Tsai, Hsing-Yen / Chen, Ke-Horng / Zeng, Kuo-Lin / Lin, Ying-Hsi / Lin, Shian-Ru et al. | 2024
- 166
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ISSCC 2024 Session 9 Overview: Noise-Shaping and SAR ADCs| 2024
- 168
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9.1 A 2mW 70.7dB SNDR 200MS/s Pipelined-SAR ADC with Continuous-Time SAR-Assisted Detect-and-Skip and Open-then-Close Correlated Level ShiftingYe, Siyuan / Shen, Linxiao / Gao, Jihang / Li, Jie / Chen, Zhuoyi / Xu, Xinhang / Cui, Jiajia / Zhang, Hao / Zhang, Xing / Ye, Le et al. | 2024
- 170
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9.2 A 2.08mW 64.4dB SNDR 400MS/s 12b Pipelined-SAR ADC using Mismatch and PVT Variation Tolerant Dynamically Biased Ring Amplifier in 8nmLim, Yong / Lee, Jaehoon / Lee, Jongmi / Lim, Kwangmin / Oh, Seunghyun / Lee, Jongwoo / Kwak, Sung-Ung et al. | 2024
- 172
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9.3 A 71dB SNDR 200MHz BW Interleaved Pipe-SAR ADC with a Shared Residue Integrating Amplifier Achieving 173dB FoMsHe, Xiyu / Gu, Mingyang / Jiang, Hanjun / Zhong, Yi / Sun, Nan / Jie, Lu et al. | 2024
- 174
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9.4 A 182.3dB FoMs 50MS/s Pipelined-SAR ADC using Cascode Capacitively Degenerated Dynamic Amplifier and MSB Pre-Conversion TechniqueChen, Zhuoyi / Shen, Linxiao / Ye, Siyuan / Gao, Jihang / Li, Jie / Cui, Jiajia / Xu, Xinhang / Luan, Yaohui / Zhang, Hao / Ye, Le et al. | 2024
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9.5 A 118.5dBA DR 3.3mW Audio ADC with a Class-B Resistor DAC, Non-Overlap DEM and Continuous-Time QuantizerSubramanian, Anand / Halder, Tanmay / Tripurari, Laxmi Vivek / Kannan, Anand et al. | 2024
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9.6 A 6th-Order Quadrature CTDSM using Double-OTA and Quadrature NSSAR with 171.3dB FoMs in 14nmLee, Jongmi / Cho, Seong-Eun / Lee, Jaehoon / Lim, Yong / Oh, Seunghyun / Lee, Jongwoo / Kwak, Sung-Ung et al. | 2024
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9.7 A 94.3dB SNDR 184dB FoMs 4th-Order Noise-Shaping SAR ADC with Dynamic-Amplifier-Assisted Cascaded IntegratorCheng, Kai-Cheng / Chang, Soon-Jyh / Chen, Chung-Chieh / Hung, Shuo-Hong et al. | 2024
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9.8 A 9.3nV/rtHz 20b 40MS/s 94.2dB DR Signal-Chain Friendly Precision SAR ConverterBodnar, Rares / Kennedy, Henry / Hurrell, Christopher P / Ahmad, Asif / Vickery, Mark / Smithers, Luke / Buckley, William / Dutt, Monsoon / Delizia, Pasquale / Hummerston, Derek et al. | 2024
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9.9 A 2.72fJ/conv 13b 2MS/s SAR ADC Using Dynamic Capacitive Comparator with Wide Input Common ModeLee, Sewon / Kang, Hyein / Lee, Minjae et al. | 2024
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ISSCC 2024 Session 10 Overview: Frequency Synthesis| 2024
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10.1 An 8.75GHz Fractional-N Digital PLL with a Reverse-Concavity Variable-Slope DTC Achieving 57.3fsrms Integrated Jitter and −252.4dB FoMRossoni, Michele / Dartizio, Simone Mattia / Tesolin, Francesco / Castoro, Giacomo / Dell'Orto, Riccardo / Samori, Carlo / Lacaita, Andrea Leonardo / Levantino, Salvatore et al. | 2024
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10.2 A 5.5μs-Calibration-Time, Low-Jitter, and Compact-Area Fractional-N Digital PLL Using the Recursive-Least-Squares (RLS) AlgorithmJang, Seheon / Chae, Munjae / Park, Hangi / Hwang, Chanwoong / Choi, Jaehyouk et al. | 2024
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10.3 A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated JitterXu, Dingxin / Liu, Zezheng / Kuai, Yifeng / Huang, Hongye / Zhang, Yuncheng / Sun, Zheng / Liu, Bangan / Wang, Wenqian / Xiong, Yuang / Qiu, Junjun et al. | 2024
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10.4 A 45.5fs-Integrated-Random-Jitter and -75dBc-Integer-Boundary-Spur BiCMOS Fractional-N PLL with Suppression of Fractional, Horn, and Wandering SpursKennedy, Michael Peter / Mazzaro, Valerio / Tulisi, Stefano / Scully, Micheal / McDermott, Niall / Breslin, James et al. | 2024
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10.5 A 76 fsrms- Jitter and -65dBc- Fractional-Spur Fractional-N Sampling PLL Using a Nonlinearity-Replication TechniqueShin, Yuhwan / Lee, Junseok / Kim, Juyeop / Jo, Yongwoo / Choi, Jaehyouk et al. | 2024
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10.6 A 10GHz FMCW Modulator Achieving 680MHz/μs Chirp Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a Non-Uniform Piecewise-Parabolic Digital PredistortionTesolin, Francesco / Dartizio, Simone Mattia / Castoro, Giacomo / Buccoleri, Francesco / Rossoni, Michele / Cherniak, Dmytro / Samori, Carlo / Lacaita, Andrea Leonardo / Levantino, Salvatore et al. | 2024
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10.7 An 11GHz 2nd-order DPD FMCW Chirp Generator with 0.051% rms Frequency Error under a 2.3GHz Chirp Bandwidth, 2.3GHz/μs Slope, and 50ns Idle Time in 65nm CMOSWang, Xuan / Ma, Xujun / Fu, Yupeng / Zhou, Yuqian / Li, Ang / Yang, Shuo / Wu, Xu / Wang, Dongming / Li, Lianming / You, Xiaohu et al. | 2024
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10.8 A 281GHz, −1.5dBm Output-Power CMOS Signal Source Adopting a 46fsrms Jitter D-Band Cascaded Subharmonically Injection-Locked Sub-Sampling PLL with a 274MHz ReferenceMoon, Byeong-Taek / Park, Hyun-Chul / Lee, Sang-Gug et al. | 2024
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10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase AlignmentLi, Haoran / Xu, Tailong / Meng, Xi / Yin, Jun / Martins, Rui P. / Mak, Pui-In et al. | 2024
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ISSCC 2024 Session 11 Overview: Highlighted Chip Releases: Digital and Machine Learning Processors| 2024
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11.2 A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area FootprintWu, Tony F. / Liu, Huichu / Sumbul, H. Ekin / Yang, Lita / Baheti, Dipti / Coriell, Jeremy / Koven, William / Krishnan, Anu / Mittal, Mohit / Moreira, Matheus Trevisan et al. | 2024
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11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the EdgeHager, Pascal Alexander / Moons, Bert / Cosemans, Stefan / Papistas, Ioannis A. / Rooseleer, Bram / Loon, Jeroen Van / Uytterhoeven, Roel / Zaruba, Florian / Koumousi, Spyridoula / Stanisavljevic, Milos et al. | 2024
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11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm ChipCassidy, Andrew S. / Arthur, John V. / Akopyan, Filipp / Andreopoulos, Alexander / Appuswamy, Rathinakumar / Datta, Pallab / Debole, Michael V. / Esser, Steven K. / Otero, Carlos Ortega / Sawada, Jun et al. | 2024
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ISSCC 2024 Session 12 Overview: Electromagnetic Interface ICs for Information and Power Transfer| 2024
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12.1 Monolithically Integrated Sub-63 fJ/b 8-Channel 256Gb/s Optical Transmitter with Autonomous Wavelength Locking in 45nm CMOS SOIOmirzakhov, Kaisarbek / Aflatouni, Firooz et al. | 2024
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12.2 A mm-Wave/Sub-THz Synthesizer-Free Coherent Receiver with Phase Reconstruction Through Mixed-Signal Kramer-Kronig ProcessingGhozzy, Sherif / Allam, Muhamed / Karahan, Emir Ali / Liu, Zheng / Sengupta, Kaushik et al. | 2024
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12.3 A Scalable and Instantaneously Wideband 5GS/s RF Correlator Based on Charge Thresholding Achieving 8-bit ENOB and 152 TOPS/W Compute EfficiencyRashed, Kareem / Undavalli, Aswin / Chakrabartty, Shantanu / Nagulu, Aravind / Natarajan, Arun et al. | 2024
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12.4 A 19μW 200Mb/s loT Tag Demonstrating High-Definition Video Streaming via a Digital-Switch-Based Reconfigurable 16-QAM Backscatter Communication TechniqueZhang, Yongling / Luo, Rongliang / Xiong, Ji / Liang, Siqi / Meng, Miao et al. | 2024
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12.5 A Packageless Anti-Tampering Tag Utilizing Unclonable Sub-THz Wave Scattering at the Chip-Item InterfaceLee, Eunseok / Chen, Xibi / Ashok, Maitreyi / Won, Jaeyeon / Chandrakasan, Anantha / Han, Ruonan et al. | 2024
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12.6 A 64.4% Efficiency 5.8GHz RF Wireless Power Transfer Receiver with GaAs E-pHEMT Rectifier and 45.2µs MPPT Time SIDITO Buck-Boost Converter Using VOC Prediction SchemeIchikawa, Kyohei / Iwata, Tatsuki / Onishi, Saya / Higuchi, Tomohiro / Hirose, Yuya / Sakai, Naoki / Itoh, Kenji / Miyaji, Kousuke et al. | 2024
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ISSCC 2024 Session 13 Overview: High-Density Memories and High-Speed Interfaces| 2024
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13.1 A 35.4Gb/s/pin 16Gb GDDR7 with a Low-Power Clocking Architecture and PAM3 IO CircuitryYang, Jaehyeok / Ko, Hyeongjun / Kim, Kyunghoon / Park, Hyunsu / Park, Jihwan / Kang, Ji-Hyo / Cha, Jinyoup / Kim, Seongjin / Kim, Youngtaek / Park, Minsoo et al. | 2024
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13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM ProcessChoi, Ikjoon / Hong, Seunghwan / Kim, Kihyun / Hwang, Jeong-Sik / Woo, Seunghan / Kim, Young-Sang / Cho, Cheong-Ryong / Lee, Eun-Young / Lee, Hun-Jae / Jung, Min-Su et al. | 2024
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13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5Gb/mm2 Areal Density and a 3.2GB/s High-Speed IO RateJung, Wontaeck / Kim, Hyunggon / Kim, Do-Bin / Kim, Tae-Hyun / Lee, Namhee / Shin, Dongjin / Kim, Minyoung / Rho, Youngsik / Lee, Hun-Jong / Hyun, Yujin et al. | 2024
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13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area OptimizationLee, Jinhyung / Cho, Kyungjun / Lee, Chang Kwon / Lee, Yeonho / Park, Jae-Hyung / Oh, Su-Hyun / Ju, Yucheon / Jeong, Chunseok / Cho, Ho Sung / Lee, Jaeseung et al. | 2024
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13.5 A 64Gb/s/pin PAM4 Single-Ended Transmitter with a Merged Pre-Emphasis Capacitive-Peaking Crosstalk-Cancellation Scheme for Memory Interfaces in 28nm CMOSWu, Weitao / Wu, Hongzhi / Zhong, Liping / Cheng, Xuxu / Luo, Xiongshi / Xu, Dongfan / Wang, Catherine / Li, Zhenghao / Pan, Quan et al. | 2024
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13.6 A 16Gb 37Gb/s GDDR7 DRAM with PAM3-Optimized TRX Equalization and ZQ CalibrationCho, Sung-Yong / Choi, Moon-Chul / Baek, Jaehyeok / An, Donggun / Kim, Sanghoon / Lee, Daewoong / Yang, Seongyeal / Kang, Gil-Young / Park, Juseop / Lee, Kyungho et al. | 2024
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13.7 A 1Tb Density 3b/Cell 3D-NAND Flash on a 2YY-Tier Technology with a 300MB/s Write ThroughputKawai, Koichi / Einaga, Yuichi / Oikawa, Yoko / He, Yankang / Iorio, Biagio / Yamada, Shigekazu / Kamata, Yoshihiko / Iwasaki, Tomoko / D'Alessandro, Andrea / Yu, Erwin et al. | 2024
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13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance ReductionSeo, Yangho / Choi, Jihee / Cho, Sunki / Han, Hyunwook / Kim, Wonjong / Ryu, Gyeongha / Ahn, Jungil / Cho, Younga / Choi, Sungphil / Lee, Seohee et al. | 2024
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13.9 A 25.2Gb/s/pin NRZ/PAM-3 Dual-Mode Transmitter with Embedded Partial DBI Achieving a 133% I/O Bandwidth/Pin Efficiency and 19.3% DBI EfficiencyHan, Chanheum / Lee, Ki-Soo / Chae, Joo-Hyung et al. | 2024
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13.10 A 4nm 48Gb/s/wire Single-Ended NRZ Parallel Transceiver with Offset-Calibration and Equalization Schemes for Next-Generation Memory Interfaces and ChipletsSeong, Kihwan / Oh, Wooseuk / Lee, Hyunwoo / Bae, Gyeomje / Suh, Youngseob / Lee, Hyemun / Kim, Juyoung / Kim, Eunsu / Kang, Yeongeon / Mo, Gunhu et al. | 2024
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ISSCC 2024 Session 14 Overview: Digital Techniques for System Adaptation, Power Management and Clocking| 2024
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14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoCKar, Monodeep / Silberman, Joel / Venkataramani, Swagath / Srinivasan, Viji / Fleischer, Bruce / Rubin, Joshua / Lancaster, JohnDavid / Lee, Saekyu / Cohen, Matthew / Ziegler, Matthew et al. | 2024
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14.2 Proactive Voltage Droop Mitigation Using Dual-Proportional-Derivative Control Based on Current and Voltage Prediction Applied to a Multicore Processor in 28nm CMOSShan, Weiwei / Zhou, Kaize / Li, Keran / Du, Yuxuan / Chen, Zhuo / Qian, Junyi / Ge, Haitao / Yang, Jun / Si, Xin et al. | 2024
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14.3 A 3nm Adaptive Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle DistortionYingling, Daniel / Peng, Yimai / Vachon, Robert / Pal, Dipti / Jariwala, Sagar / Cabral, Felipe / Hu, Jason / Verma, Rajan / Chiranji, Vamshidhar / Kumar, Anil et al. | 2024
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14.4 A Fully Digital Current Sensor Offering Per-Core Runtime Power for System Budgeting in a 4nm-Plus Octa-Core CPULu, Chien-Yu / Huang, Bo-Jr / Chen, Min-Chieh / Tsai, Ollie / Tsai, Alfred / Fang, Eric Jia-Wei / Cho, Yuju / Chen, Harry H. / Kao, Ping / Wang, Ericbill et al. | 2024
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14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data OrchestrationDos Santos, Maico Cassel / Jia, Tianyu / Zuckerman, Joseph / Cochet, Martin / Giri, Davide / Loscalzo, Erik Jens / Swaminathan, Karthik / Tambe, Thierry / Zhang, Jeff Jun / Buyuktosunoglu, Alper et al. | 2024
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14.6 A 10A Computational Digital LDO Achieving 263A/mm2 Current Density with Distributed Power-Gating Switches and Time-Based Fast-Transient Controller for Mobile SoC Application in 3nm GAAFETLee, Dongha / Kim, Seki / Nomiyama, Takahiro / Jung, Dong-Hoon / Kim, Dongsu / Lee, Jongwoo / Kwak, Sungung et al. | 2024
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14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOSFeng, Liqun / Ji, Xuansheng / Kuang, Longhao / Liao, Qianxian / Han, Su / Zhao, Jiahao / Rhee, Woogeun / Wang, Zhihua et al. | 2024
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14.8 KASP: A 96.8% 10-Keyword Accuracy and 1.68μJ/Classification Keyword Spotting and Speaker Verification Processor Using Adaptive Beamforming and Progressive Wake-UpXiao, Jianbiao / Zhang, Xuhui / Zhu, Shijian / Yang, Zhengwei / Du, Meng / Ji, Chunsheng / Long, Yu / Chen, Xiao / Miao, Xiaoyu / Zhou, Liang et al. | 2024
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14.9 A Monolithic 10.5W/mm2600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOSKim, Suhwan / Krishnamurthy, Harish K / Ahmed, Zakir / Desai, Nachiket / Weng, Sheldon / Augustine, Anne / Do, Huong T. / Yu, Jingshu / Bach, Phong D. / Liu, Xiaosen et al. | 2024
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14.10 34.7A/mm2 Scalable Distributed All-Digital 6×6 Dot-LDOs Featuring Freely Linkable Current-Sharing Network: A Fine-Grained On-Chip Power Delivery Solution in 28nm CMOSLee, Yong-Jin / Jang, Woojin / Bae, Hong-Hyun / Cho, Jeong-Hyun / Kim, Hyun-Sik et al. | 2024
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ISSCC 2024 Session 15 Overview: Embedded Memories & Ising Computing| 2024
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15.1 A 0.795fJ/bit Physically-Unclonable Function-Protected TCAM for a Software-Defined Networking SwitchYue, Zhiheng / Xiang, Xujiang / Tu, Fengbin / Wang, Yang / Wang, Yiming / Wei, Shaojun / Hu, Yang / Yin, Shouyi et al. | 2024
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15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerViaKim, Daeyeon / Kim, Yusung / Shrivastava, Ayush / Park, Gyusung / Pillai, Anandkumar Mahadevan / Bannore, Kunal / Doan, Tri / Rahman, Muktadir / Baek, Gwanghyeon / Ong, Clifford et al. | 2024
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15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank ArchitectureHaraguchi, Masaru / Fujino, Yorinobu / Yokoyama, Yoshisato / Chang, Ming-Hung / Hsu, Yu-Hao / Cheng, Hong-Chen / Nii, Koji / Wang, Yih / Chang, Tsung-Yung Jonathan et al. | 2024
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15.4 Self-Enabled Write-Assist Cells for High-Density SRAM in a Resistance-Dominated Technology NodeYeo, Minjune / Cho, Keonhee / Kim, Giseok / Jo, Won Joon / Oh, Jisang / Kim, Sekeon / Baek, Kyeongrim / Park, Sungho / Yei, Seung Jae / Jung, Seong-Ook et al. | 2024
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15.5 LISA: A 576×4 All-in-One Replica-Spins Continuous-Time Latch-Based Ising Computer Using Massively-Parallel Random-Number Generations and Replica EqualizationsBae, Jooyoung / Koo, Jahyun / Shim, Chaeyun / Kim, Bongjin et al. | 2024
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15.6 e-Chimera: A Scalable SRAM-Based Ising Macro with Enhanced-Chimera Topology for Solving Combinatorial Optimization Problems Within MemoryBae, Jooyoung / Shim, Chaeyun / Kim, Bongjin et al. | 2024
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15.7 A 32Mb RRAM in a 12nm FinFet Technology with a 0.0249μm2 Bit-Cell, a 3.2GB/S Read Throughput, a 10KCycle Write Endurance and a 10-Year Retention at 105°CHuang, Yi-Cheng / Liu, Shang-Hsuan / Chen, Hsu-Shun / Feng, Hsin-Chang / Li, Chih-Feng / Yang, Chou-Ying / Chang, Wei-Keng / Yang, Chang-Feng / Wu, Chun-Yu / Lin, Yen-Cheng et al. | 2024
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15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUsOgawa, Tomoya / Matsubara, Ken / Taito, Yasuhiko / Saito, Tomoya / Izuna, Masayuki / Takeda, Koichi / Kaneda, Yoshinobu / Shimoi, Takahiro / Mitani, Hidenori / Ito, Takashi et al. | 2024
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15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion SchemesLin, Ku-Feng / Noguchi, Hiroki / Shih, Yi-Chun / Yuh, Perng-Fei / Lee, Yuan-Jen / Chang, Tung-Cheng / Huang, Sheng-Po / Lin, Yu-Fan / Lee, Chun-Ying / Huang, Yen-Hsiang et al. | 2024
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ISSCC 2024 Session 16 Overview: Security: From Processors to Circuits| 2024
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16.1 A 2.7-to-13.3μJ/boot/slot Flexible RNS-CKKS Processor in 28nm CMOS Technology for FHE-Based Privacy-Preserving ComputingLee, Hyunhoon / Kwon, Hyeokjun / Lee, Youngjoo et al. | 2024
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16.2 A 28nm 69.4kOPS 4.4μJ/Op Versatile Post-Quantum Crypto-Processor Across Multiple Mathematical ProblemsZhu, Yihong / Zhu, Wenping / Ouyang, Yi / Sun, Junwen / Zhu, Min / Zhao, Qi / Yang, Jinjiang / Chen, Chen / Tao, Qichao / Yang, Guang et al. | 2024
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16.3 3nm Physical Unclonable Function with Multi-Mode Self-Destruction and 3.48×10-5 Bit Error RateHunt-Schroeder, Eric / Lin-Butler, Parker / Degada, Amit / Xia, Tian et al. | 2024
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16.4 High-Density and Low-Power PUF Designs in 5nm Achieving 23× and 39× BER Reduction After Unstable Bit Detection and MaskingKudva, Sudhir Shrikantha / Sinangil, Mahmut Ersin / Tell, Stephen / Nedovic, Nikola / Song, Sanquan / Zimmer, Brian / Gray, C. Thomas et al. | 2024
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16.5 A Synthesizable Design-Agnostic Timing Fault Injection Monitor Covering 2MHz to 1.26GHz Clocks in 65nm CMOSHe, Yan / Yang, Kaiyuan et al. | 2024
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16.6 PACTOR: A Variation-Tolerant Probing-Attack Detector for a 2.5Gb/s×4-Channel Chip-to-Chip Interface in 28nm CMOSLi, Mao / Wang, Zhaoqing / Mathew, Sanu K. / De, Vivek / Seok, Mingoo et al. | 2024
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Power and EM Side-Channel-Attack-Resilient AES-128 Core with Round-Aligned Globally-Synchronous-Locally-Asynchronous Operation Based on Tunable Replica CircuitsOruganti, Sirish / Wang, Meizhi / Iyer, Vishnuvardhan V. / Wang, Yipeng / Yang, Mengtian / Kumar, Raghavan / Mathew, Sanu K. / Kulkarni, Jaydeep P. et al. | 2024
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16.8 A 60Mb/s TRNG with PVT-Variation-Tolerant Design Based on STR in 4nmPark, Jieun / Lee, Yong Ki / Bohdan, Karpinskyy / Choi, Yunhyeok / Shin, Jonghoon / Rhew, Hyo-Gyuem / Shin, Jongshin et al. | 2024
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ISSCC 2024 Session 17 Overview: Emerging Sensing and Computing Technologies| 2024
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17.1 Omnidirectional Magnetoelectric Power Transfer for Miniaturized Biomedical Implants via Active EchoWang, Wei / Yu, Zhanghao / Zou, Yiwei / Woods, Joshua / Chari, Prahalad / Robinson, Jacob T. / Yang, Kaiyuan et al. | 2024
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17.2 A Miniature Multi-Nuclei NMR/MRI Platform with a High-Voltage SOI ASIC Achieving a 134.4dB Image SNR with a 173×250×103μm3 ResolutionFan, Shuhao / Zhou, Qi / Lei, Ka Meng / Martins, Rui P. / Mak, Pui-In et al. | 2024
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17.3 A Fully Wireless, Miniaturized, Multicolor Fluorescence Image Sensor Implant for Real-Time Monitoring in Cancer TherapyRabbani, Rozhan / Roschelle, Micah / Gweon, Surin / Kumar, Rohan / Vercruysse, Alec / Cho, Nam Woo / Spitzer, Matthew H. / Niknejad, Ali M. / Stojanovic, Vladimir M. / Anwar, Mekhail et al. | 2024
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17.4 Environmentally-Friendly Disposable Circuit and Battery System for Reducing Impact of E-WastesMiura, Naoki / Taguchi, Hiroaki / Watanabe, Kazuyoshi / Nohara, Masaya / Makita, Tatsuyuki / Tanabe, Masahiro / Wakimoto, Takahiro / Kumagai, Shohei / Nosaka, Hideyuki / Aratake, Atsushi et al. | 2024
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17.5 A 24V Mini-Coil Magnetic Neural Stimulator with Closed-Loop Deadtime Control and ZCS Control Achieving 99.76% Charge Recovery EfficiencyFan, Yingying / Liu, Yuxuan / Topalli, Gerald / Lycke, Roy / Luan, Lan / Xie, Chong / Chi, Taiyun et al. | 2024
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17.6 Fully Integrated CMOS Ferrofluidic Biomolecular Processing Platform with On-Chip Droplet-Based Manipulation, Multiplexing and SensingLee, Dongwon / Choi, Kyung-Sik / Jiang, Fuze / Liu, Hangxing / Jung, Doohwan / Kong, Ying / Saif, Marco / Huang, Zhikai / Wang, Jing / Wang, Hua et al. | 2024
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17.7 Droplet Microfluidics Co-Designed with Real-Time CMOS Luminescence Sensing and Impedance Spectroscopy of 4nL Droplets at a 67mm/s VelocityLiu, Qijun / Mendoza, Diana Arguijo / Yasar, Alperen / Caygara, Dilara / Kassem, Aya / Densmore, Douglas / Yazicigil, Rabia Tugce et al. | 2024
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17.8 0.4V 988nW Time-Domain Audio Feature Extraction for Keyword Spotting Using Injection-Locked OscillatorsMostafa, Ali / Hardy, Emmanuel / Badets, Franck et al. | 2024
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17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAMTan, Fei / Yu, Wei-Han / Lin, Jinhai / Un, Ka-Fai / Martins, Rui P. / Mak, Pui-In et al. | 2024
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17.10 A 0.4V, 750nW, Individually Accessible Wireless Capacitive Sensor Interface IC for a Tactile Sensing NetworkHao, Han / Richardson, Andrew G. / Ding, Yixiao / Du, Lin / Allen, Mark G. / Spiegel, Jan Van der / Aflatouni, Firooz et al. | 2024
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17.11 A 9mW Ultrasonic Through Transmission Transceiver for Non-Invasive Intracranial Pressure SensingTopalli, Gerald / Fan, Yingying / Cheung, Matt Y. / Veeraraghavan, Ashok / Hirzallah, Mohammad / Chi, Taiyun et al. | 2024
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ISSCC 2024 Session 18 Overview: High-Performance Optical Transceivers| 2024
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18.1 A 600Gb/s DP-QAM64 Coherent Optical Transceiver Frontend with 4x105GS/s 8b ADC/DAC in 16nm CMOSLi, Guansheng / Garg, Adesh / He, Tim / Singh, Ullas / Zhang, Jiawen / Rao, Lakshmi / Liu, Chang / Nazari, Meisam / Liu, Yang / Liu, Yong et al. | 2024
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18.2 A 4x64Gb/s NRZ 1.3pJ/b Co-Packaged and Fiber-Terminated 4-Ch VCSEL-Based Optical TransmitterMondal, Susnata / Qiu, Junyi / Krishnamurthy, Sashank / Kennedy, Joe / Bose, Soumya / Acikalin, Tolga / Yamada, Shuhei / Jaussi, James / Mansuri, Mozhgan et al. | 2024
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18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nmAhmad, F. / Mellati, A. / Fernandez, A. / Iyer, A. / Fan, A. / Reyes, B. / Abidin, C. / Nani, C. / Albano, D. / Solis, F. et al. | 2024
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18.4 A 200GS/s 8b 20fJ/c-s Receiver with >60GHz AFE Bandwidth for 800Gb/s Optical Coherent Communications in 5nm FinFETNguyen, R. L. / Mellati, A. / Fernandez, A. / Iyer, A. / Fan, A. / Reyes, B. / Abidin, C. / Nani, C. / Albano, D. / Ahmad, F. et al. | 2024
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ISSCC 2024 Session 19 Overview: RF to mm-Wave Oscillators and Multipliers| 2024
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19.1 A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference, -259.7dB FoMJ, and -56.6dBc Reference SpurChoi, Hangil / Cho, SeongHwan et al. | 2024
- 350
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19.2 A 12.4% Efficiency, 11dBm Psat, Odd-Harmonics-Recycling, 62-to-92GHz CMOS Frequency Quadrupler Using an Amplitude-Phase Coordinating TechniqueLin, Zhen / Shen, Yizhu / Ding, Yifan / Hu, Sanming et al. | 2024
- 354
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19.4 A 0.07 mm2 20-to-23.8GHz 8-phase Oscillator Incorporating Magnetic + Dual-Injection Coupling Achieving 189.2dBc/Hz FoM@10 MHz and 200.7dBc/Hz FoMA in 65nm CMOSZhao, Ya / Fan, Chao / Fang, Qiuyu / Zhang, Guohe / Yin, Jun / Mak, Pui-In / Geng, Li et al. | 2024
- 356
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19.5 A 13.7-to-41.5GHz 214.1dBc/Hz FoMT Quad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting TechniqueGe, Huanyu / Jia, Haikun / Deng, Wei / Ma, Ruichang / Wang, Zhihua / Chi, Baoyong et al. | 2024
- 358
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ISSCC 2024 Session 20 Overview: Machine Learning Accelerators| 2024
- 360
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20.1 NVE: A 3nm 23.2TOPS/W 12b-Digital-CIM-Based Neural Engine for High-Resolution Visual-Quality Enhancement on Smart DevicesShih, Ming-En / Hsieh, Shih-Wei / Tsai, Ping-Yuan / Lin, Ming-Hung / Tsung, Pei-Kuei / Chang, En-Jui / Liang, Jenwei / Chang, Shu-Hsin / Huang, Chung-Lun / Nian, You-Yu et al. | 2024
- 362
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20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion ModelsGuo, Ruiqi / Wang, Lei / Chen, Xiaofeng / Sun, Hao / Yue, Zhiheng / Qin, Yubin / Han, Huiming / Wang, Yang / Tu, Fengbin / Wei, Shaojun et al. | 2024
- 364
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20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot ApplicationsNose, Koichi / Fujii, Taro / Togawa, Katsumi / Okumura, Shunsuke / Mikami, Kentaro / Hayashi, Daichi / Tanaka, Teruhito / Toi, Takao et al. | 2024
- 364
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8.6 An Integrated Dual-side Series/Parallel Piezoelectric Resonator-based 20-to-2.2V DC-DC Converter Achieving a 310% Loss ReductionLiu, Wen-Chin Brian / Pillonnet, Gael / Mercier, Patrick P. et al. | 2024
- 366
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20.4 A 28nm Physics Computing Unit Supporting Emerging Physics-Informed Neural Network and Finite Element Method for Real-Time Scientific Computing on Edge DevicesJu, Yuhao / Xu, Ganqi / Gu, Jie et al. | 2024
- 368
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20.5 C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language ModelsKim, Sangyeob / Kim, Sangjin / Jo, Wooyoung / Kim, Soyeon / Hong, Seongyon / Yoo, Hoi-Jun et al. | 2024
- 370
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20.6 LSPU: A Fully Integrated Real-Time LiDAR-SLAM SoC with Point-Neural-Network Segmentation and Multi-Level kNN AccelerationJung, Jueun / Kim, Seungbin / Seo, Bokyoung / Jang, Wuyoung / Lee, Sangho / Shin, Jeongmin / Han, Donghyeon / Lee, Kyuho Jason et al. | 2024
- 372
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20.7 NeuGPU: A 18.5mJ/Iter Neural-Graphics Processing Unit for Instant-Modeling and Real-Time Rendering with Segmented-Hashing ArchitectureRyu, Junha / Kwon, Hankyul / Park, Wonhoon / Li, Zhiyong / Kwon, Beomseok / Han, Donghyeon / Im, Dongseok / Kim, Sangyeob / Joo, Hyungnam / Yoo, Hoi-Jun et al. | 2024
- 374
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20.8 Space-Mate: A 303.5mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial ComputingPark, Gwangtae / Song, Seokchan / Sang, Haoyang / Im, Dongseok / Han, Donghyeon / Kim, Sangyeob / Lee, Hongseok / Yoo, Hoi-Jun et al. | 2024
- 376
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ISSCC 2024 Session 21 Overview: Audio Amplifiers| 2024
- 378
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21.1 A 121.7dB DR and -109.0dB THD+N Filterless Digital-Input Class-D Amplifier with an HV Multibit IDAC Using Tri-level Output and Employing a Transition-Rate-Balanced Bidirectional RTDEM SchemeZhang, Huajun / Zhang, Mingshuang / Chen, Mengying / Admiraal, Arthur / Zhang, Miao / Berkhout, Marco / Fan, Qinwen et al. | 2024
- 380
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21.2 A 0.81mA, -105.2dB THD+N Class-D Audio Amplifier with Capacitive Feedforward and PWM-Aliasing Reduction for Wide-Band-Effective Linearity ImprovementZhou, Kaiwen / Zhou, Jianhong / Tang, Yuxiang / Li, Jiahua / Hong, Zhiliang / Xu, Jiawei et al. | 2024
- 382
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21.3 A -106.3dB THD+N Feedback-After-LC Class-D Audio Amplifier Employing Current Feedback to Enable 530kHz LC-Filter Cut-Off FrequencyZhang, Huajun / Fan, Haochun / Zhang, Miao / Berkhout, Marco / Fan, Qinwen et al. | 2024
- 384
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21.4 A -108dBc THD+N, 2.3mW Class-H Headphone Amplifier with Power-Aware SIMO Supply ModulatorWen, Shon-Hang / Hsiao, Chuan-Hung / Huang, Yi-Wei / Lin, Kuan-Yu / Chen, You-Shin / Chen, Ya-Chi / Tsai, Ming-Chung / Chen, Kuan-Hung / Chen, Kuan-Dar et al. | 2024
- 386
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ISSCC 2024 Session 22 Overview: High Speed Analog-to-Digital Converters| 2024
- 388
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22.1 A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input BufferCao, Yuefeng / Zhang, Minglei / Zhu, Yan / Martins, R. P. / Chan, Chi-Hang et al. | 2024
- 390
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22.2 A 700MHZ-BW −164dBFS/Hz-Small-Signal-NSD 703mW Continuous-Time Pipelined ADC with On-Chip Digital Reconstruction Achieving <-85dBFS HD3 using Digital Cancellation of DAC ErrorsPatil, Sharvil / Ganesan, Asha / Shibata, Hajime / Kozlov, Victor / Taylor, Gerry / Yu, Qingnan / Li, Zhao / Lulec, Zeynep / Vasilakopoulos, Konstantinos / Shrestha, Prawal et al. | 2024
- 392
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22.3 A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input TrackingWhitcombe, Amy / Kundu, Somnath / Chandrakumar, Hariprasad / Agrawal, Abhishek / Brown, Thomas / Callender, Steven / Carlton, Brent / Pellerano, Stefano et al. | 2024
- 394
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22.4 A 4.8GS/s 7-ENoB Time-Interleaved SAR ADC with Dither-Based Background Timing-Skew Calibration and Bit-Distribution-Based Background Ping-Pong Comparator Offset CalibrationTao, Yunsong / Gu, Mingyang / Chi, Baoyong / Zhong, Yi / Jie, Lu / Sun, Nan et al. | 2024
- 396
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22.5 A 42GS/s 7b 16nm Massively Time-Interleaved Slope-ADCMartens, Ewout / Cooman, Adam / Renukaswamy, Pratap / Nagata, Shun / Park, Sehoon / Lagos, Jorge / Markulic, Nereo / Craninckx, Jan et al. | 2024
- 398
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ISSCC 2024 Session 23 Overview: Energy-Efficient Connectivity Radios| 2024
- 400
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23.1 A 44μW IoT Tag Enabling 1μs Synchronization Accuracy and OFDMA Concurrent Communication with Software-Defined ModulationShen, Jiaqi / Zhu, Fengyuan / Liu, Yang / Liu, Boxiao / Shi, Chunqi / Huang, Leilei / Xu, Long / Tian, Xiaohua / Zhang, Runxi et al. | 2024
- 402
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23.2 A 1mm2 Software-Defined Dual-Mode Bluetooth Transceiver with 10dBm Maximum TX Power and -98.2dBm Sensitivity 2.96mW RX Power at 1Mb/sScolari, Nicola / Pengg, Franz X. / Manetakis, Konstantinos / Salazar, Camilo A. / Vouilloz, Alexandre / Serna, Ernesto Perez / Dissanayake, Anjana / Persechini, Pascal / Kopta, Vladimir / Roux, Erwan Le et al. | 2024
- 404
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23.3 A Passive Crystal-Less Wi-Fi-to-BLE Tag Demonstrating Battery-Free FDD Communication with SmartphonesChang, Ziyi / Xiao, Qijing / Chen, Cheng / Wang, Weixiao / Hu, Xin / Yang, Changgui / Li, Zhuhao / Luo, Yuxuan / Zhao, Bo et al. | 2024
- 406
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23.4 A 167 μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive Quadrature-Front-End, a Double-Sided Double-Balanced Cascaded Mixer and a Dual-Transformer-Coupled Class-D VCOShao, Haijun / Martins, Rui P. / Mak, Pui-In et al. | 2024
- 408
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23.5 A 7.6mW IR-UWB Receiver Achieving -13dBm Blocker Resilience with a Linear RF Front-EndBhat, Anoop Narayan / Mateman, Paul / Xu, Zule / Vis, Peter / Detterer, Paul / Ramachandra, Gururaja Kasanadi / Baykal, Yunus / Konijnenburg, Mario / Liu, Yao-Hong / Bachmann, Christian et al. | 2024
- 410
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ISSCC 2024 Session 24 Overview: D-Band/Sub-THz Transmitters and Sensors| 2024
- 411
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24.1 A 90-to-180GHz APD-Integrated Transmitter Achieving 18dBm Psat in 28nm CMOSTang, Dawei / Xia, Xiaoyue / Yan, Zheng / Zhou, Peigen / Li, Zekun / Yang, Chun / Zhang, Rui / Chen, Zhe / Chen, Jixin / Gao, Hao et al. | 2024
- 414
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24.2 A Scalable 134-to-141GHz 16-Element CMOS 2D λ/2-Spaced Phased ArrayZhang, Jicong / Dai, Bingli / Meng, Xiangao / Hu, Yi / Guan, Ming / Deng, Hegang / Zhang, Bo / Wang, Cheng et al. | 2024
- 415
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24.3 A 236-to-266GHz 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOSWang, Chun / Herdian, Hans / Zheng, Wenbin / Liu, Chenxin / Mayeda, Jill / Liu, Yuxuan / Yong, Olivia Angel / Wang, Wenqian / Zhang, Yuncheng / Gomez, Carrel Da et al. | 2024
- 418
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24.4 Sub-THz Ruler: Spectral Bistability in a 235GHz Self-Injection-Locked Oscillator for Agile and Unambiguous RangingHossein Naghavi, S. M. / Taba, Morteza Tavakoli / Tabatabavakili, Amirata / Mostajeran, Ali / Aseeri, Mohammed / Cathelin, Andreia / Afshari, Ehsan et al. | 2024
- 420
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ISSCC 2024 Session 25 Overview: Innovations from Outside the (ISSCC) Box| 2024
- 422
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25.1 Short-Reach Silicon Photonic Interconnects with Quantum Dot Mode Locked Laser Comb SourcesNetherton, Andrew / Dumont, Mario / Nelson, Zachary / Jhonsa, Jinesh / Mo, Alice / Koo, Jahyun / McCarthy, David / Pestana, Noah / Deckoff-Jones, Skylar / Poulton, Christopher et al. | 2024
- 424
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25.2 Extreme Wave-Based MetastructuresEngheta, Nader et al. | 2024
- 426
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25.3 Toward Exponential Growth of Therapeutic NeurotechnologyRobinson, Jacob T. / Woods, Joshua E. / Yang, Kaiyuan et al. | 2024
- 428
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25.4 Liquid Metal – Polymer Composites for Stretchable Circuits, Soft Machines, and Thermal ManagementMajidi, Carmel et al. | 2024
- 430
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ISSCC 2024 Session 26 Overview: Display and User Interaction Technologies| 2024
- 432
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26.1 A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5μs Suitable for 240Hz-Frame-Rate Mobile DisplaysPark, Yousung / Kang, Gyeong-Gu / Lim, Gyu-Wan / Shin, Seunghwa / Ahn, Yong-Sung / Kim, Wonyoun / Kim, Hyun-Sik et al. | 2024
- 434
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26.2 A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411μm2/Channel for Mobile OLED DisplaysAhn, Jaewoong / Choi, Seung Hun / An, Junyeol / Kim, Ki-Duk / Lee, Hyung-Min et al. | 2024
- 436
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26.3 Noise Immunity in Capacitive Sensing: Single-Ended AFE Design with Common-Current Subtraction for Mutual- and Self-Capacitance Sensing in 390pF LoadAn, Jun Yeol / Choi, Seung Hun / Kim, Si-Woo / Lee, Jae-Youl / Lee, Hyung-Min / Choi, Yoon-Kyung et al. | 2024
- 438
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A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR ScanLee, Junmin / Ham, Juwon / Lee, Hamin / Jang, Wooseok / Kim, Hyeongjoon / So, Byungcheol / Ko, Seunghoon et al. | 2024
- 440
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26.5 A 977μW Capacitive Touch Sensor with Noise-Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy EfficiencyFeng, Xiangdong / Wang, Zhiyu / Chen, Yekan / Cai, Tianyi / Xuan, Yangfan / Yang, Changgui / Wang, Weixiao / Zhang, Yunshan / Tang, Zhong / Luo, Yuxuan et al. | 2024
- 442
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ISSCC 2024 Session 27 Overview: Wireless Power| 2024
- 444
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27.1 A Differential Hybrid Class-ED Power Amplifier with 27W Maximum Power and 82% Peak E2E Efficiency for Wireless Fast Charging To-GoMao, Fangyu / Martins, Rui / Lu, Yan et al. | 2024
- 446
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27.2 A 6.78-MHz 79.5%-Peak-Efficiency Wireless Power Transfer System using a Wireless Mode-Recognition Technique and a Fully-On/off Class-D Power AmplifierGe, Junfei / Lu, Yu / Yang, Ruoshu / Pan, Dongfang / Cheng, Lin et al. | 2024
- 448
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27.3 A 90.8%-Efficiency SIMO Resonant Regulating Rectifier Generating 3 Outputs in a Half Cycle with Distributed Multi-Phase Control for Wirelessly-Powered Implantable DevicesLee, Hyun-Su / Eom, Kyeongho / Lee, Hyung-Min et al. | 2024
- 450
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27.4 A 13.56MHz Wireless Power Transfer System with Hybrid Voltage-/Current-Mode Receiver and Global Digital-PWM Regulation Achieving 150% Transfer Range Extension and 72.3% End-to-End EfficiencyLu, Tianqi / Du, Sijun et al. | 2024
- 452
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27.5 A Wireless Power Transfer System with Up-to-27.9% Efficiency Improvement under Coupling Coefficient Ranging from 0.1 to 0.39 Based on Phase-Shift/Time-Constant Detection and Hybrid Transmission Power ControlChen, Yutang / Luo, Yuxuan / Lin, Yifan / Shao, Lei / Chen, Dihu / Guo, Jianping et al. | 2024
- 454
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ISSCC 2024 Session 28 Overview: High-Density Power Management| 2024
- 456
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28.1 A Fully Integrated, Domino-Like-Buffered Analog LDO Achieving –28dB Worst-Case Power-Supply Rejection Across the Frequency Spectrum from 10Hz to 1GHz with 50pF On-Chip CapacitanceLee, Jun-Gi / Bae, Hong-Hyun / Jang, Seunghyun / Kim, Hyun-Sik et al. | 2024
- 458
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A 12V-Input 1V-1.8V-Output 94.7%-Peak-Efficiency 685A/cm3-Current-Density Hybrid DC-DC Converter with a Charge Converging PhaseJi, Yichao / Jin, Ji / Cheng, Lin et al. | 2024
- 460
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28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A OutputMa, Qiaobo / Jiang, Yang / Li, Huihua / Zhang, Xiongjie / Law, Man-Kay / Martins, Rui P. / Mak, Pui-In et al. | 2024
- 462
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28.4 A Monolithic 12.7W/mm2 Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC ConverterButzen, Nicolas / Krishnamurthy, Harish / Yu, Jingshu / Ahmed, Zakir K. / Weng, Sheldon / Ravichandran, Krishnan / Ahangharnejhad, Ramez Hosseinian / Waldemer, James / Pelto, Chris / Tschanz, James et al. | 2024
- 464
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28.5 A 94.1%-Efficiency Parallel-SC Hybrid Buck Converter Designed Using VCR-Aware Topology Optimizer for a 4.2A/mm² Current-Density FoMHan, Hyunki / Cho, Jeong-Hyun / Jang, Woojin / Park, Yousung / Lee, Jiho / Kim, Hyun-Sik et al. | 2024
- 466
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28.6 An 87% Efficient 2V-Input, 200A Voltage Regulator Chiplet Enabling Vertical Power Delivery in Multi-kW Systems-on-PackageJain, Rinkle / Xu, Shunjiang / Kaushal, Rajiv / Mariscal, Carlos / Caballero, Humberto / Salus, Tamir / Schaef, Christopher / Deka, Anup / Payala, Aruna / Chen, Keng et al. | 2024
- 468
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ISSCC 2024 Session 29 Overview: ICs for Quantum Technologies| 2024
- 472
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29.2 A Cryo-CMOS Controller with Class-DE Driver and DC Magnetic-Field Tuning for Color-Center-Based Quantum ComputersEnthoven, Luc / Fakkel, Niels / Bartling, Hans / Riggelen, Margriet van / Schymik, Kai-Niklas / Yun, Jiwon / Katranara, Eftychia Tsapanou / Vollmer, Rene / Taminiau, Tim / Sebastiano, Fabio et al. | 2024
- 474
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29.3 A Cryo-CMOS Receiver with 15K Noise Temperature Achieving 9.8dB SNR in 10μs Integration Time for Spin Qubit ReadoutPrabowo, Bagas / Pietx-Casas, Oriol / Montazerolghaem, Mohammad Ali / Scappucci, Giordano / Vandersypen, Lieven M. K. / Sebastiano, Fabio / Babaie, Masoud et al. | 2024
- 476
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29.4 A Cryo-CMOS Quantum Computing Unit Interface Chipset in 28nm Bulk CMOS with Phase-Detection Based Readout and Phase-Shifter Based Pulse GenerationGuo, Yanshu / Liu, Qichun / Huang, Wenqiang / Li, Yaoyu / Tian, Tian / Wu, Nan / Zhang, Siqi / Li, Tiefu / Wang, Zhihua / Deng, Ning et al. | 2024
- 478
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29.5 A Portable 14GHz Dual-Mode Pulse and Continuous-Wave Electron Paramagnetic Resonance Spectrometer Using a Subharmonic Direct Conversion ReceiverSun, Jui-Hung / Rustom, Michella / Nguyen, Thanh Dat / Singh, Jaideep / Qin, Peter / Sideris, Constantine et al. | 2024
- 480
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ISSCC 2024 Session 30 Overview: Domain-Specific Computing and Digital Accelerators| 2024
- 482
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30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot SurveillanceSpetalnick, Samuel D. / Lele, Ashwin Sanjay / Crafton, Brian / Chang, Muya / Ryu, Sigang / Yoon, Jong-Hyeok / Hao, Zhijian / Ansari, Azadeh / Khwa, Win-San / Chih, Yu-Der et al. | 2024
- 484
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30.2 A 22nm 0.26nW/Synapse Spike-Driven Spiking Neural Network Processing Unit Using Time-Step-First Dataflow and Sparsity-Adaptive In-Memory ComputingLiu, Ying / Ma, Yufei / Shang, Ninghui / Zhao, Tianhao / Chen, Peiyu / Wu, Meng / Ru, Jiayoon / Jia, Tianyu / Ye, Le / Wang, Zhixuan et al. | 2024
- 486
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30.3 VIP-Sat: A Boolean Satisfiability Solver Featuring 5×12 Variable In-Memory Processing Elements with 98% Solvability for 50-Variables 218-Clauses 3-SAT ProblemsShim, Chaeyun / Bae, Jooyoung / Kim, Bongjin et al. | 2024
- 488
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30.4 A Fully Integrated Annealing Processor for Large-Scale Autonomous Navigation OptimizationChu, Yi-Chen / Lin, Yu-Cheng / Lo, Yu-Chen / Yang, Chia-Hsiang et al. | 2024
- 490
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11.1 AMD InstinctTM MI300 Series Modular Chiplet Package – HPC and AI Accelerator for Exa-Class SystemsSmith, Alan / Chapman, Eric / Patel, Chintan / Swaminathan, Raja / Wuu, John / Huang, Tyrone / Jung, Wonjun / Kaganov, Alexander / McIntyre, Hugh / Mangaser, Ramon et al. | 2024
- 490
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30.5 A Variation-Tolerant In-eDRAM Continuous-Time Ising Machine Featuring 15-Level Coefficients and Leaked Negative-Feedback AnnealingSong, Jiahao / Wu, Zihan / Tang, Xiyuan / Xu, Bocheng / Luo, Haoyang / Yang, Youming / Wang, Yuan / Wang, Runsheng / Huang, Ru et al. | 2024
- 492
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30.6 Vecim: A 289.13GOPS/W RISC-V Vector Co-Processor with Compute-in-Memory Vector Register File for Efficient High-Performance ComputingWang, Yipeng / Yang, Mengtian / Lo, Chieh-Pu / Kulkarni, Jaydeep P. et al. | 2024
- 494
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ISSCC 2024 Session 31 Overview: Power Converter Techniques| 2024
- 496
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31.1 An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsChen, Changjin / Li, Ximing / Hu, Rui / Cheng, Lin et al. | 2024
- 498
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31.2 A Ripple-Less Buck Converter with Sub -21.94dB EVM for 5G Low Earth Orbit ApplicationKao, Yi-Hsiang / Wu, Jie-Lin / Huang, Wei-Cheng / Chang, Hui-Hsuan / Tsai, Hsing-Yen / Guo, Rong-Bin / Chen, Ke-Horng / Zeng, Kuo-Lin / Lin, Ying-Hsi / Lin, Shian-Ru et al. | 2024
- 500
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31.3 A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power TrackingKim, Ik-Hwan / Seo, Jeong-Il / Choo, Younghwan / Park, Seungchan / Han, Jaeyeol / Kim, Woosik / Jung, Sungyoub / Ko, Taehyuk / Kim, Dongsu / Lee, Jongwoo et al. | 2024
- 502
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31.4 98.7% Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1Wang, Tz-Wun / Hung, Sheng-Hsi / Chiu, Po-Jui / Chen, Chi-Yu / Go, Chang-Lin / Huang, Yu-Ting / Wu, Xiao-Quan / Chen, Ke-Horng / Zeng, Kuo-Lin / Lin, Ying-Hsi et al. | 2024
- 504
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31.5 A 750mW, 37% Peak Efficiency Isolated DC-DC Converter with 54/18Mb/s Full-Duplex Communication Using a Single Pair of TransformersHu, Tingxu / Huang, Mo / Martins, Rui Paulo / Lu, Yan et al. | 2024
- 506
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31.6 A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6% Peak Efficiency and Almost-lossless Channel SwitchingWang, Yuanfei / Huang, Mo / Martins, Rui Paulo / Lu, Yan et al. | 2024
- 508
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31.7 A 3.6W 16V-Output 180ns-Response-Time 94%-Efficiency SC Sigma Converter with Output Impedance Compensation and Ripple Mitigation for LiDAR Driver ApplicationsHu, Chen / Huang, Xinran / Liu, Xun / Du, Sijun / Liu, Xiaosen / Jiang, Junmin et al. | 2024
- 510
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31.8 A 11.7W 9mV/A-Cross-Regulation Single-Inductor Triple-Output Buck Converter Using Unordered Power-Distributive Control for a 2A Load TransientWang, Baochuang / Wu, Xiaonan / Cheng, Lin et al. | 2024
- 514
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31.10 A Fully integrated 500V, 6.25MHz GaN-IC for Totem-Pole PFC Off-Line Power ConversionDeneke, Niklas / Wicht, Bernhard et al. | 2024
- 516
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31.11 A Capacitor-Based Bias-Flip Rectifier with Electrostatic Charge Boosting for Triboelectric Energy Harvesting Achieving Auto-MPPT at Breakdown Voltage and 14× Power Extraction ImprovementPeng, Wenyu / Yue, Xinling / Pakula, Lukasz / Du, Sijun et al. | 2024
- 518
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ISSCC 2024 Session 32 Overview: Power Amplification and Signal Generation| 2024
- 520
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32.1 A 47GHz 4-way Doherty PA with 23.7dBm P1dB and 21.7% / 13.1% PAE at 6 / 12dB Back-off Supporting 2000MHz 5G NR 64-QAM OFDMZhang, Xiaohan / Guo, Hao / Chi, Taiyun et al. | 2024
- 522
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32.2 A 24.25-to-29.5GHz Extremely Compact Doherty Power Amplifier with Differential-Breaking Phase Offset Achieving 23.7% PAEavg for 5G Base-Station TransceiversOh, Hansik / Park, Seungwon / Lee, Jooseok / Baek, Seungjae / Jung, Joonho / Kim, Taewan / Kim, Jinhyun / Lee, Woojae / Park, Jae-Hong / Kim, Kihyun et al. | 2024
- 524
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32.3 A Load-Variation-Tolerant Doherty Power Amplifier with Dual-Adaptive-Bias Scheme for 5G HandsetsImai, Shohei / Sato, Hideyuki / Mukai, Kenji / Okabe, Hiroshi et al. | 2024
- 526
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32.4 A 67.8-to-108.2GHz Power Amplifier with a Three-Coupled-Line-Based Complementary-Gain-Boosting Technique Achieving 442GHz GBW and 23.1% peak PAEWu, Weiping / Bao, Xun / Chen, Shulan / Wang, Yan / Zhang, Lei et al. | 2024
- 528
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32.5 E-band (71-to-86GHz) GaN Power Amplifier with 4.37W Output Power and 18.5% PAE for 5G BackhaulCimbili, Bharath / Bao, Mingquan / Friesicke, Christian / Quay, Rudiger et al. | 2024
- 530
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32.6 A 76-to-81GHz Direct-Digital 7b 14GS/s Double-Balanced I/Q Mixing-DAC Radar-Waveform SynthesizerNeofytou, Marios / Doris, Kostas / Ganzerli, Marcello / Lont, Maarten / Radulov, Georgi I. et al. | 2024
- 532
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32.7 A 25.2dBm PSAT, 35-to-43GHz VSWR-Resilient Chain-Weaver Eight-Way Balanced PA with an Embedded Impedance/Power SensorPashaeifar, Masoud / Kumaran, Anil K. / De Vreede, Leo C.N. / Alavi, Morteza S. et al. | 2024
- 534
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32.8 A 27.8-to-38.7GHz Load-Modulated Balanced Power Amplifier with Scalable 7-to-1 Load-Modulated Power-Combine Network Achieving 27.2dBm Output Power and 28.8%/23.2%/16.3%/11.9% Peak/6/9/12dB Back-Off EfficiencyZhu, Wei / Ying, Jiazhi / Chen, Long / Zhang, Jian / Lv, Guanshen / Yi, Xiangjie / Zhao, Zhiqiang / Wang, Zunxiang / Wang, Yan / Chen, Wenhua et al. | 2024
- 536
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32.9 An Ultra-Compact 28GHz Doherty Power Amplifier with an Asymmetrically-Coupled-Transformer Output CombinerLiu, Edward / Wang, Hua et al. | 2024
- 538
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32.10 A Compact Broadband VSWR-Resilient True-Power-and-Gain Sensor with Dynamic-Range Compensation for Phased-Array ApplicationsLiu, Edward / Munzer, David / Lee, Jeongseok / Wang, Hua et al. | 2024
- 540
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ISSCC 2024 Session 33 Overview: Intelligent Neural Interfaces and Sensing Systems| 2024
- 542
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33.1 A High-Accuracy and Energy-Efficient Zero-Shot-Retraining Seizure-Detection Processor with Hybrid-Feature-Driven Adaptive Processing and Learning-Based Adaptive Channel SelectionLiu, Jiahao / Liu, Xiao / Wang, Xu / Xie, Ziyi / Zhong, Zirui / Fan, Jiajing / Qiu, Hui / Xu, Yiming / Qin, Huajing / Long, Yu et al. | 2024
- 544
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33.2 A Sub-1μJ/class Headset-Integrated Mind Imagery and Control SoC for VR/MR Applications with Teacher-Student CNN and General-Purpose Instruction Set ArchitectureZhong, Zhiwei / Wei, Yijie / Go, Lance Christopher / Gu, Jie et al. | 2024
- 546
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33.3 MiBMI: A 192/512-Channel 2.46mm² Miniaturized Brain-Machine Interface Chipset Enabling 31-Class Brain-to-Text Conversion Through Distinctive Neural CodesShaeri, Mohammad Ali / Shin, Uisub / Yadav, Amitabh / Caramellino, Riccardo / Rainer, Gregor / Shoaran, Mahsa et al. | 2024
- 548
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33.4 A Multi-Loop Neuromodulation Chipset Network with Frequency-Interleaving Front-End and Explainable AI for Memory Studies in Freely Behaving MonkeysHou, Yuhan / Zhu, Yi / Wu, Xiao / Li, Yinfei / Lucas, Timothy / Richardson, Andrew / Liu, Xilin et al. | 2024
- 550
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33.5 Closed-Loop 100-Channel Highly-Scalable Retinal Implant with 1.02μW Analog ED-Based Adaptive-Threshold Spike Detection and Poisson-Coded Temporally Distributed Optogenetic StimulationYousefi, Tayebeh / Zoidl, Georg / Kassiri, Hossein et al. | 2024
- 551
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33.6 A Millimetric Batteryless Biosensing and Stimulating Implant with Magnetoelectric Power Transfer and 0.9pJ/b PWM BackscatterYu, Zhanghao / Liao, Huan-Cheng / Alrashdan, Fatima / Wen, Ziyuan / Zou, Yiwei / Woods, Joshua / Wang, Wei / Robinson, Jacob T. / Yang, Kaiyuan et al. | 2024
- 554
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33.7 An Adhesive Interposer-Based Reconfigurable Multi-Sensor Patch Interface with On-Chip Application Tunable Time-Domain Feature ExtractionCho, Jeonghoon / Pyeon, You Jang / Yeom, Junyeong / Kim, Hyunjoong / Cho, Sanghyeon / Kim, Yonggi / Kim, Taejung / Kwak, Jong-Hyun / Choi, Geonjun / Lee, Yoonsik et al. | 2024
- 556
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33.8 A Two-Electrode Bio-Impedance Readout IC with Complex-Domain Noise-Correlated Baseline Cancellation Supporting Sinusoidal ExcitationCheon, Song-I / Choi, Haidam / Yun, Gichan / Oh, Sein / Suh, Ji-Hoon / Ha, Sohmyung / Je, Minkyu et al. | 2024
- 558
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33.9 A Miniature Neural Interface Implant with a 95% Charging Efficiency Optical Stimulator and an 81.9dB SNDR ΔΣM-Based Recording FrontendZhao, Linran / Shi, Wei / Gong, Yan / Liu, Xiang / Li, Wen / Jia, Yaoyao et al. | 2024
- 560
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33.10 A 2.7ps-ToF-Resolution and 12.5mW Frequency-domain NIRS Readout IC with Dynamic Light Sensing Frontend and Cross-Coupling-Free Inter-Stabilized Data ConverterMa, Zhouchen / Lin, Yuxiang / Chen, Cheng / Qi, Xiang'Ao / Li, Yongfu / Tang, Kea-Tiong / Wang, Fa / Zhang, Tianhong / Wang, Guoxing / Zhao, Jian et al. | 2024
- 562
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33.11 A Hybrid Recording System with 10kHz-BW 630mVPP 84.6dB-SNDR 173.3dB-FOMSNDR and 5kHz-BW 114dB-DR for Simultaneous ExG and Biocurrent AcquisitionSeol, Taeryoung / Kim, Geunha / Lee, Sehwan / Kim, Samhwan / Kim, Dongwook / Wie, Jeongyoon / Shin, Yeonjae / Kang, Hongki / Jang, Jae Eun / George, Arup K. et al. | 2024
- 564
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ISSCC 2024 Session 34 Overview: Compute-In-Memory| 2024
- 566
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34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI ApplicationsWang, Yang / Yang, Xiaolong / Qin, Yubin / Zhao, Zhiren / Guo, Ruiqi / Yue, Zhiheng / Han, Huiming / Wei, Shaojun / Hu, Yang / Yin, Shouyi et al. | 2024
- 568
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34.2 A 16nm 96Kb Integer/Floating-Point Dual-Mode-Gain-Cell-Computing-in-Memory Macro Achieving 73.3-163.3TOPS/W and 33.2-91.2TFLOPS/W for AI-Edge DevicesKhwa, Win-San / Wu, Ping-Chun / Wu, Jui-Jen / Su, Jian-Wei / Chen, Ho-Yu / Ke, Zhao-En / Chiu, Ting-Chien / Hsu, Jun-Ming / Cheng, Chiao-Yen / Chen, Yu-Chen et al. | 2024
- 570
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34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNsGuo, An / Chen, Xi / Dong, Fangyuan / Chen, Jinwu / Yuan, Zhihang / Hu, Xing / Zhang, Yuanpeng / Zhang, Jingmin / Tang, Yuchen / Zhang, Zhican et al. | 2024
- 572
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34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit CellFujiwara, Hidehiro / Mori, Haruki / Zhao, Wei-Chang / Khare, Kinshuk / Lee, Cheng-En / Peng, Xiaochen / Joshi, Vineet / Chuang, Chao-Kai / Hsu, Shu-Huan / Hashizume, Takeshi et al. | 2024
- 574
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34.5 A 818-4094TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and TransformersYoshioka, Kentaro et al. | 2024
- 576
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34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADCYuan, Yiyang / Yang, Yiming / Wang, Xinghua / Li, Xiaoran / Ma, Cailian / Chen, Qirui / Tang, Meini / Wei, Xi / Hou, Zhixian / Zhu, Jialiang et al. | 2024
- 578
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34.7 A 28nm 2.4Mb/mm2 6.9 - 16.3TOPS/mm2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and RefreshingHe, Yifan / Fan, Shupei / Li, Xuan / Lei, Luchang / Jia, Wenbin / Tang, Chen / Li, Yaolei / Huang, Zongle / Du, Zhike / Yue, Jinshan et al. | 2024
- 580
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34.8 A 22nm 16Mb Floating-Point ReRAM Compute-in-Memory Macro with 31.2TFLOPS/W for AI Edge DevicesWen, Tai-Hao / Hsu, Hung-Hsi / Khwa, Win-San / Huang, Wei-Hsing / Ke, Zhao-En / Chin, Yu-Hsiang / Wen, Hua-Jin / Chang, Yu-Chen / Hsu, Wei-Ting / Lo, Chung-Chuan et al. | 2024
- 582
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34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET ProcessWang, Linfang / Li, Weizeng / Zhou, Zhidao / Gao, Hanghang / Li, Zhi / Ye, Wang / Hu, Hongyang / Liu, Jing / Yue, Jinshan / Yang, Jianguo et al. | 2024
- 585
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ISSCC 2024 Tutorials| 2024
- 589
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ISSCC 2024 Forum 1: Efficient Chiplets and Die-to-Die Communications| 2024
- 593
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ISSCC 2024 Forum 2: Energy-Efficient AI-Computing Systems for Large-Language Models| 2024
- 597
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ISSCC 2024 Forum 3: Digitally Enhanced Analog Circuits: Trends & State-of-the-art Designs| 2024
- 601
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ISSCC 2024 Forum 4: Intelligent Sensing| 2024
- 605
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ISSCC 2024 Forum 5: Recent Developments in High-Performance Frequency Synthesis Circuits and Systems| 2024
- 609
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ISSCC 2024 Tutorial| 2024
- 632
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ISSCC 2024 Short Course: Machine Learning Hardware: Considerations and Accelerator Approaches| 2024
- 634
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ISSCC 2024 Index to Authors| 2024
- 642
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ISSCC 2024 Executive Committee| 2024
- 643
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ISSCC 2024 Committees| 2024
- 650
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ISSCC 2024 Call for Papers| 2024
- 651
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ISSCC 2024 Timetable| 2024
- 652
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ISSCC 2024 Conference Space Layout| 2024
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ISSCC 2024 Cover Page| 2024
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ISSCC 2024 Back Cover Page| 2024
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ISSCC 2024 Panel Discussion| 2024
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ISSCC 2024 Breaker Page| 2024