Designing FPGA based self-testing checkers for m-out-of-n codes (Englisch)
- Neue Suche nach: Matrosova, A.
- Neue Suche nach: Ostrovsky, V.
- Neue Suche nach: Levin, I.
- Neue Suche nach: Nikitin, K.
- Neue Suche nach: Matrosova, A.
- Neue Suche nach: Ostrovsky, V.
- Neue Suche nach: Levin, I.
- Neue Suche nach: Nikitin, K.
In:
9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003.
;
49-53
;
2003
-
ISBN:
- Aufsatz (Konferenz) / Elektronische Ressource
-
Titel:Designing FPGA based self-testing checkers for m-out-of-n codes
-
Beteiligte:Matrosova, A. ( Autor:in ) / Ostrovsky, V. ( Autor:in ) / Levin, I. ( Autor:in ) / Nikitin, K. ( Autor:in )
-
Erschienen in:
-
Verlag:
- Neue Suche nach: IEEE
-
Erscheinungsdatum:01.01.2003
-
Format / Umfang:301302 byte
-
ISBN:
-
DOI:
-
Medientyp:Aufsatz (Konferenz)
-
Format:Elektronische Ressource
-
Sprache:Englisch
-
Datenquelle:
Inhaltsverzeichnis Konferenzband
Die Inhaltsverzeichnisse werden automatisch erzeugt und basieren auf den im Index des TIB-Portals verfügbaren Einzelnachweisen der enthaltenen Beiträge. Die Anzeige der Inhaltsverzeichnisse kann daher unvollständig oder lückenhaft sein.
- 3
-
Challenges and opportunities for FPGA programmable system platformsBolsens, I. et al. | 2003
- 3
-
Challenges and Opportunities for EPGA Programmable System PlatformsBolsens, I. / Institute of Electrical and Electronics Engineers et al. | 2003
- 4
-
Technology scaling trends and accelerated testing for soft errors in commercial silicon devicesBaumann, R. et al. | 2003
- 7
-
Separate dual-transistor registers: a circuit solution for on-line testing of transient error in UDMC-ICYi Shao, / Dey, S. et al. | 2003
- 7
-
Separate Dual-Transistor Registers-A Circuit Solution for On-Line Testing of Transient Error in UDSM-ICZhao, Y. / Dey, S. / Institute of Electrical and Electronics Engineers et al. | 2003
- 12
-
A sense amplifier based circuit for concurrent detection of soft and timing errors in CMOS ICsTsiatouhas, Y. / Matakias, S. / Arapoyanni, A. / Haniotakis, Th. et al. | 2003
- 17
-
On-Line Error Detection Constant Delay AdderTownsend, W. J. / Abraham, J. A. / Lala, P. K. / Institute of Electrical and Electronics Engineers et al. | 2003
- 17
-
On-line error detecting constant delay adderTownsend, W.J. / Abraham, J.A. / Lala, P.K. et al. | 2003
- 25
-
A modulo p checked self-checking carry select adderOcheretnij, V. / Gossel, M. / Sogomonyan, E.S. / Marienfeld, D. et al. | 2003
- 30
-
Foundation of combined datapath and controller self-checking designOikonomakos, P. / Zwolinski, M. et al. | 2003
- 35
-
Synthesis of low-cost parity-based partially self-checking circuitsMohanram, K. / Sogomonyan, E.S. / Gossel, M. / Touba, N.A. et al. | 2003
- 43
-
A design method for embedded self-testing t-UED and BUED code checkersTarnick, S. et al. | 2003
- 49
-
Designing FPGA based self-testing checkers for m-out-of-n codesMatrosova, A. / Ostrovsky, V. / Levin, I. / Nikitin, K. et al. | 2003
- 54
-
An analog checker with input-relative tolerance for duplicate signalsStratigopoulos, H.-G.D. / Makris, Y. et al. | 2003
- 61
-
Power consumption of fault tolerant codes: the active elementsRossi, D. / van Dijk, V.E.S. / Kleihorst, R.P. / Nieuwland, A.K. / Metra, C. et al. | 2003
- 68
-
On the probability of detecting data errors generated by permanent faults using time redundancyAidemark, J. / Folkesson, P. / Karlsson, J. et al. | 2003
- 75
-
The positive effect on IC yield of embedded fault tolerance for SEUsNieuwland, A.K. / Kleihorst, R.P. et al. | 2003
- 83
-
On-line testable decimation filter design for AMS systemsNaal, M.A. / Simeu, E. / Mir, S. et al. | 2003
- 89
-
An efficient BIST scheme for high-speed addersNikolos, D.G. / Nikolos, D. / Vergos, H.T. / Efstathiou, C. et al. | 2003
- 94
-
Memory built-in self-repair for nanotechnologiesNicolaidis, M. / Achouri, N. / Anghel, L. et al. | 2003
- 101
-
Accurate and efficient analysis of single event transients in VLSI circuitsSonza Reorda, M. / Violante, M. et al. | 2003
- 106
-
An improved source design for scan BISTChaowen Yu, / Wei LI, / Reddy, S.M. / Pomeranz, I. et al. | 2003
- 106
-
An Improved Markov Source Design for Scan BISTYu, C. / Li, W. / Reddy, S. M. / Pomeranz, I. / Institute of Electrical and Electronics Engineers et al. | 2003
- 111
-
A model for transient fault propagation in combinatorial logicOmana, M. / Papasso, G. / Rossi, D. / Metra, C. et al. | 2003
- 119
-
Analyzing SEU effects is SRAM-based FPGAsbViolante, M. / Ceschia, M. / Sonza Reorda, M. / Paccagnella, A. / Bernardi, P. / Rebaudengo, M. / Bortolato, D. / Bellato, M. / Zambolin, P. / Candelori, A. et al. | 2003
- 119
-
Analyzing SEU Effects in SRAM-Based FPGAsViolante, M. / Ceschia, M. / Reorda, M. S. / Paccagnella, A. / Bernardi, P. / Rebaudengo, M. / Bortolato, D. / Bellato, M. / Zambolin, P. / Candelori, A. et al. | 2003
- 124
-
Defect analysis for delay-fault BIST in FPGAsGirard, P. / Heron, O. / Pravossoudovitch, S. / Renovell, M. et al. | 2003
- 129
-
A fault injection tool for SRAM-based FPGAsAlderighi, M. / D'Angelo, S. / Mancini, M. / Sechi, G.R. et al. | 2003
- 137
-
Low-cost on-line fault detection using control flow assertionsRajesh Venkatasubramanian, / Hayes, J.P. / Murray, B.T. et al. | 2003
- 144
-
A watchdog processor to detect data and control flow errorsBenso, A. / Di Carlo, S. / Di Natale, G. / Prinetto, P. et al. | 2003
- 149
-
Low-cost, on-line software-based self-testing of embedded processor coresXenoulis, G. / Gizopoulos, D. / Kranitis, N. / Paschalis, A. et al. | 2003
- 157
-
On compaction-based concurrent error detectionSobeeh Almukhaizim, / Petros Drineas, / Yiorgos Makris, et al. | 2003
- 158
-
Increasing Implementability of beta-Driven Threshold CheckersVarshavsky, V. / Levin, I. / Ostrovsky, V. / Institute of Electrical and Electronics Engineers et al. | 2003
- 158
-
Increasing implementability of /spl beta/-driven threshold checkersVarshavsky, V. / Levin, I. / Ostrovsky, V. et al. | 2003
- 159
-
An RT-level concurrent error detection technique for data dominated systemsGoubeva, O. / Sonza Reorda, M. / Violante, M. et al. | 2003
- 160
-
FAUST: fault-injection script-based toolBenso, A. / Di Carlo, S. / Di Natale, G. / Prinetto, P. / Solcia, I. / Tagliaferri, L. et al. | 2003
- 161
-
Fault injection in digital logic circuits at the VHDL levelSeward, S.R. / Lala, P.K. et al. | 2003
- 162
-
Radiation test methodology for SRAM-based FPGAs by using THESIC+Alderighi, M. / Casini, F. / D'Angelo, S. / Faure, F. / Mancini, M. / Pastore, S. / Sechi, G.R. / Velazco, R. et al. | 2003
- 163
-
Introducing SW-based fault handling mechanisms to cope with EMI in embedded electronics: are they a good remedy?Vargas, F. / Brum, D. / Prestes, D. / Bolzani, L. / Rhod, E. / Reorda, M. et al. | 2003
- 164
-
Property coverage for quality assessment of fault tolerant or failsafe systemsGoncalves, F.M. / Santos, M.B. / Teixeira, I.C. / Teixeira, J.P. et al. | 2003
- 166
-
Analysis of bit transition count for EDAC encoded FSMVenkateswaran, N. / Balaji, V. / Mahalingam, V. / Rajaprabhu, T.L. et al. | 2003
- 167
-
A configurable built in current sensor for mixed signal circuit testingPicos, R. / Font, J. / Isern, E. / Roca, M. / Garcia, E. et al. | 2003
- 168
-
Evaluation of the quality of testing path delay faults under restricted input assumptionKrasniewski, A. et al. | 2003
- 173
-
Control signal protection: a new challenge for high performance processorsPflanz, M. / Vierhaus, H.T. et al. | 2003
- 178
-
An evaluation of built-in vs. off-chip strategies for online transient current testingAlorda, B. / Segura, J. et al. | 2003
- 183
-
Perspectives of combining online and offline test technology for dependable systems on a chipGalke, C. / Grabow, M. / Vierhaus, H.T. et al. | 2003
- 191
-
On a redundant diversified steering angle sensorDilge, E. / Gulbins, M. / Ohnesorge, T. / Straube, B. et al. | 2003
- 197
-
Automatic toolset for fault tolerant design: results demonstration on a running industrial applicationManzone, A. / Genta, C. et al. | 2003
- 202
-
Error-injection-based failure characterization of the IEEE 1394 busBeauregard, D.J. / Kalbarczyk, Z. / Iyer, Rk. / Chau, S. / Alkalai, L. et al. | 2003
- 209
-
A methodology for test replacement solutions of obsolete processorsVelazco, R. / Anghel, L. / Saleh, S. et al. | 2003
- 214
-
Crosstalk effect minimization for encoded bussesDi Silvio, L. / Rossi, D. / Metra, C. et al. | 2003
- 219
-
InTeRail: using existing and extra interconnects to test core-based SOCsKagaris, D. / Tragoudas, S. et al. | 2003
- 225
-
Author index| 2003
- i
-
9th IEEE International On-Line Testing Symposium IOLTS 2003| 2003