Application of port-access-rejection probability theory for integrated N-port memory architecture optimisation (Englisch)
- Neue Suche nach: Mattausch, H.J.
- Neue Suche nach: Yamada, K.
- Neue Suche nach: Mattausch, H.J.
- Neue Suche nach: Yamada, K.
In:
Electronics Letters
;
34
, 9
;
861-862
;
1998
- Aufsatz (Zeitschrift) / Elektronische Ressource
-
Titel:Application of port-access-rejection probability theory for integrated N-port memory architecture optimisation
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Beteiligte:Mattausch, H.J. ( Autor:in ) / Yamada, K. ( Autor:in )
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Erschienen in:Electronics Letters ; 34, 9 ; 861-862
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Verlag:
- Neue Suche nach: The Institution of Engineering and Technology
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Erscheinungsdatum:30.04.1998
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Format / Umfang:2 pages
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ISSN:
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DOI:
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Medientyp:Aufsatz (Zeitschrift)
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Format:Elektronische Ressource
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Sprache:Englisch
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Schlagwörter:
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Datenquelle:
Inhaltsverzeichnis – Band 34, Ausgabe 9
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