Realizing logic gates with time-delayed synthetic genetic networks (Englisch)
- Neue Suche nach: Sharma, Amit
- Neue Suche nach: Kohar, Vivek
- Neue Suche nach: Shrimali, Manish Dev
- Neue Suche nach: Sinha, Sudeshna
- Neue Suche nach: Sharma, Amit
- Neue Suche nach: Kohar, Vivek
- Neue Suche nach: Shrimali, Manish Dev
- Neue Suche nach: Sinha, Sudeshna
In:
Nonlinear Dynamics
;
76
, 1
; 431-439
;
2013
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ISSN:
- Aufsatz (Zeitschrift) / Print
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Titel:Realizing logic gates with time-delayed synthetic genetic networks
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Beteiligte:Sharma, Amit ( Autor:in ) / Kohar, Vivek ( Autor:in ) / Shrimali, Manish Dev ( Autor:in ) / Sinha, Sudeshna ( Autor:in )
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Erschienen in:Nonlinear Dynamics ; 76, 1 ; 431-439
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Verlag:
- Neue Suche nach: Springer Netherlands
- Neue Suche nach: Springer
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Erscheinungsort:Dordrecht [u.a.]
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Erscheinungsdatum:2013
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ISSN:
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ZDBID:
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DOI:
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Medientyp:Aufsatz (Zeitschrift)
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Format:Print
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Sprache:Englisch
- Neue Suche nach: 30.20
- Weitere Informationen zu Basisklassifikation
- Neue Suche nach: 535/3315
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Schlagwörter:
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Klassifikation:
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Datenquelle:
Inhaltsverzeichnis – Band 76, Ausgabe 1
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