A new physical routing approach for robust bundled signaling on NoC links (Englisch)
- Neue Suche nach: Mohammad Reza Kakoee
- Neue Suche nach: Loi, Igor
- Neue Suche nach: Benini, Luca
- Neue Suche nach: Mohammad Reza Kakoee
- Neue Suche nach: Loi, Igor
- Neue Suche nach: Benini, Luca
In:
GLSVLSI, ACM Great Lakes Symposium on VLSI, 20
;
3-8
;
2010
-
ISBN:
- Aufsatz (Konferenz) / Datenträger
-
Titel:A new physical routing approach for robust bundled signaling on NoC links
-
Beteiligte:
-
Erschienen in:
-
Verlag:
-
Erscheinungsdatum:2010
-
Format / Umfang:6 Seiten, 11 Bilder, 2 Tabellen, 28 Quellen
-
ISBN:
-
DOI:
-
Medientyp:Aufsatz (Konferenz)
-
Format:Datenträger
-
Sprache:Englisch
-
Schlagwörter:
-
Datenquelle:
Inhaltsverzeichnis Konferenzband
Die Inhaltsverzeichnisse werden automatisch erzeugt und basieren auf den im Index des TIB-Portals verfügbaren Einzelnachweisen der enthaltenen Beiträge. Die Anzeige der Inhaltsverzeichnisse kann daher unvollständig oder lückenhaft sein.
- 3
-
A new physical routing approach for robust bundled signaling on NoC linksMohammad Reza Kakoee / Loi, Igor / Benini, Luca et al. | 2010
- 33
-
8 Gb/s capacitive low power and high speed 4-PWAM transceiver designKim, Young Bok / Kim, Yong-Bin / Lombardi, Fabrizio et al. | 2010
- 39
-
A low power, variable resolution two-step flash ADCMahesh Kumar Adimulam / Krishna Kumar Movva / Veeramanchaneni, Sreehari / Moorthy Muthukrishnan, N. / Srinivas, M.B. et al. | 2010
- 67
-
A multi-level approach to reduce the impact of NBTI on processor functional unitsSiddiqua, Taniya / Gurumurthi, Sudhanva et al. | 2010
- 85
-
Software adaptation in quality sensitive applications to deal with hardware variabilityPant, Aashish / Gupta, Puneet / Schaar, Mihaela van der et al. | 2010
- 103
-
A mask double patterning technique using litho simulation by wavelet transformRodrigues, Rance / Kundu, Sandip et al. | 2010
- 107
-
An effective approach for large scale floorplanningAgnihotri, Ameya R. / Ono, Satoshi / Madden, Patrick H. et al. | 2010
- 111
-
A novel resource sharing model and high-level synthesis for delay variability-tolerant datapathsInoue, Keisuke / Kaneko, Mineo et al. | 2010
- 115
-
A revisit to voltage partitioning problemLin, Tao / Dong, Sheqin / Yu, Bei / Chen, Song / Goto, Satoshi et al. | 2010
- 139
-
A delay measurement method using a shrinking clock signalLee, Jae Wook / Chun, Ji Hwan / Abraham, Jacob A. et al. | 2010
- 155
-
Design of embedded MRAM macros for Memory-in-Logic applicationsChaudhuri, Sumanta / Zhao, Weisheng / Klein, Jacques-Oliver / Chappert, Claude / Mazoyer, Pascale et al. | 2010
- 163
-
Performance assessment of analog circuits with carbon nanotube FET (CNFET)Ajit, Janardhanan S. / Kim, Yong-Bin / Choi, Minsu et al. | 2010
- 173
-
Dominant critical gate identification for power and yield optimization in logic circuitsChoudhury, Mihir / Rostami, Masoud / Mohanram, Kartik et al. | 2010
- 197
-
Clock skew reduction by self-compensating manufacturing variability with on-chip sensorsAbe, Shinya / Shinkai, Ken-ichi / Hashimoto, Masanori / Onoye, Takao et al. | 2010
- 203
-
Online convex optimization-based algorithm for thermal management of MPSoCsZanini, Francesco / Atienza, David / Micheli, Giovanni De et al. | 2010
- 215
-
A model to exploit power-performance efficiency in superscalar processors via structure resizingKhan, Omer / Kundu, Sandip et al. | 2010
- 221
-
Thermal-aware compilation for system-on-chip processing architecturesSabry, Mohamed M. / Ayala, Jose L. / Atienza, David et al. | 2010
- 227
-
A linear statistical analysis for full-chip leakage power with spatial correlationShen, Ruijing / Tan, Sheldon X.D. / Xiong, Jinjun et al. | 2010
- 245
-
Low power nanoscale buffer management for network on chip routersMandal, Suman K. / Denton, Ron / Mohanty, Saraju P. / Mahapatra, Rabi N. et al. | 2010
- 257
-
Write buffer-oriented energy reduction in the L1 data cache of two-level caches for the embedded systemKim, Soontae / Lee, Jongmin et al. | 2010
- 281
-
Numerical queue solution of thermal noise-induced soft errors in subthreshold CMOS devicesJannaty, Pooya / Sabou, Florian C. / Bahar, R. Iris et al. | 2010
- 293
-
An integrated thermal estimation framework for industrial embedded platformsAcquaviva, Andrea / Calimera, Andrea / Macii, Alberto / Poncino, Massimo / Macii, Enrico / Giaconia, Matteo / Parrella, Claudio et al. | 2010
- 299
-
Power-efficient, reliable microprocessor architectures: modeling and design methodsBose, Pradip / Buyuktosunoglu, Alper / Cher, Chen-Yong / Darringer, John A. / Gupta, Meeta S. / Hamann, Hendrik / Jacobson, Hans / Kudva, Prabhakar N. / Kursun, Eren / Madan, Niti et al. | 2010
- 311
-
A virtual platform environment for exploring power, thermal and reliability management control strategies in high-performance multicoresBartolini, Andrea / Cacciari, Matteo / Tilli, Andrea / Benini, Luca / Gries, Matthias et al. | 2010
- 323
-
A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K nano-CMOS SRAMThakral, Garima / Mohanty, Saraju P. / Ghai, Dhruva / Pradhan, Dhiraj K. et al. | 2010
- 347
-
Collaborative voltage scaling with online STA and variable-latency datapathLin, Tay-Jyi / Hsiao, Pi-Cheng / Lin, Chu-Hung / Kuo, Shu-Chang et al. | 2010
- 357
-
A novel crosstalk quantitative approach for simultaneously reducing power, noise, and delay based on bus-invert encoding schemesRuan, Shang-Jang / Kan, Tsang-Chi / Hsu, Jih-Chieh et al. | 2010
- 365
-
Performance and energy efficient cache migration approach for thermal management in embedded systemsAyoub, Raid / Orailoglu, Alex et al. | 2010
- 369
-
Performance enhancement of subthreshold circuitsusing substrate biasing and charge-boosting buffersAmarchinta, Sumanth / Kudithiipudi, Dhireesha et al. | 2010
- 381
-
VLSI implementation of a non-linear feedback shift register for high-speed cryptography applicationsLin, Pey-Chang Kent / Khatri, Sunil P. et al. | 2010
- 409
-
A novel multi-objective instruction synthesis flow for application-specific instruction set processorsLin, Hai / Fei, Yunsi et al. | 2010
- 441
-
A novel droplet routing algorithm for digital microfluidic biochipsRoy, Pranab / Rahaman, Hafizur / Dasgupta, Parthasarathi et al. | 2010
- 459
-
Low-power side-channel attack-resistant asynchronous S-box design for AES cryptosystemsWu, Jun / Kim, Yong-Bin / Choi, Minsu et al. | 2010
- 471
-
Algorithm and hardware complexity reduction techniques for K-best sphere decodersMoezzi-Madani, Nariman / Thorolfsson, Thorlindur / Davis, William Rhett et al. | 2010