A fully-complementary BiCMOS array for mixed analog/digital applications (Englisch)
- Neue Suche nach: Declerq, M.
- Neue Suche nach: Duchene, P.
- Neue Suche nach: Ballane, H.
- Neue Suche nach: Grigorie, M.
- Neue Suche nach: Reimann, T.
- Neue Suche nach: Baechler, T.
- Neue Suche nach: Declerq, M.
- Neue Suche nach: Duchene, P.
- Neue Suche nach: Ballane, H.
- Neue Suche nach: Grigorie, M.
- Neue Suche nach: Reimann, T.
- Neue Suche nach: Baechler, T.
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ISBN:
- Aufsatz (Konferenz) / Print
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Titel:A fully-complementary BiCMOS array for mixed analog/digital applications
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Weitere Titelangaben:Eine vollkomplementäre BiCMOS-Anordnung für gemischte Analog/Digital-Anwendungen
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Beteiligte:Declerq, M. ( Autor:in ) / Duchene, P. ( Autor:in ) / Ballane, H. ( Autor:in ) / Grigorie, M. ( Autor:in ) / Reimann, T. ( Autor:in ) / Baechler, T. ( Autor:in )
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Erschienen in:
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Verlag:
- Neue Suche nach: IEEE Service Center
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Erscheinungsort:Piscataway
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Erscheinungsdatum:1993
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Format / Umfang:4 Seiten, 7 Bilder, 2 Tabellen, 10 Quellen
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ISBN:
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Medientyp:Aufsatz (Konferenz)
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Format:Print
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Sprache:Englisch
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Schlagwörter:
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Datenquelle:
Inhaltsverzeichnis Konferenzband
Die Inhaltsverzeichnisse werden automatisch erzeugt und basieren auf den im Index des TIB-Portals verfügbaren Einzelnachweisen der enthaltenen Beiträge. Die Anzeige der Inhaltsverzeichnisse kann daher unvollständig oder lückenhaft sein.
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A low power trainable analogue neural network classifier chipLeong, P.H.W. / Jabri, M.A. et al. | 1993
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A VLSI array processor for neural network algorithmsBeichter, J. / Brüls, N. / Ramacher, U. / Sicheneder, E. / Klar, H. et al. | 1993
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VIPER: A 25-MHz, 100-MIPS Peak VLIW microprocessorGray, J. / Naylor, A. / Abnous, A. / Bagherzadeh, N. et al. | 1993
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A framework for fault-tolerant microarchitecture synthesisKarri, R. / Orailoglu, A. et al. | 1993
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A high level synthesis interface to erasable programmable logic devicesDoshi, A. / Goel, A. / Fuhrman, T. et al. | 1993
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Low-voltage fully-differential CMOS switched current filtersZele, R.H. / Allstot, D.J. et al. | 1993
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An analog circuit technique for finding the medianDietz, P.H. / Carley, L.R. et al. | 1993
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Advantages of heterogeneous logic block architectures for FPGAsHe, Jianshe / Rose, J. et al. | 1993
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Optimized reconfigurable cell array architecture for high-performance field programmable gate arraysBritton, B.K. / Hill, D.D. / Oswald, W. / Woo, Nam-Sung / Satwant Singh et al. | 1993
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PREP benchmarks for programmable logic devicesMcCarty, D. / Faria, D. / Alfke, P. et al. | 1993
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Introducing redundancy in field programmable gate arraysHatori, F. / Sakurai, T. / Nogami, K. / Sawada, K. / Takahashi, M. / Ichida, M. / Uchida, M. et al. | 1993
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Performance-driven layout through device sizingYou, Yongtao / Roetcisoender, B. / Cheng, A. / McGehee, R. / Sugiyama, S. et al. | 1993
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3,3 V, novel circuit techniques for a 28-million-transistor BiCMOS RISC processorMurabayashi, Fumio / Yamauchi, Tatsumi / Iwamura, Masahiro / Hotta, Takashi et al. | 1993
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A 2.4-ns, 16-bit, 0,5-micron CMOS arithmetic logic unit for microprogrammable video signal processor LSIsSuzuki, K. / Yarhashina, M. / Goto, J. / Inoue, T. / Kodsreki, Y. / Horiuchi, T. / Hamatake, B. et al. | 1993
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- 14
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Digital filter design for compact on-chip oversampling A/D conversionMar, M.F. / Brodersen, R.W. et al. | 1993
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Cost, power and parallelism in speech signal processingLyon, R.F. et al. | 1993
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HDTV data carrier separation using a multiplexing filterCaldwell, M. / Parikh, S. / Angle, R. / Kindsfater, K. et al. | 1993
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A low-power TDMA PCS wireless modem chip in 0.6 micron 3V CMOSCordell, R.R. / Kwan, A.F. / Ramachandran, K. / Sollenberger, N.R. / Benjamin, P.M. / Rappaport, D.L. et al. | 1993
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A 200 MHz CMOS digital radio frequency memory chip with analog outputIngelhag, P. / Söderquist, I. / Sundblad, R. et al. | 1993
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A 300 MHz BiCMOS serial data transceiverThompson, B. / Lee, Hae-Seung / Vito, L. de et al. | 1993
- 23
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Interface techniques for embedding custom mega cells in a gate arrayAshby, L.R. et al. | 1993
- 23
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A fully-complementary BiCMOS array for mixed analog/digital applicationsDeclerq, M. / Duchene, P. / Ballane, H. / Grigorie, M. / Reimann, T. / Baechler, T. et al. | 1993
- 23
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0.3 micron mixed analog/digital CMOS technology for low-voltage operationMiyamoto, Masafumi / Ishii, Tatsuya / Nagai, Ryo / Nishida, Takashi / Seki, Koichi et al. | 1993
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High performance BiCMOS technologyLiu, T.M. / Chiu, T.Y. / Swark, R.G. et al. | 1993
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CMOS sampler with 1 Gbit/s bandwidth and 25 ps resolutionNoije, W. van / Gray, C.T. / Liu, W. / Hughes, T.A. / Cavin, R.K. / Farlow, W.J. et al. | 1993
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Cell based fully integrated CMOS frequency synthesizersBayer, M.J. / Chomicz, T.F. / Garg, N.K. / James, F. / McEntarfer, P.W. / Mijuskovic, D. / Porter, J.A. et al. | 1993
- 28
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A 100 MHz 8 bit CMOS interpolating A/D converterSteyaert, M. / Roovers, R. / Craninckx, J. et al. | 1993
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A CMOS triple 9-bit 180 MHz DAC for HDTV applicationsDraxelmayr, D. et al. | 1993
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Computer aided conceptual design of multichip systemsSandborn, P.A. / Ghosh, R. / Drake, K. et al. | 1993
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Multilevel optimization of high speed VLSI interconnects using decompositionWei, Y. / Zhang, Q.J. / Nakhla, M.S. et al. | 1993
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Computer aided design and packaging optoelectronic systems with free space optical interconnectsLee, S.H. / Ozguz, V.H. / Fan, J. / Zabta, D. / Cheng, C.K. et al. | 1993
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