Inherent pattern jitter of STM-64 format signal and a reduction method (Englisch)
- Neue Suche nach: Ono, T.
- Neue Suche nach: Yamabayashi, Y.
- Neue Suche nach: Hagimoto, K.
- Neue Suche nach: Hohkawa, K.
- Neue Suche nach: Ono, T.
- Neue Suche nach: Yamabayashi, Y.
- Neue Suche nach: Hagimoto, K.
- Neue Suche nach: Hohkawa, K.
In:
Electronics Letters
;
28
, 22
;
2110-2112
;
1992
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ISSN:
- Aufsatz (Zeitschrift) / Print
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Titel:Inherent pattern jitter of STM-64 format signal and a reduction method
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Weitere Titelangaben:Das inhärente Pattern-Jitter von STM-64-Format-Signalen und ein Verfahren zur Reduzierung
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Beteiligte:Ono, T. ( Autor:in ) / Yamabayashi, Y. ( Autor:in ) / Hagimoto, K. ( Autor:in ) / Hohkawa, K. ( Autor:in )
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Erschienen in:Electronics Letters ; 28, 22 ; 2110-2112
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Verlag:
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Erscheinungsdatum:1992
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Format / Umfang:3 Seiten, 3 Quellen
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ISSN:
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Coden:
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DOI:
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Medientyp:Aufsatz (Zeitschrift)
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Format:Print
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Sprache:Englisch
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Schlagwörter:
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Datenquelle:
Inhaltsverzeichnis – Band 28, Ausgabe 22
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