0.15- mu m buried-channel p-MOSFETs with ultrathin boron-doped epitaxial Si layer (Englisch)
- Neue Suche nach: Ohguro, T.
- Neue Suche nach: Yamada, K.
- Neue Suche nach: Sugiyama, N.
- Neue Suche nach: Imai, S.
- Neue Suche nach: Usuda, K.
- Neue Suche nach: Yoshitomi, T.
- Neue Suche nach: Fiegna, C.
- Neue Suche nach: Ono, M.
- Neue Suche nach: Saito, M.
- Neue Suche nach: Momose, H.S.
- Neue Suche nach: Katsumata, Y.
- Neue Suche nach: Iwai, H.
- Neue Suche nach: Ohguro, T.
- Neue Suche nach: Yamada, K.
- Neue Suche nach: Sugiyama, N.
- Neue Suche nach: Imai, S.
- Neue Suche nach: Usuda, K.
- Neue Suche nach: Yoshitomi, T.
- Neue Suche nach: Fiegna, C.
- Neue Suche nach: Ono, M.
- Neue Suche nach: Saito, M.
- Neue Suche nach: Momose, H.S.
- Neue Suche nach: Katsumata, Y.
- Neue Suche nach: Iwai, H.
In:
IEEE Transactions on Electron Devices
;
45
, 3
;
717-721
;
1998
-
ISSN:
- Aufsatz (Zeitschrift) / Print
-
Titel:0.15- mu m buried-channel p-MOSFETs with ultrathin boron-doped epitaxial Si layer
-
Beteiligte:Ohguro, T. ( Autor:in ) / Yamada, K. ( Autor:in ) / Sugiyama, N. ( Autor:in ) / Imai, S. ( Autor:in ) / Usuda, K. ( Autor:in ) / Yoshitomi, T. ( Autor:in ) / Fiegna, C. ( Autor:in ) / Ono, M. ( Autor:in ) / Saito, M. ( Autor:in ) / Momose, H.S. ( Autor:in )
-
Erschienen in:IEEE Transactions on Electron Devices ; 45, 3 ; 717-721
-
Verlag:
-
Erscheinungsdatum:1998
-
Format / Umfang:5 Seiten, 5 Quellen
-
ISSN:
-
Coden:
-
DOI:
-
Medientyp:Aufsatz (Zeitschrift)
-
Format:Print
-
Sprache:Englisch
-
Schlagwörter:
-
Datenquelle:
Inhaltsverzeichnis – Band 45, Ausgabe 3
Zeige alle Jahrgänge und Ausgaben
Die Inhaltsverzeichnisse werden automatisch erzeugt und basieren auf den im Index des TIB-Portals verfügbaren Einzelnachweisen der enthaltenen Beiträge. Die Anzeige der Inhaltsverzeichnisse kann daher unvollständig oder lückenhaft sein.
- 573
-
EditorialJindal, R.P. et al. | 1998
- 574
-
ForewordSingh, R. et al. | 1998
- 580
-
A Stochastic Wire-Length Distribution for Gigascale Integration (GSI) - Part I: Derivation and ValidationDavis, J. A. / De, V. K. / Meindl, J. D. et al. | 1998
- 580
-
A Stochastic Wire-Length Distribution for Gigascale Integration (GSI) -- Part I: Derivation and Validation (Invited Paper)Davis, J.A. et al. | 1998
- 590
-
A Stochastic Wire-Length Distribution for Gigascale Integration (GSI) -- Part II: Applications to Clock Frequency, Power Dissipation, and Chip Size Estimation (Invited Paper)Davis, J.A. et al. | 1998
- 590
-
A Stochastic Wire-Length Distribution for Gigascale Integration (GSI) - Part II: Applications to Clock Frequency, Power Dissipation, and Chip Size EstimationDavis, J. A. / De, V. K. / Meindl, J. D. et al. | 1998
- 598
-
DRAM Technology Perspective for Gigabit EraKim, K. / Hwang, C.-G. / Lee, J. G. et al. | 1998
- 598
-
DRAM Technology Perspective for Gigabit Era (Invited Paper)Kim, K. et al. | 1998
- 609
-
Process Simplification in DRAM ManufacturingThakur, R. P. S. / DeBoer, S. J. / Ping, E.-X. / Jesse, C. A. et al. | 1998
- 609
-
Process Simplification in DRAM Manufacturing (Invited Paper)Thakur, R.P.S. et al. | 1998
- 620
-
Technology for Advanced High-Performance Microprocessors (Invited Paper)Bohr, M.T. et al. | 1998
- 620
-
Technology for Advanced High-Performance MicroprocessorsBohr, M. T. / El-Mansy, Y. A. et al. | 1998
- 626
-
Recent Advances in Process Synthesis for Semiconductor DevicesHosack, H. H. / Mozumder, P. K. / Pollack, G. P. et al. | 1998
- 626
-
Recent Advances in Process Synthesis for Semiconductor Devices (Invited Paper)Hosack, H.H. et al. | 1998
- 634
-
A New Device Design Methodology for ManufacturabilityLu, J.-C. et al. | 1998
- 643
-
Role of Rapid Photothermal Processing in Process IntegrationSingh, R. et al. | 1998
- 655
-
Process Integration of an Interlevel Dielectric (ILDO) Module Using a Building-In Reliability ApproachPaulsen, R.E. et al. | 1998
- 665
-
The Physical and Electrical Effects of Metal-Fill Patterning Practices for Oxide Chemical-Mechanical Polishing ProcessesStine, B.E. et al. | 1998
- 680
-
Making Silicon Nitride Film a Viable Gate Dielectric (Invited Paper)Ma, T.P. et al. | 1998
- 680
-
Making Silicon Nitride Film a Viable Gate Dielectric T. P. MaMa, T. P. et al. | 1998
- 691
-
Study of the Manufacturing Feasibility of 1.5-nm Direct-Tunneling Gate Oxide MOSFET's: Uniformity, Reliability, and Dopant Penetration of the Gate OxideMomose, H.S. et al. | 1998
- 701
-
Characteristics of Low-Energy BF2- or As-Implanted Layers and Their Effect on the Electrical Performance of 0.15-mm MOSFET'sNishida, A. et al. | 1998
- 701
-
Characteristics of Low-Energy BF~2- or As-Implanted Layers and Their Effect on the Electrical Performance of 0.15-m MOSFET'sNishida, A. / Murakami, E. / Kimura, S. et al. | 1998
- 710
-
Undoped Epitaxial Si Channel n-MOSFET Grown by UHV-CVD with PreheatingOhguro, T. et al. | 1998
- 717
-
0.15- mu m buried-channel p-MOSFETs with ultrathin boron-doped epitaxial Si layerOhguro, T. / Yamada, K. / Sugiyama, N. / Imai, S. / Usuda, K. / Yoshitomi, T. / Fiegna, C. / Ono, M. / Saito, M. / Momose, H.S. et al. | 1998
- 717
-
0.15-mm Buried-Channel p-MOSFET's with Ultrathin Boron-Doped Epitaxial Si LayerOhguro, T. et al. | 1998
- 717
-
0.15-m Buried-Channel p-MOSFET's with Ultrathin Boron-Doped Epitaxial Si LayerOhguro, T. / Yamada, K. / Sugiyama, N. / Imai, S. / Usuda, K. / Yoshitomi, T. / Fiegna, C. / Oho, M. / Saito, M. / Momose, H. S. et al. | 1998
- 722
-
Controlling Plasma Charge Damage in Advanced Semiconductor Manufacturing -- Challenge of Small Feature Size Device, Large Chip Size, and Large Wafer Size (Invited Paper)Aum, P.K. et al. | 1998
- 722
-
Controlling Plasma Charge Damage in Advanced Semiconductor Manufacturing - Challenge of Small Feature Size Device, Large Chip Size, and Large Wafer SizeAum, P. K. / Brandshaft, R. / Brandshaft, D. / Dao, T. B. et al. | 1998
- 731
-
Analysis of Thin Gate Oxide Degradation During Fabrication of Advanced CMOS ULSI CircuitsKim, S.U. et al. | 1998
- 737
-
0.15-m RF CMOS Technology Compatible with Logic CMOS for Low-Voltage OperationSaito, M. / Ono, M. / Fujimoto, R. / Tanimoto, H. / Ito, N. / Yoshitomi, T. / Ohguro, T. / Momose, H. S. / Iwai, H. et al. | 1998
- 737
-
0.15-mm RF CMOS Technology Compatible with Logic CMOS for Low-Voltage OperationSaito, M. et al. | 1998
- 743
-
Advanced IC Packaging for the Future ApplicationsAnjoh, I. / Nishimura, A. / Eguchi, S. et al. | 1998
- 743
-
Advanced IC Packaging for the Future Applications (Invited Paper)Anjoh, I. et al. | 1998
- 753
-
Plasma-Induced Charging Evaluation Using SCA and PDM ToolsKarzhavin, Y. et al. | 1998
- 756
-
Call For Papers -- 56th Annual Device Research Conference| 1998