A successful HBM ESD protection circuit for micron and sub-micron level CMOS (Englisch)
- Neue Suche nach: Carbajal, Bernard G. III
- Neue Suche nach: Cline, Roger A.
- Neue Suche nach: Andersen, Bernhard H.
- Neue Suche nach: Carbajal, Bernard G. III
- Neue Suche nach: Cline, Roger A.
- Neue Suche nach: Andersen, Bernhard H.
In:
Journal of Electrostatics
;
31
, 2-3
;
301-312
;
1993
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ISSN:
- Aufsatz (Zeitschrift) / Elektronische Ressource
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Titel:A successful HBM ESD protection circuit for micron and sub-micron level CMOS
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Beteiligte:Carbajal, Bernard G. III ( Autor:in ) / Cline, Roger A. ( Autor:in ) / Andersen, Bernhard H. ( Autor:in )
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Erschienen in:Journal of Electrostatics ; 31, 2-3 ; 301-312
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Verlag:
- Neue Suche nach: Elsevier Science Publishers B.V. All rights reserved.
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Erscheinungsdatum:05.05.1993
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Format / Umfang:12 pages
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ISSN:
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DOI:
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Medientyp:Aufsatz (Zeitschrift)
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Format:Elektronische Ressource
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Sprache:Englisch
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Datenquelle:
Inhaltsverzeichnis – Band 31, Ausgabe 2-3
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- 79
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A newly observed high frequency effect on the ESD protection utilized in a gigahertz NMOS technologyWeston, H.T. / Lee, V.W. / Stanik, T.D. et al. | 1993
- 91
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Latent damage and parametric drift in electrostatically damaged MOS transistorsTunnicliffe, M.J. / Dwyer, V.M. / Campbell, D.S. et al. | 1993
- 111
-
ESD protection in a 3.3 V sub-micron silicided CMOS technologyKrakauer, David et al. | 1993
- 131
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Annealing of ESD-induced damage in power MOSFETsZupac, D. / Pote, D. / Schrimpf, R.D. / Galloway, K.F. et al. | 1993
- 145
-
An investigation of BiCMOS ESD protection circuit elements and applications in submicron technologiesAmerasekera, Ajith / Chatterjee, Amitava et al. | 1993
- 161
-
Electrical overstress (EOS) power profiles: A guidline to qualify EOS hardness of semiconductor devicesDiiaz, C. et al. | 1993
- 161
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Electrical overstress (EOS) power profiles: A guideline to qualify EOS hardness of semiconductor devicesDíaz, Carlos / Kang, Sung-Mo / Duvvury, Charvaka / Wagner, Larry et al. | 1993
- 177
-
On chip ESD protection using SCR pairsCroft, Gregg D. et al. | 1993
- 177
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On clip ESD protection using SCR pairsCroft, G.D. et al. | 1993
- 199
-
From lightning to charged-device model electrostatic dischargesLin, Don L. / Welsher, Terry L. et al. | 1993
- 215
-
Techniques and methodologies for making system level ESD response measurements for troubleshooting or design verificationSmith, Douglas C. et al. | 1993
- 237
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Shallow trench isolation double-diode electrostatic discharge circuit and interaction with DRAM output circuitryVoldman, S.H. et al. | 1993
- 237
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Shallow trench isolation double-diobe electrostatic discharge circuit and interaction with DRAM output circuitryVoldman, Steven H. / Gross, Vaughn P. / Hargrove, Michael J. / Never, James M. / Slinkman, James A. / P.O'Boyle, Martin / Scott, Tom S. / Delecki, Joseph J. et al. | 1993
- 263
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Fieldemitter-based ESD-protection circuits for high-frequency devices and IC'sBock, K. / Hartnagel, H.-L. et al. | 1993
- 281
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Experimental study of unprotected MOS structures under EOS/ESD conditionsGreason, W.D. / Chum, K. et al. | 1993
- 301
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A successful HBM ESD protection circuit for micron and sub-micron level CMOSCarbajal, Bernard G. III / Cline, Roger A. / Andersen, Bernhard H. et al. | 1993
- 313
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Integrated circuit metal in the charged device model: bootstrap heating, melt damage, and scaling lawsMaloney, Timothy J. et al. | 1993
- 323
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ESD induced gate oxide damage during wafer fabrication processKim, Sang U. et al. | 1993
- 339
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The resistence phase of an air discharge and the formation of fast risetime ESD pulsesHyatt, H.M. et al. | 1993
- 339
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The resistive phase of an air discharge and the formation of fast risetime ESD pulsesHyatt, Hugh M. et al. | 1993
- 357
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Calendar| 1993
- 357
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Calender| 1993
- 359
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Author index volume 31| 1993
- 361
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Contents volume 31| 1993
- 363
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Subject index volume 31| 1993
- 364
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Panel of referees| 1993
- 365
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Publisher's note| 1993
- 365
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Submission of manuscripts by diskette| 1993
- i
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PrefaceDr. Greason, William D. / Eng, P. et al. | 1993