IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION SYSTEMS
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
Table of contents
- 957
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Memories - Nonvolatile CBRAM-Crossbar-Based 3-D-Integrated Hybrid Memory for Data RetentionWang, Y et al. | 2014
- 957
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Nonvolatile CBRAM-Crossbar-Based 3-D-Integrated Hybrid Memory for Data RetentionWang, Yuhao / Yu, Hao / Zhang, Wei et al. | 2014
- 971
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Average-8T Differential-Sensing Subthreshold SRAM With Bit Interleaving and 1k Bits Per BitlineKhayatzadeh, Mahmood / Lian, Yong et al. | 2014
- 983
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On-Chip Memory Hierarchy in One Coarse-Grained Reconfigurable Architecture to Compress Memory Space and to Reduce Reconfiguration Time and Data-Reference TimeWang, Yansheng / Liu, Leibo / Yin, Shouyi et al. | 2014
- 995
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Reliable Concurrent Error Detection Architectures for Extended Euclidean-Based Division Over ${\rm GF}(2^{m})$Mozaffari-Kermani, Mehran / Azarderakhsh, Reza / Lee, Chiou-Yng et al. | 2014
- 995
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Reliable Concurrent Error Detection Architectures for Extended Euclidean-Based Division Over GF(2^m)Mozaffari-Kermani, M. / Azarderakhsh, R. / Lee, C.-Y. et al. | 2014
- 995
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Design for Reliability - Reliable Concurrent Error Detection Architectures for Extended Euclidean-Based Division Over GF(2m)Mozaffari-Kermani, M et al. | 2014
- 1004
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Rate-0.96 LDPC Decoding VLSI for Soft-Decision Error Correction of NAND Flash MemoryKim, Jonghong / Sung, Wonyong et al. | 2014
- 1016
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On-Chip Sensors - Design of On-Chip Lightweight Sensors for Effective Detection of Recycled ICsZhang, X et al. | 2014
- 1016
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Design of On-Chip Lightweight Sensors for Effective Detection of Recycled ICsZhang, Xuehui / Tehranipoor, Mohammad et al. | 2014
- 1030
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Light-Weight On-Chip Structure for Measuring Timing Uncertainty Induced by Noise in Integrated CircuitsWang, Shuo / Tehranipoor, Mohammad et al. | 2014
- 1042
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Logical Effort for CMOS-Based Dual Mode Logic GatesLevi, Itamar / Belenky, Alexander / Fish, Alexander et al. | 2014
- 1042
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Logic Design - Logical Effort for CMOS-Based Dual Mode Logic GatesLevi, I et al. | 2014
- 1054
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Software/Hardware Parallel Long-Period Random Number Generation Framework Based on the WELL MethodLi, Yuan / Chow, Paul / Jiang, Jiang et al. | 2014
- 1054
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VLSI Design - Software/Hardware Parallel Long-Period Random Number Generation Framework Based on the WELL MethodLi, Y et al. | 2014
- 1060
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Reconfigurable CORDIC-Based Low-Power DCT Architecture Based on Data PriorityLee, Min-Woo / Yoon, Ji-Hwan / Park, Jongsun et al. | 2014
- 1069
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Practical Routability-Driven Design Flow for Multilayer Power Networks Using Aluminum-Pad LayerChang, Wen-Hsiang / Chao, Mango C.-T / Chen, Shi-Hao et al. | 2014
- 1069
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Power Distribution - Practical Routability-Driven Design Flow for Multilayer Power Networks Using Aluminum-Pad LayerChang, W-H et al. | 2014
- 1082
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UNION: A Unified Inter/Intrachip Optical Network for Chip MultiprocessorsWu, Xiaowen / Ye, Yaoyao / Xu, Jiang et al. | 2014
- 1082
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NOC - UNION: A Unified Inter/Intrachip Optical Network for Chip MultiprocessorsWu, X et al. | 2014
- 1096
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High-Resolution All-Digital Duty-Cycle Corrector in 65-nm CMOS TechnologyChung, Ching-Che / Sheng, Duo / Shen, Sung-En et al. | 2014
- 1096
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Timing - High-Resolution All-Digital Duty-Cycle Corrector in 65-nm CMOS TechnologyChung, C-C et al. | 2014
- 1106
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Variation-Aware Variable Latency DesignGupta, Saket / Sapatnekar, Sachin S. et al. | 2014
- 1118
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1.9-ps Jitter, 10.0-dBm-EMI Reduction Spread-Spectrum Clock Generator With Autocalibration VCO Technique for Serial-ATA ApplicationKawamoto, Takashi / Suzuki, Masato / Noto, Takayuki et al. | 2014
- 1127
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A 12.5-Gb/s On-Chip Oscilloscope to Measure Eye Diagrams and Jitter Histograms of High-Speed SignalsDehlaghi, Behzad / Magierowski, Sebastian / Belostotski, Leonid et al. | 2014
- 1138
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Fast Transistor Threshold Voltage Measurement Method for High-Speed, High-Accuracy Advanced Process CharacterizationLuo, Tseng-Chin / Chao, Mango C.-T. / Tseng, Huan-Chi et al. | 2014
- 1138
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Variations - Fast Transistor Threshold Voltage Measurement Method for High-Speed, High-Accuracy Advanced Process CharacterizationLuo, T-C et al. | 2014
- 1150
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FinCANON: A PVT-Aware Integrated Delay and Power Modeling Framework for FinFET-Based Caches and On-Chip NetworksLee, Chun-Yi / Jha, Niraj K. et al. | 2014
- 1164
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Analog Design - 1-V 365-μW 2.5-MHz Channel Selection Filter for 3G Wireless Receiver in 55-nm CMOSLo, T-Y et al. | 2014
- 1164
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1-V 365- $\mu{\rm W}$ 2.5-MHz Channel Selection Filter for 3G Wireless Receiver in 55-nm CMOSLo, Tien-Yu / Lo, Chi-Hsiang et al. | 2014
- 1164
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1-V 365-μW 2.5-MHz Channel Selection Filter for 3G Wireless Receiver in 55-nm CMOSLo, T.-Y. / Lo, C.-H. et al. | 2014
- 1170
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Litho-Friendly Decomposition Method for Self-Aligned Triple PatterningMirsaeedi, Minoo / Torres, Andres J. / Anis, Mohab et al. | 2014
- 1170
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BRIEF PAPERS - Litho-Friendly Decomposition Method for Self-Aligned Triple PatterningMirsaeedi, M et al. | 2014
- 1174
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Area-Delay Efficient Binary Adders in QCAPerri, Stefania / Corsonello, Pasquale / Cocorullo, Giuseppe et al. | 2014
- 1179
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Optimization Scheme to Minimize Reference Resistance Distribution of Spin-Transfer-Torque MRAMHuang, Kejie / Ning, Ning / Lian, Yong et al. | 2014
- 1183
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High-Throughput and Low-Complexity BCH Decoding Architecture for Solid-State DrivesLee, Youngjoo / Yoo, Hoyoung / Yoo, Injae et al. | 2014
- 1187
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Built-In Binary Code Inversion Technique for On-Chip Flash Memory Sense Amplifier With Reduced Read Current ConsumptionPark, Daejin / Kim, Tag Gon et al. | 2014
- 1192
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Dark Silicon Aware Multicore Systems: Employing Design Automation With Architectural InsightAllred, Jason M. / Roy, Sanghamitra / Chakraborty, Koushik et al. | 2014
- 1197
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LASIC: Loop-Aware Sleepy Instruction Caches Based on STT-RAM TechnologyAhn, Junwhan / Choi, Kiyoung et al. | 2014
- 1202
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Low-Complexity Reconfigurable Fast Filter Bank for Multi-Standard Wireless ReceiversDarak, Sumit J. / Gopi, Smitha Kavallur Pisharath / Prasad, Vinod Achutavarrier et al. | 2014
- 1207
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Open Access| 2014
- 1208
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems information for authors| 2014
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Table of contents| 2014
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems publication information| 2014
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems society information| 2014