Modern development methods and tools for embedded reconfigurable systems: A survey (English)
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- New search for: Jozwiak, L.
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INTEGRATION -AMSTERDAM-
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43
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1-33
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2010
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ISSN:
- Article (Journal) / Print
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Title:Modern development methods and tools for embedded reconfigurable systems: A survey
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Contributors:
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Published in:INTEGRATION -AMSTERDAM- ; 43, 1 ; 1-33
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Publisher:
- New search for: Elsevier Science B.V., Amsterdam.
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Publication date:2010-01-01
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Size:33 pages
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ISSN:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
- New search for: 519
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Classification:
DDC: 519 -
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Table of contents – Volume 43, Issue 1
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Modern development methods and tools for embedded reconfigurable systems: A surveyJóźwiak, Lech / Nedjah, Nadia / Figueroa, Miguel et al. | 2009
- 34
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Fully redundant decimal addition and subtraction using stored-unibit encodingKaivani, Amir / Jaberipur, Ghassem et al. | 2009
- 42
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Fast modulo Formula Not Shown multi-operand adders and residue generatorsVergos, H. T. / Bakalis, D. / Efstathiou, C. et al. | 2010
- 42
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Fast modulo multi-operand adders and residue generatorsVergos, H.T. / Bakalis, D. / Efstathiou, C. et al. | 2009
- 42
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Fast modulo multi-operand adders and residue generatorsVergos, H.T. et al. | 2010
- 49
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Reducing leakage power with BTB access predictionKahn, Roger / Weiss, Shlomo et al. | 2009
- 58
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A static verification approach for architectural integration of mixed-signal integrated circuitsMukhopadhyay, Rajdeep / Komuravelli, Anvesh / Dasgupta, Pallab / Panda, S.K. / Mukhopadhyay, Siddhartha et al. | 2009
- 72
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A new methodology to implement the AES algorithm using partial and dynamic reconfigurationGranado-Criado, José M. / Vega-Rodríguez, Miguel A. / Sánchez-Pérez, Juan M. / Gómez-Pulido, Juan A. et al. | 2009
- 81
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A test set embedding approach based on twisted-ring counter with few seedsZhou, Bin / Ye, Yi-zheng / Li, Zhao-lin / Zhang, Jian-wei / Wu, Xin-chun / Ke, Rui et al. | 2009
- 101
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Formal verification of high-level data-flow synthesis designs using relational modeling and symbolic computationYang, Zhi / Ma, Guangsheng / Zhang, Shu et al. | 2009
- 113
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Concurrent error detection architectures for Gaussian normal basis multiplication over GF(2m)Lee, Chiou-Yng et al. | 2009
- 124
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An improved common subexpression elimination method for reducing logic operators in FIR filter implementations without increasing logic depthVinod, A.P. / Lai, Edmund / Maskell, Douglas L. / Meher, P.K. et al. | 2009
- 136
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Analog circuits optimization based on evolutionary computation techniquesBarros, Manuel / Guilherme, Jorge / Horta, Nuno et al. | 2009
- 156
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Statistical modeling and analysis of chip-level leakage power by spectral stochastic methodShen, Ruijing / Tan, Sheldon X.-D. / Mi, Ning / Cai, Yici et al. | 2009
- 166
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Erratum to the Special Section on DCIS 2006 [Integration, the VLSI Journal, Volume 42, Issue 3, June 2009]Puig, Manel / Lopez-Villegas, Jose / Herms, Atila et al. | 2009