A Mixed Signal DC Offset Cancellation for VGA of Zero-IF Receiver (English)
- New search for: Zhao, Y.
- New search for: Wang, J.
- New search for: Sheng, Y.
- New search for: Zhao, Y.
- New search for: Wang, J.
- New search for: Sheng, Y.
In:
Journal of circuits, systems and computers
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26
, 3
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1750047-1750047
;
2017
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ISSN:
- Article (Journal) / Print
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Title:A Mixed Signal DC Offset Cancellation for VGA of Zero-IF Receiver
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Contributors:
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Published in:Journal of circuits, systems and computers ; 26, 3 ; 1750047-1750047
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Publisher:
- New search for: WORLD SCIENTIFIC CO. PTE. LTD.
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Publication date:2017-01-01
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Size:1 pages
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ISSN:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
- New search for: 621.381
- Further information on Dewey Decimal Classification
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Classification:
DDC: 621.381 -
Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents – Volume 26, Issue 3
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
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Optimization Techniques for CNT Based VLSI Interconnects — A ReviewKarthikeyan, A et al. | 2017
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Error Compensation Techniques for Fixed-Width Array Multiplier Design — A Technical SurveyBalamurugan, S et al. | 2017
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Design of Configurable gm−C Biquadratic FilterBhanja, Mousumi et al. | 2017
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A Fault-Tolerant Deflection Routing for Network-on-ChipZhou, Xiaofeng et al. | 2017
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On Time Moments and Markov Parameters of Continuous Interval SystemsSingh, V. P et al. | 2017
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Multistage Latency Adders Architecture Employing Approximate ComputingYang, Xinghua et al. | 2017
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A Self-Starting 70 mV-1 V, 65% Peak Efficient, TEG Energy Harvesting Chip with 5 ms Startup TimeSinha, Arun Kumar et al. | 2017
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Leakage Reduction of SRAM-Based Look-Up Table Using Dynamic Power GatingNag, Abhishek et al. | 2017
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Pipelined-Scheduling of Multiple Embedded Applications on a Multi-Processor-SoCSalamy, Hassan et al. | 2017
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Designing and Implementing a Lightweight WSN MAC Protocol for Smart Home Networking ApplicationsChen, Ching-Han et al. | 2017
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FPGA Implementation for Modified RCM-RW on Digital ImagesMaity, Hirak Kumar et al. | 2017
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Fast Algorithms and Architectures for 8-Point DST-II/DST-VII ApproximationsCintra, Renato J et al. | 2017
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Reduced Complexity Linearity Improved Threshold Quantized Comparator Based Flash ADCPalsodkar, Prachi et al. | 2017
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A Mixed Signal DC Offset Cancellation for VGA of Zero-IF ReceiverZhao, Yiqiang et al. | 2017
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A Low Power Low-Pass Fourth-Order Filter for WiMAX/LTE Receiver in CMOS 45nm TechnologyNiar, Vida Orduee et al. | 2017
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Implementation on the FPGA of DTC-SVM Based Proportional Integral and Sliding Mode Controllers of an Induction Motor: A Comparative StudyKrim, Saber et al. | 2017
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Resistor-Less Single-Purpose or Reconfigurable Biquads Utilizing Single z-Copy Controlled-Gain Voltage Differencing Current ConveyorJerabek, Jan et al. | 2017
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A Dual-Band Bandpass Filter Using Quad-Mode Resonator for Bluetooth and WLAN ApplicationsMurmu, Lakhindar et al. | 2017