VLSI-SoC: Design Methodologies for SoC and SiP : 16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, Rhodes Island, Greece, October 13-15, 2008, Revised Selected Papers (English)
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2010
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Title:VLSI-SoC: Design Methodologies for SoC and SiP : 16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, Rhodes Island, Greece, October 13-15, 2008, Revised Selected Papers
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Contributors:
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Conference:International Conference on Very Large Scale Integration ; 16 ; 2008 ; Rhodes Island, Greece
VLSI-SoC ; 16 ; 2008 ; Rhodes Island, Greece -
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Place of publication:Berlin, Heidelberg
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Publication date:2010
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Size:Online-Ressource (VIII, 287p. 182 illus, digital)
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Remarks:Campusweiter Zugriff (Universität Hannover). - Vervielfältigungen (z.B. Kopien, Downloads) sind nur von einzelnen Kapiteln oder Seiten und nur zum eigenen wissenschaftlichen Gebrauch erlaubt. Keine Weitergabe an Dritte. Kein systematisches Downloaden durch Robots.
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Type of media:Conference Proceedings
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Type of material:Electronic Resource
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Language:English
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Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Physical Design Issues in 3-D Integrated TechnologiesPavlidis, V.F. / Friedman, E.G. / International Federation for Information Processing et al. | 2010
- 22
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Universal Methodology to Handle Differential Pairs during Pin AssignmentMeister, T. / Lienig, J. / Thomke, G. / International Federation for Information Processing et al. | 2010
- 43
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Analysis and Design of Charge Pumps for Telecommunication ApplicationsKalenteridis, V. / Papathanasiou, K. / Siskos, S. / International Federation for Information Processing et al. | 2010
- 61
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Comparison of Two Autonomous AC-DC Converters for Piezoelectric Energy Scavenging SystemsDallago, E. / Miatton, D. / Venchi, G. / Bottarel, V. / Frattini, G. / Ricotti, G. / Schipani, M. / International Federation for Information Processing et al. | 2010
- 81
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Trapping Biological Species in a Lab-on-Chip Microsystem: Micro Inductor Optimization Design and SU8 ProcessEscriba, C. / Fulcrand, R. / Artillan, P. / Jugieu, D. / Bancaud, A. / Boukabache, A. / Gue, A.-M. / Fourniols, J.-Y. / International Federation for Information Processing et al. | 2010
- 97
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Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETsO Connor, I. / Hassoune, I. / Navarro, D. / International Federation for Information Processing et al. | 2010
- 114
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Timed Coloured Petri Nets for Performance Evaluation of DSP Applications: The 3GPP LTE Case StudyFrigerio, L. / Marks, K. / Krikelis, A. / International Federation for Information Processing et al. | 2010
- 133
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Real-Time Biologically-Inspired Image Exposure CorrectionVonikakis, V. / Iakovidou, C. / Andreadis, I. / International Federation for Information Processing et al. | 2010
- 154
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A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet FiltersGuntoro, A. / Glesner, M. / International Federation for Information Processing et al. | 2010
- 174
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On the Comparison of Different Number Systems in the Implementation of Complex FIR FiltersCardarilli, G.C. / Nannarelli, A. / Re, M. / International Federation for Information Processing et al. | 2010
- 191
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Time Efficient Dual-Field Unit for Cryptography-Related ProcessingCilardo, A. / Mazzocca, N. / International Federation for Information Processing et al. | 2010
- 211
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A Temperature-Aware Placement and Routing Algorithm Targeting 3D FPGAsSiozios, K. / Soudris, D. / International Federation for Information Processing et al. | 2010
- 232
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A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC CommunicationRana, V. / Atienza, D. / Santambrogio, M.D. / Sciuto, D. / De Micheli, G. / International Federation for Information Processing et al. | 2010
- 251
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Fast Instruction Memory Hierarchy Power Exploration for Embedded SystemsKroupis, N. / Soudris, D. / International Federation for Information Processing et al. | 2010
- 271
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Timing Error Detection and Correction by Time DilationFloros, A. / Tsiatouhas, Y. / Kavousianos, X. / International Federation for Information Processing et al. | 2010