Proceedings of the 26th edition on Great Lakes Symposium on VLSI (English)
- New search for: Association for Computing Machinery-Digital Library
- New search for: ACM Special Interest Group on Design Automation
- New search for: Association for Computing Machinery-Digital Library
- New search for: ACM Special Interest Group on Design Automation
2016
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ISBN:
- Conference Proceedings / Electronic Resource
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Title:Proceedings of the 26th edition on Great Lakes Symposium on VLSI
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Contributors:
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Published in:
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Publisher:
- New search for: ACM
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Place of publication:New York, NY
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Publication date:2016
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Size:1 online resource (446 pages)
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Remarks:Campusweiter Zugriff (Universität Hannover) - Vervielfältigungen (z.B. Kopien, Downloads) sind nur von einzelnen Kapiteln oder Seiten und nur zum eigenen wissenschaftlichen Gebrauch erlaubt. Keine Weitergabe an Dritte. Kein systematisches Downloaden durch Robots.
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ISBN:
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DOI:
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Type of media:Conference Proceedings
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Type of material:Electronic Resource
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Language:English
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Keywords:
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Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Why is it so hard to make secure chips?Witteman, Marc et al. | 2016
- 9
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High-speed polynomial multiplier architecture for ring-LWE based public key cryptosystemsDu, Chaohui / Bai, Guoqiang / Wu, Xingjun et al. | 2016
- 39
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Concurrent error detection for reliable SHA-3 designLuo, Pei / Li, Cheng / Fei, Yunsi et al. | 2016
- 45
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Secure model checkers for Network-on-Chip (NoC) architecturesBoraten, Travis / DiTomaso, Dominic / Kodi, Avinash Karanth et al. | 2016
- 87
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MCFRoute 2.0: A redundant via insertion enhanced concurrent detailed routerJia, Xiaotao / Cai, Yici / Zhou, Qiang / Yu, Bei et al. | 2016
- 117
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Static noise margin based yield modelling of 6T SRAM for area and minimum operating voltage improvement using recovery techniquesBatra, Nidhi / Sehgal, Pawan / Kaushik, Shashwat / Hashmi, Mohammad S. / Bhalla, Sudesh / Grover, Anuj et al. | 2016
- 129
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A sampling clock skew correction technique for time-interleaved SAR ADCsPrashanth, Daniel / Lee, Hae-Seung et al. | 2016
- 133
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Secure and low-overhead circuit obfuscation technique with multiplexersWang, Xueyan / Jia, Xiaotao / Zhou, Qiang / Cai, Yici / Yang, Jianlei / Gao, Mingze / Qu, Gang et al. | 2016
- 163
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Multiple attempt write strategy for low energy STT-RAMPark, Jaeyoung / Orshansky, Michael et al. | 2016
- 203
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Workload-aware worst path analysis of processor-scale NBTI degradationBian, Song / Shintani, Michihiro / Morita, Shumpei / Awano, Hiromitsu / Hiromoto, Masayuki / Sato, Takashi et al. | 2016
- 221
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A general sign bit error correction scheme for approximate addersZhou, Rui / Qian, Weikang et al. | 2016
- 233
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Exploratory power noise models of standard cell 14, 10, and 7 nm FinFET ICsPatel, Ravi / Xu, Kan / Friedman, Eby G. / Raghavan, Praveen et al. | 2016
- 245
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Polynomial arithmetic using sequential stochastic logicSaraf, Naman / Bazargan, Kia et al. | 2016
- 263
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Delay estimates for graphene nanoribbons: A novel measure of fidelity and experiments with global routing treesDas, Subrata / Das, Soma / Majumder, Adrija / Dasgupta, Parthasarathi / Das, Debesh Kumar et al. | 2016
- 299
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Security primitive design with nanoscale devices: A case study with resistive RAMKaram, Robert / Liu, Rui / Chen, Pai-Yu / Yu, Shimeng / Bhunia, Swarup et al. | 2016
- 341
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Dynamic real-time scheduler for large-scale MPSoCsRuaro, Marcelo / Moraes, Fernando G. et al. | 2016
- 369
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An enhanced analytical electrical masking model for multiple event transientsWatkins, Adam / Tragoudas, Spyros et al. | 2016
- 385
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Ultra-low energy reconfigurable spintronic threshold logic gateFan, Deliang et al. | 2016
- 389
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Red-shield: Shielding read disturbance for STT-RAM based register files on GPUsZhang, Hang / Chen, Xuhao / Xiao, Nong / Liu, Fang / Chen, Zhiguang et al. | 2016
- 403
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An offline frequent value encoding for energy-efficient MLC/TLC non-volatile memoriesAlsuwaiyan, Ali / Mohanram, Kartik et al. | 2016
- 409
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Low-power multi-port memory architecture based on Spin Orbit Torque magnetic devicesBishnoi, Rajendra / Oboril, Fabian / Tahoori, Mehdi B. et al. | 2016
- 415
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Optimizing the operating voltage of tunnel FET-based SRAM arrays equipped with read/write assist circuitryAfzali-Kusha, Hassan / Shafaei, Alireza / Pedram, Massoud et al. | 2016
- 433
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Learning-based near-optimal area-power trade-offs in hardware design for neural signal acquisitionAprile, Cosimo / Baldassarre, Luca / Gupta, Vipul / Yoo, Juhwan / Shoaran, Mahsa / Leblebici, Yusuf / Cevher, Volkan et al. | 2016