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High speed logic circuits were built using Epitaxial-Silicon-Film-on-Insulator (ESFI) Silicon-on-Sapphire (SOS) technology in order to define and extend this technique. From the basic ESFI-CMOS process, three variations were derived and realized: the self-aligned ESFION-process (ESFI with ions) for high speed logic; the low voltage process for clocks and other low power consuming circuits; and the high voltage process for high voltage applications (50 to 400 V) on chips. Sample test results verify the CMOS process concept and meet parameter objectives for circuit elements. The problems of leakage current and threshold voltage reproducibility are solved and analytically understood. High voltage test circuit results are shown for an LCD driver, a 110 V power supply, and for a galvanic separation function.