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There are several published papers on obfuscation techniques to prevent reverse engineering of an integrated circuit design. Among these, the split fabrication approach is the most promising to provide strong obfuscation. In this report, proposed improvements and additional analyses are included for two of the metrics that can be used to measure the level of obfuscation for the split fabrication approach. First, the partitioning depth metric provides guidance to the partitioning tool with respect to the extent of partitioning needed to sufficiently hide the design. Second, the connection possibility metric provides a statistical analysis of the potential to reconstruct the original design from a partitioned design. A detail is revealed that shows more precisely how difficult reverse engineering will be based on this metric.