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A Methodology for Power-Aware Transaction-Level Models of Systems-on-Chip Using UPF Standard Concepts
British Library Conference Proceedings | 2011|Contributors: Ayala, Jose L. -
Analytical Compact Model in Verilog-A for Electrostatically Actuated Ohmic Switches
British Library Online Contents | 2014| -
Analytical Compact Model in Verilog-A for Electrostatically Actuated Ohmic Switches
Online Contents | 2014|Contributors: Ayala, C L, Lonescu, A M -
An On-Chip All-Digital PV-Monitoring Architecture for Digital IPs
British Library Conference Proceedings | 2011|Contributors: Ayala, Jose L. -
A novel reduced l/4 resonant monopole with associated extra inductance
British Library Online Contents | 2010|
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