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Methods of forming features having differing pitch spacing and critical dimensions
Free accessEuropean Patent Office | 2016| -
METHODS OF FORMING FEATURES HAVING DIFFERING PITCH SPACING AND CRITICAL DIMENSIONS
Free accessEuropean Patent Office | 2016| -
Sidewall image transfer process for multiple gate width patterning
Free accessEuropean Patent Office | 2019| -
Methods of forming integrated circuits and multiple critical dimension self-aligned double patterning processes
Free accessEuropean Patent Office | 2016| -
Methods for fabricating integrated circuits using self-aligned quadruple patterning
Free accessEuropean Patent Office | 2015| -
METHODS FOR FABRICATING INTEGRATED CIRCUITS USING SELF-ALIGNED QUADRUPLE PATTERNING
Free accessEuropean Patent Office | 2015| -
Methods for fabricating integrated circuits including selectively forming and removing fin structures
Free accessEuropean Patent Office | 2015| -
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SELECTIVELY FORMING AND REMOVING FIN STRUCTURES
Free accessEuropean Patent Office | 2015| -
Replacement metal gate including dielectric gate material
Free accessEuropean Patent Office | 2017| -
Dummy gate used as interconnection and method of making the same
Free accessEuropean Patent Office | 2019| -
REPLACEMENT METAL GATE INCLUDING DIELECTRIC GATE MATERIAL
Free accessEuropean Patent Office | 2016|
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