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Method and apparatus for adaptively tuning an integrated circuit
Free accessEuropean Patent Office | 2016| -
LEARNING-BASED POWER MODELING OF A PROCESSOR CORE AND SYSTEMS WITH MULTIPLE PROCESSOR CORES
Free accessEuropean Patent Office | 2023| -
MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY
Free accessEuropean Patent Office | 2023| -
MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY
Free accessEuropean Patent Office | 2023| -
Multi-die integrated circuit with array of data processing engines
Free accessEuropean Patent Office | 2023| -
Multi-die integrated circuit with data processing engine array
Free accessEuropean Patent Office | 2023| -
Multi-die integrated circuit with data processing engine array
Free accessEuropean Patent Office | 2022| -
MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY
Free accessEuropean Patent Office | 2022| -
MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY
Free accessEuropean Patent Office | 2022| -
MULTI-DIE INTEGRATED CIRCUIT WITH DATA PROCESSING ENGINE ARRAY
Free accessEuropean Patent Office | 2022| -
Core for a data processing engine in an integrated circuit
Free accessEuropean Patent Office | 2020| -
Multi-port stream switch for stream interconnect network
Free accessEuropean Patent Office | 2022| -
DATA PROCESSING ENGINE ARRAY ARCHITECTURE WITH MEMORY TILES
Free accessEuropean Patent Office | 2022|
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