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Divider Verification Using Symbolic Computer Algebra and Delayed Don't Care Optimization
British Library Conference Proceedings | 2023| -
Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture
British Library Conference Proceedings | 2023| -
Extended Abstract: Data-Driven Test Generation for Black-Box Systems From Learned Decision Tree Models
British Library Conference Proceedings | 2023| -
Worst-Case Response Time Analysis of Earliest Deadline First in an Industrial Case Study
British Library Conference Proceedings | 2023| -
UPEC-PN: Exhaustive constant time verification of low-level software using property checking
British Library Conference Proceedings | 2023| -
Formal Verification of Data-Obliviousness in Hardware
British Library Conference Proceedings | 2023| -
Towards Comprehensive Verification of Hardware and Software for RISC-V based Embedded Systems
British Library Conference Proceedings | 2023| -
How We Learned to Stop Worrying and Build a RISC-V VP with only one Microcode Instruction
British Library Conference Proceedings | 2023| -
Energy-efficient Deployment of Deep Learning Applications on Cortex-M based Microcontrollers using Deep Compression
British Library Conference Proceedings | 2023| -
Towards Buffers as a Scalable Alternative to Registers for Processor-Local Memory
British Library Conference Proceedings | 2023| -
Generator IP-reuse and Automated Infrastructure Generation for Model-based Full-Chip Generation
British Library Conference Proceedings | 2023| -
Security Validation of VP-based Heterogeneous Systems: A Completeness-driven Perspective
British Library Conference Proceedings | 2023| -
Equivalence Checking of Majority-based Function Mapping on ReRAM Crossbars
British Library Conference Proceedings | 2023| -
Runtime Verification of Hybrid Systems with Affine Arithmetic Decision Diagrams
British Library Conference Proceedings | 2023| -
Efficient Proof Checking with LRAT in CaDiCal (Work in Progress)
British Library Conference Proceedings | 2023|
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