Did you mean: person:("chaves, C") • person:("chavez, C") • person:("chauvet, C") • person:("charvet, C") • person:("chave, C")
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Implementation of Signal Processing Systems - A First Step Toward On-Chip Memory Mapping for Parallel Turbo and LDPC Decoders: A Polynomial Time Mapping Algorithm
Online Contents | 2013|Contributors: Chavet, C -
High-Level Synthesis High-Level Synthesis for Designing Multimode Architectures
Online Contents | 2010|Contributors: Chavet, C -
A Memory Mapping Approach for Network and Controller Optimization in Parallel Interleaver Architectures
British Library Conference Proceedings | 2013| -
A Memory Mapping Approach Based on Network Customization to Design Conflict-Free Parallel Hardware Architectures
British Library Conference Proceedings | 2014| -
A First Step Toward On-Chip Memory Mapping for Parallel Turbo and LDPC Decoders: A Polynomial Time Mapping Algorithm
British Library Online Contents | 2013| -
A First Step Toward On-Chip Memory Mapping for Parallel Turbo and LDPC Decoders: A Polynomial Time Mapping Algorithm
Online Contents | 2013|Contributors: Chavet, C -
A Design Approach Dedicated to Network-Based and Conflict-Free Parallel Interleavers
British Library Conference Proceedings | 2012|
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