PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks (English)
- New search for: Chan, J.
- New search for: Hendry, G.
- New search for: Biberman, A.
- New search for: Bergman, K.
- New search for: Carloni, L.P.
- New search for: Institute of Electrical and Electronics Engineers
- New search for: Chan, J.
- New search for: Hendry, G.
- New search for: Biberman, A.
- New search for: Bergman, K.
- New search for: Carloni, L.P.
- New search for: Institute of Electrical and Electronics Engineers
In:
Design, automation and test in Europe
;
691-696
;
2010
-
ISBN:
- Conference paper / Print
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Title:PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks
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Contributors:Chan, J. ( author ) / Hendry, G. ( author ) / Biberman, A. ( author ) / Bergman, K. ( author ) / Carloni, L.P. ( author ) / Institute of Electrical and Electronics Engineers
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Conference:Conference, Design, automation and test in Europe ; 2010 ; Dresden, Germany
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Published in:Design, automation and test in Europe ; 691-696DATE -PROCEEDINGS- HARDCOPY- ; 691-696
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Publisher:
- New search for: IEEE
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Place of publication:Piscataway, N.J.
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Publication date:2010-01-01
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Size:6 pages
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Remarks:Includes bibliographical references and index
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ISBN:
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Type of media:Conference paper
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Type of material:Print
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Language:English
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Keywords:
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Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
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Demonstration of an in-band reconfiguration data distribution and network node reconfigurationPross, Uwe / Goller, Sebastian / Markert, Erik / Juttner, Michael / Langer, Jan / Heinkel, Ulrich / Knablein, Joachim / Schneider, Axel et al. | 2010
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Passive reduced order modeling of multiport interconnects via semidefinite programmingMahmood, Zohaib / Bond, Brad / Moselhy, Tarek / Megretski, Alexandre / Daniel, Luca et al. | 2010
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GoldMine: Automatic assertion generation using data mining and static analysisVasudevan, Shobha / Sheridan, David / Patel, Sanjay / Tcheng, David / Tuohy, Bill / Johnson, Daniel et al. | 2010
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Assertion-based verification of RTOS propertiesOliveira, Marcio F S / Zabel, Henning / Mueller, Wolfgang et al. | 2010
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Post-placement temperature reduction techniquesWei Liu, / Nannarelli, Alberto / Calimera, Andrea / Macii, Enrico / Poncino, Massimo et al. | 2010
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Clock gating approaches by IOEX graphs and cluster efficiency plotsSrinivas, Jithendra / Jairam, S et al. | 2010
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Timing modeling and analysis for AUTOSAR-based software development - a case studyKlobedanz, Kay / Kuznik, Christoph / Thuy, Andreas / Mueller, Wolfgang et al. | 2010
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Design of a real-time optimized emulation methodKerstan, Timo / Oertel, Markus et al. | 2010
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Capturing intrinsic parameter fluctuations using the PSP compact modelCheng, B / Dideban, D / Moezi, N / Millar, C / Roy, G / Wang, X / Roy, S / Asenov, A et al. | 2010
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Power efficient voltage islanding for Systems-on-chip from a floorplanning perspectiveGhosh, Pavel / Sen, Arunabha et al. | 2010
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Always energy-optimal microscopic wireless systemsRabaey, Jan M et al. | 2010
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Hardware / software design challenges of low-power sensor nodes for condition monitoringAhlendorf, H / Gopfert, L et al. | 2010
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Security aspects in 6lowPan networksBarker, Ron et al. | 2010
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Monolithically stackable hybrid FPGAStrukov, Dmitri / Mishchenko, Alan et al. | 2010
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Spintronic memristor devices and applicationXiaobin Wang, / Yiran Chen, et al. | 2010
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Compact model of memristors and its application in computing systemsHai Li, / Miao Hu, et al. | 2010
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Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCsLudovici, Daniele / Strano, Alessandro / Gaydadjiev, Georgi N / Benini, Luca / Bertozzi, Davide et al. | 2010
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A methodology for the characterization of process variation in NoC linksHernandez, Carles / Silla, Federico / Duato, Jose et al. | 2010
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PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networksChan, Johnnie / Hendry, Gilbert / Biberman, Aleksandr / Bergman, Keren / Carloni, Luca P et al. | 2010
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An 11.6-19.3mW 0.375-13.6GHz CMOS frequency synthesizer with rail-to-rail operationGeis, Arnd / Nuzzoz, Pierluigi / Ryckaert, Julien / Rolainy, Yves / Vandersteeny, Gerd / Craninckx, Jan et al. | 2010
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A compact digital amplitude modulator in 90nm CMOSChironi, V / Debaillie, B / Baschirotto, A / Craninckx, J / Ingels, M et al. | 2010
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A 14 bit, 280 kS/s cyclic ADC with 100 dB SFDRFroehlich, Thomas / Sharma, Vivek / Bingesser, Markus et al. | 2010
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Ultra-low power mixed-signal design platform using subthreshold source-coupled circuitsTajalli, Armin / Leblebici, Yusuf et al. | 2010
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Clock skew scheduling for soft-error-tolerant sequential circuitsKai-Chiang Wu, / Marculescu, Diana et al. | 2010
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HW/SW co-detection of transient and permanent faults with fast recovery in statically scheduled data pathsScholzel, Mario et al. | 2010
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Scalable codeword generation for coupled busesKarmarkar, Kedar / Tragoudas, Spyros et al. | 2010
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An adaptive code rate EDAC scheme for random access memoryChing-Yi Chen, / Cheng-Wen Wu, et al. | 2010
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Throughput modeling to evaluate process merging transformations in polyhedral process networksMeijer, S / Nikolov, H / Stefanov, T et al. | 2010
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Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platformsCastrillon, Jeronimo / Velasquez, Ricardo / Stulova, Anastasia / Weihua Sheng, / Jianjiang Ceng, / Leupers, Rainer / Ascheid, Gerd / Meyr, Heinrich et al. | 2010
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Bounding the shared resource load for the performance analysis of multiprocessor systemsSchliecker, Simon / Negrean, Mircea / Ernst, Rolf et al. | 2010
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An error-correcting unordered code and hardware support for robust asynchronous global communicationAgyekum, Melinda Y / Nowick, Steven M et al. | 2010
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Large-scale Boolean matchingKatebi, Hadi / Markov, Igor L et al. | 2010
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KL-Cuts: A new approach for logic synthesis targeting multiple output blocksMartinello, Osvaldo / Marques, Felipe S / Ribas, Renato P / Reis, Andre I et al. | 2010
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RALF: Reliability Analysis for Logic Faults — An exact algorithm and its applicationsLuckenbill, Samuel / Ju-Yueh Lee, / Yu Hu, / Majumdar, Rupak / Lei He, et al. | 2010
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Panel 6.8: The challenges of heterogeneous multicore debugMartin, Grant / Mayer, Albrecht et al. | 2010
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Why design must change: Rethinking digital designHorowitz, Mark et al. | 2010
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Low power design of the X-GOLD® SDR 20 baseband processorRaab, Wolfgang / Berthold, Jorg / Hachmann, Ulrich / Langen, Dominik / Schreiner, Michael / Eisenreich, Holger / Schluessler, Jens-Uwe / Ellguth, Georg et al. | 2010
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Low power mobile internet devices using LTE technologyAue, Volker et al. | 2010
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A black box method for stability analysis of arbitrary SRAM cell structuresWieckowski, M / Sylvester, D / Blaauw, D / Chandra, V / Idgunji, S / Pietrzyk, C / Aitken, R et al. | 2010
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Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysisQazi, Masood / Tikekar, Mehul / Dolecek, Lara / Shah, Devavrat / Chandrakasan, Anantha et al. | 2010
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Practical Monte-Carlo based timing yield estimation of digital circuitsJaffari, Javid / Anis, Mohab et al. | 2010
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Practical Monte-Carlo Base Timing Yield Estimation of Digital CircuitsJaffari, J. / Anis, M. / Institute of Electrical and Electronics Engineers et al. | 2010
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Statistical static timing analysis using Markov chain Monte CarloKanoria, Yashodhan / Mitra, Subhasish / Montanari, Andrea et al. | 2010
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A reconfigurable cache memory with heterogeneous banksBenitez, Domingo / Moure, Juan C / Rexachs, Dolores / Luque, Emilio et al. | 2010
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Evaluation of runtime task mapping heuristics with rSesame - a case studySigdel, Kamana / Thompson, Mark / Galuzzi, Carlo / Pimentel, Andy D / Bertels, Koen et al. | 2010
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VAPRES: A Virtual Architecture for Partially Reconfigurable Embedded SystemsJara-Berrocal, Abelardo / Gordon-Ross, Ann et al. | 2010
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pSHS: A scalable parallel software implementation of Montgomery multiplication for multicore systemsZhimin Chen, / Schaumont, Patrick et al. | 2010
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BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluationNassar, Maxime / Bhasin, Shivam / Danger, Jean-Luc / Duc, Guillaume / Guilley, Sylvain et al. | 2010
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Detecting/preventing information leakage on the memory bus due to malicious hardwareDas, Abhishek / Memik, Gokhan / Zambreno, Joseph / Choudhary, Alok et al. | 2010
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An embedded platform for privacy-friendly road charging applicationsBalasch, Josep / Verbauwhede, Ingrid / Preneel, Bart et al. | 2010
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Parallel X-fault simulation with critical path tracing techniqueUbar, Raimund / Devadze, Sergei / Raik, Jaan / Jutman, Artur et al. | 2010
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Diagnosis of multiple arbitrary faults with mask and reinforcement effectJing Ye, / Yu Hu, / Xiaowei Li, et al. | 2010
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Skewed pipelining for parallel simulink simulationsCanedo, Arquimedes / Yoshizawa, Takeo / Komatsu, Hideaki et al. | 2010
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An efficient and complete approach for throughput-maximal SDF allocation and scheduling on multi-core platformsBonfietti, Alessio / Benini, Luca / Lombardi, Michele / Milano, Michela et al. | 2010
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A software update service with self-protection capabilitiesNeukirchner, Moritz / Stein, Steffen / Schrom, Harald / Ernst, Rolf et al. | 2010
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Bitstream processing for embedded systems using C++ metaprogrammingKlemm, Reimund / Fettweis, Gerhard et al. | 2010
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Increasing PCM main memory lifetimeFerreira, Alexandre P / Miao Zhou, / Bock, Santiago / Childers, Bruce / Melhem, Rami / Mosse, Daniel et al. | 2010
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Dueling CLOCK: Adaptive cache replacement policy based on the CLOCK algorithmJanapsatya, Andhi / Ignjatovic, Aleksandar / Peddersen, Jorgen / Parameswaran, Sri et al. | 2010
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PANEL SESSION - Who Is Closing the embedded software design gap?Ecker, W. / Bricaud, Pierre / Doemer, Rainer / Veller, Yossi / Heinen, Stefan / Mossinger, Jurgen / von Schwerin, Andreas et al. | 2010
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Accelerating Lightpath setup via broadcasting in binary-tree waveguide in Optical NoCsBinzhang Fu, / Yinhe Han, / Huawei Li, / Xiaowei Li, et al. | 2010
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SimTag: Exploiting tag bits similarity to improve the reliability of the data cachesJesung Kim, / Soontae Kim, / Yebin Lee, et al. | 2010
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The split register fileAbella, J / Carretero, J / Chaparro, P / Vera, X et al. | 2010
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Multithreaded code from synchronous programs: Extracting independent threads for OpenMPBaudisch, Daniel / Brandt, Jens / Schneider, Klaus et al. | 2010
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Approximate logic synthesis for error tolerant applicationsDoochul Shin, / Gupta, Sandeep K et al. | 2010
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Automatic microarchitectural pipeliningGalceran-Oms, Marc / Cortadella, Jordi / Bufistov, Dmitry / Kishinevsky, Mike et al. | 2010
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Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltageRithe, Rahul / Jie Gu, / Wang, Alice / Datla, Satyendra / Gammie, Gordon / Buss, Dennis / Chandrakasan, Anantha et al. | 2010
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Dynamically reconfigurable register file for a softcore VLIW processorWong, Stephan / Anjam, Fakhar / Nadeem, Faisal et al. | 2010
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FPGA-based adaptive computing for correlated multi-stream processingMing Liu, / Zhonghai Lu, / Kuehn, Wolfgang / Jantsch, Axel et al. | 2010
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Far Correlation-based EMA with a precharacterized leakage modelMeynard, Olivier / Guilley, Sylvain / Danger, Jean-Luc / Sauvage, Laurent et al. | 2010
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Improved countermeasure against Address-bit DPA for ECC scalar multiplicationIzumi, Masami / Ikegami, Jun / Sakiyama, Kazuo / Ohta, Kazuo et al. | 2010
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Constrained Power Management: Application to a multimedia mobile platformBellasi, Patrick / Bosisio, Stefano / Carnevali, Matteo / Fornaciari, William / Siorpaes, David et al. | 2010
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Mapping scientific applications on a large-scale data-path accelerator implemented by single-flux quantum (SFQ) circuitsMehdipour, Farhad / Honda, Hiroaki / Kataoka, Hiroshi / Inoue, Koji / Kataeva, Irina / Murakami, Kazuaki / Akaike, Hiroyuki / Fujimaki, Akira et al. | 2010
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MB-LITE: A robust, light-weight soft-core implementation of the MicroBlaze architectureKranenburg, Tamar / van Leuken, Rene et al. | 2010
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Automatic pipelining from transactional datapath specificationsNurvitadhi, Eriko / Hoe, James C / Kam, Timothy / Lu, Shih-Lien L et al. | 2010
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Increasing the power efficiency of PCs by improving the hardware/OS interactionSchlager, Chris et al. | 2010
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Optimize your power and performance yields and regain those sleepless nightsFlautner, Krisztian et al. | 2010
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Digital statistical analysis using VHDLDietrich, Manfred / Eichler, Uwe / Haase, Joachim et al. | 2010
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A resilience roadmapNassif, Sani R / Mehta, Nikil / Yu Cao, et al. | 2010
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Vision for cross-layer optimization to address the dual challenges of energy and reliabilityDeHon, Andre / Quinn, Heather M / Carter, Nicholas P et al. | 2010
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Design techniques for cross-layer resilienceCarter, Nicholas P / Naeimi, Helia / Gardner, Donald S et al. | 2010
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Cross-layer resilience challenges: Metrics and optimizationMitra, Subhasish / Brelsford, Kevin / Sanda, Pia N et al. | 2010
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Pareto efficient design for reconfigurable streaming applications on CPU/FPGAsJun Zhu, / Sander, Ingo / Jantsch, Axel et al. | 2010
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Automated bottleneck-driven design-space exploration of media processing systemsYang Yang, / Geilen, Marc / Basten, Twan / Stuijk, Sander / Corporaal, Henk et al. | 2010
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Using Transaction Level Modeling techniques for wireless sensor network simulationDamm, Markus / Moreno, Javier / Haase, Jan / Grimm, Christoph et al. | 2010
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RTOS-aware refinement for TLM2.0-based HW/SW designsBecker, Markus / Di Guglielmo, Giuseppe / Fummi, Franco / Mueller, Wolfgang / Pravadelli, Graziano / Tao Xie, et al. | 2010
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Power Variance Analysis breaks a masked ASIC implementation of AESYang Li, / Sakiyama, Kazuo / Batina, Lejla / Nakatsu, Daisuke / Ohta, Kazuo et al. | 2010
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Ultra low-power 12-bit SAR ADC for RFID applicationsDe Venuto, Daniela / Stikvoort, Eduard / Castro, David Tio / Ponomarev, Youri et al. | 2010
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A flexible UWB Transmitter for breast cancer detection imaging systemsCutrupi, Massimo / Crepaldi, Marco / Casu, Mario R / Graziano, Mariagrazia et al. | 2010
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A portable multi-pitch e-drum based on printed flexible pressure sensorsChun-Ming Lo, / Tsung-Ching Huang, / Cheng-Yi Chiang, / Hou, Johnson / Kwang-Ting Cheng, et al. | 2010
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Computation of yield-optimized Pareto fronts for analog integrated circuit specificationsMueller-Gritschneder, Daniel / Graeb, Helmut et al. | 2010
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Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexityMaricau, Elie / Gielen, Georges et al. | 2010
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A general mathematical model of probabilistic ripple-carry addersLau, Mark S K / Keck-Voon Ling, / Yun-Chung Chu, / Bhanu, Arun et al. | 2010
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An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search techniqueBo Liu, / Fernandez, Francisco V / Gielen, Georges et al. | 2010
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Reuse-aware modulo scheduling for stream processorsLi Wang, / Jingling Xue, / Xuejun Yang, et al. | 2010
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A special-purpose compiler for look-up table and code generation for function evaluationYuanrui Zhang, / Lanping Deng, / Yedlapalli, Praveen / Muralidhara, Sai Prashanth / Hui Zhao, / Kandemir, Mahmut / Chakrabarti, Chaitali / Pitsianis, Nikos / Xiaobai Sun, et al. | 2010
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General behavioral thermal modeling and characterization for multi-core microprocessor designEguia, Thom J A / Tan, Sheldon X.-D / Ruijing Shen, / Pacheco, Eduardo H / Tirumala, Murli et al. | 2010
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On the construction of guaranteed passive macromodels for high-speed channelsChinea, Alessandro / Grivet-Talocia, Stefano / Deschrijver, Dirk / Dhaene, Tom / Knockaert, Luc et al. | 2010
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Extended Hamiltonian Pencil for passivity assessment and enforcement for S-parameter systemsZuochang Ye, / Silveira, L Miguel / Phillips, Joel R et al. | 2010
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Equivalent circuit modeling of multilayered power/ground planes for fast transient simulationWatanabe, Takayuki / Asai, Hideki et al. | 2010
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Carbon nanotube circuits: Living with imperfections and variationsJie Zhang, / Patil, Nishant / Lin, Albert / Wong, H.-S Philip / Mitra, Subhasish et al. | 2010
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Properties of and improvements to time-domain dynamic thermal analysis algorithmsXi Chen, / Dick, Robert P / Li Shang, et al. | 2010
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Towards assertion-based verification of heterogeneous system designsLammermann, Stefan / Ruf, Jurgen / Kropf, Thomas / Rosenstiel, Wolfgang / Viehl, Alexander / Jesser, Alexander / Hedrich, Lars et al. | 2010
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Automatic generation of software TLM in multiple abstraction layers for efficient HW/SW co-simulationMeng-Huan Wu, / Wen-Chuan Lee, / Chen-Yu Chuang, / Ren-Song Tsay, et al. | 2010
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Modeling constructs and kernel for parallel simulation of accuracy adaptive TLMsSalimi Khaligh, R / Radetzki, M et al. | 2010
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Efficient High-Level modeling in the networking domainZebelein, Christian / Falk, Joachim / Haubelt, Christian / Teich, Jurgen / Dorsch, Rainer et al. | 2010
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UML design for dynamically reconfigurable multiprocessor embedded systemsVidal, Jorgiano / de Lamotte, Florent / Gogniat, Guy / Diguet, Jean-Philippe / Soulard, Philippe et al. | 2010
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Closing the Gap between UML-based Modeling, Simulation and Synthesis of Combined HW/SW SystemsMischkalla, F. / He, D. / Mueller, W. / Institute of Electrical and Electronics Engineers et al. | 2010