Zonotope-based Nonlinear Model Order Reduction for Fast Performance Bound Analysis of Analog Circuits with Multiple-interval-valued Parameter Variations (English)
- New search for: Song, Y.
- New search for: Manoj, S.
- New search for: Yu, H.
- New search for: Institute of Electrical and Electronics Engineers
- New search for: Song, Y.
- New search for: Manoj, S.
- New search for: Yu, H.
- New search for: Institute of Electrical and Electronics Engineers
In:
Design, automation and test in Europe
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45
;
2014
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ISBN:
- Conference paper / Print
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Title:Zonotope-based Nonlinear Model Order Reduction for Fast Performance Bound Analysis of Analog Circuits with Multiple-interval-valued Parameter Variations
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Contributors:Song, Y. ( author ) / Manoj, S. ( author ) / Yu, H. ( author ) / Institute of Electrical and Electronics Engineers
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Conference:Conference, Design, automation and test in Europe ; 2014 ; Dresden, Germany
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Published in:
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Publisher:
- New search for: Curran Associates
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Place of publication:Red Hook
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Publication date:2014-01-01
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Size:45 pages
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Remarks:Includes bibliographical references and index; Current copyright fee: GBP19.38
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ISBN:
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Type of media:Conference paper
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Type of material:Print
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Language:English
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Keywords:
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Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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1.1.1 Keynote: System Design Challenges for Next Generation Wireless and Embedded SystemsFuller, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 2
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1.1.2 Keynote: The Growing Importance of Microelectronics from a Foundary PerspectiveTeepe, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 3
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2.2 Panel: Emerging vs. Established Technologies: A Two Sphinxes' Riddle at the Crossroads?Casale-Rossi, M. / De Micheli, G. / Aitken, R. / Domic, A. / Horstmann, M. / Hum, R. / Magarshack, P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 7
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Emulation-Based Robustness Assessment for Automotive Smart-Power ICsHarrant, M. / Nirmaier, T. / Kirscher, J. / Grimm, C. / Pelz, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 13
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Startup Error Detection and Containment to Improve the Robustness of Hybrid FlexRay NetworksKordes, A. / Vermeulen, B. / Deb, A. / Wahl, M.G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 19
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A Self-Propagating Wakeup Mechanism for Point-to-Point Networks with Partial Network SupportSeyler, J.R. / Streichert, T. / Warkentin, J. / Spagele, M. / Glass, M. / Teich, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 25
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Multi-Variant-based Design Space Exploration for Automotive Embedded SystemsGraf, S. / Glass, M. / Teich, J. / Lauer, C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 31
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SAFE: Security-Aware FlexRay Scheduling EngineHan, G. / Zeng, H. / Li, Y. / Dou, W. / Institute of Electrical and Electronics Engineers et al. | 2014
- 35
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Transient Errors Resiliency Analysis Technique for Automotive Safety Critical ApplicationsPandey, S. / Vermeulen, B. / Institute of Electrical and Electronics Engineers et al. | 2014
- 39
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Electromigration-Aware and IR-Drop Avoidance Routing in Analog Multiport Terminal StructuresMartins, R. / Lourenco, N. / Canelas, A. / Horta, N. / Institute of Electrical and Electronics Engineers et al. | 2014
- 45
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Zonotope-based Nonlinear Model Order Reduction for Fast Performance Bound Analysis of Analog Circuits with Multiple-interval-valued Parameter VariationsSong, Y. / Manoj, S. / Yu, H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 51
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Implementation Issues in the Hierarchical Composition of Performance Models of Analog CircuitsVelasco-Jimenez, M. / Castro-Lopez, R. / Roca, E. / Fernandez, F.V. / Institute of Electrical and Electronics Engineers et al. | 2014
- 57
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Modeling of an Analog Recording System Design for ECoG and AP SignalsHeidmann, N. / Hellwege, N. / Hohlein, T. / Westphal, T. / Peters-Drolshagen, D. / Paul, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 63
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Model Based Hierarchical Optimization Strategies for Analog Design AutomationAfacan, E. / Ay, S. / Fernandez, F.V. / Dundar, G. / Baskaya, F. / Institute of Electrical and Electronics Engineers et al. | 2014
- 67
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A Novel Low Power 11-bit Hybrid ADC Using Flash and Delay Line ArchitecturesLee, H.-C. / Abraham, J.A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 71
-
Semi-Symbolic Analysis of Mixed-Signal Systems Including DiscontinuitiesRadojicic, C. / Grimm, C. / Moreno, J. / Pan, X. / Institute of Electrical and Electronics Engineers et al. | 2014
- 75
-
Novel Circuit Topology Synthesis Method Using Circuit Feature Mining and Symbolic ComparisonFerent, C. / Doboli, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 79
-
An Embedded Offset and Gain Instrument for OpAmp IPsWan, J. / Kerkhoff, H.G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 83
-
Energy-Efficient Scheduling for Memory-Intensive GPGPU WorkloadsSong, S. / Lee, M. / Kim, J. / Seo, W. / Cho, Y. / Ryu, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 89
-
dSVM: Energy-Efficient Distributed Scratchpad Video Memory Architecture for the Next-Generation High Efficiency Video CodingSampaio, F. / Shafique, M. / Zatt, B. / Bampi, S. / Henkel, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 95
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Feasibility Exploration of NVM Based I-Cache through MSHR EnhancementsKomalan, M. / Perez, J.I.G. / Tenllado, C. / Raghavan, P. / Hartmann, M. / Catthoor, F. / Institute of Electrical and Electronics Engineers et al. | 2014
- 101
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EVX: Vector Execution on Low Power EDGE CoresDuric, M. / Palomar, O. / Smith, A. / Unsal, O. / Cristal, A. / Valero, M. / Burger, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 105
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Program Affinity Performance Models for Performance and UtilizationMoore, R.W. / Childers, B.R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 109
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Advanced SIMD: Extending the Reach of Contemporary SIMD ArchitecturesBoettcher, M. / Al-Hashimi, B.M. / Eyole, M. / Gabrielli, G. / Reid, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 113
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A Tightly-coupled Hardware Controller to Improve Scalability and Programmability of Shared-Memory Heterogeneous ClustersBurgio, P. / Danilo, R. / Marongiu, A. / Coussy, P. / Benini, L. / Institute of Electrical and Electronics Engineers et al. | 2014
- 117
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On the Correctness, Optimality and Precision of Static Probabilistic Timing AnalysisAltmeyer, S. / Davis, R.I. / Institute of Electrical and Electronics Engineers et al. | 2014
- 123
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WCET-Centric Dynamic Instruction Cache LockingDing, H. / Liang, Y. / Mitra, T. / Institute of Electrical and Electronics Engineers et al. | 2014
- 129
-
Minimizing Stack Memory for Hard Real-time Applications on Multicore PlatformsDong, C. / Zeng, H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 135
-
Time-predictable Execution of Multithreaded Applications on Multicore SystemsAlhammad, A. / Pellizzoni, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 141
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Comprehensive Analysis of Alpha and Neutron Particle-induced Soft Errors in an Embedded Processor at NanoscalesEbrahimi, M. / Evans, A. / Tahoori, M.B. / Seyyedi, R. / Costenaro, E. / Alexandrescu, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 147
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Bias Temperature Instability Analysis of FinFET Based SRAM CellsKhan, S. / Agbo, I. / Hamdioui, S. / Kukner, H. / Kaczer, B. / Raghavan, P. / Catthoor, F. / Institute of Electrical and Electronics Engineers et al. | 2014
- 153
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SSFB: A Highly-Efficient and Scalable Simulation Reduction Technique for SRAM Yield AnalysisRana, M. / Canal, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 159
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INFORMER: An Integrated Framework for Early-Stage Memory Robustness AnalysisGanapathy, S. / Canal, R. / Alexandrescu, D. / Costenaro, E. / Gonzalez, A. / Rubio, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 163
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Wear-out Analysis of Error Correction Techniques in Phase-change MemoryHoffman, C. / Ramos, L. / Azevedo, R. / Araujo, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 167
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Approximating the Age of RF/Analog Circuits through Re-characterization and Statistical EstimationChang, D. / Ozev, S. / Sinanoglu, O. / Karri, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 171
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Technology Transfer towards Horizon 2020Leupers, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 172
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3.2 Panel: The World Is Going... Analog & Mixed-Signal! What about EDA?Casale-Rossi, M. / Palella, P. / Anton, M. / Galzur, O. / Hum, R. / Kress, R. / Lo, P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 177
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Lightweight Code-based Cryptography: QC-MDPC McEliece Encryption on Reconfigurable Devicesvon Maurich, I. / Guneysu, T. / Institute of Electrical and Electronics Engineers et al. | 2014
- 183
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On the Assumption of Mutual Independence of Jitter Realizations in P-Trng Stochastic ModelsHaddad, P. / Teglia, Y. / Bernard, F. / Fischer, V. / Institute of Electrical and Electronics Engineers et al. | 2014
- 189
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Clock-Modulation Based Watermark for Protection of Embedded ProcessorsKufel, J. / Wilson, P. / Hill, S. / Al-Hashimi, B.M. / Whatmough, P.N. / Myers, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 195
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Sensitivity-based Weighting for Passivity Enforcement of Linear Macromodels in Power Integrity ApplicationsUbolli, A. / Grivet-Talocia, S. / Bandinu, M. / Chinea, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 201
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Efficient Analysis of Variability Impact on Interconnect Lines and Resistor NetworksVillena, J.F. / Silveira, L.M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 207
-
Implicit Index-aware Model Order Reduction for RLC/RC NetworksBanagaaya, N. / Ali, G. / Schilders, W.H.A. / Tischendorf, C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 213
-
P/G TSV Planning for IR-drop Reduction in 3D-ICsWang, S. / Firouzi, F. / Oboril, F. / Tahoori, M.B. / Institute of Electrical and Electronics Engineers et al. | 2014
- 219
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Package Geometric Aware Thermal Analysis by Infrared-Radiation Thermal ImagesChien, J.-H. / Yu, H. / Hsu, R.-S. / Lin, H.-J. / Chang, S.-C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 223
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Cost-Effective Decap Selection for Beyond Die Power IntegrityChen, Y.-E. / Tsai, T.-H. / Chen, S.-H. / Chen, H.-M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 227
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Characterizing Power Delivery Systems with On/Off-Chip Voltage Regulators for Many-Core ProcessorsWang, X. / Xu, J. / Wang, Z. / Chen, K.J. / Wu, X. / Institute of Electrical and Electronics Engineers et al. | 2014
- 231
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Mask-Cost-Aware ECO RoutingChien, H.-A. / Peng, Z.-Y. / Wu, Y.-R. / Wang, T.-H. / Lin, H.-C. / Wu, C.-F. / Wang, T.-C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 235
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Coupling TDM NoC and DRAM Controller for Cost and Performance Optimization of Real-Time SystemsGomony, M.D. / Akesson, B. / Goossens, K. / Institute of Electrical and Electronics Engineers et al. | 2014
- 241
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Bus Designs for Time-Probabilistic Multicore ProcessorsJalle, J. / Kosmidis, L. / Abella, J. / Quinones, E. / Cazorla, F.J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 247
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Programmable Decoder and Shadow Threads: Tolerate Remote Code Injection Exploits with Diversified RedundancyLiu, Z. / Shi, W. / Xu, S. / Lin, Z. / Institute of Electrical and Electronics Engineers et al. | 2014
- 253
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Exploiting Narrow-Width Values for Improving Non-Volatile Cache LifetimeDuan, G. / Wang, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 257
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Partial-SET: Write Speedup of PCM Main MemoryLi, B. / Shan, S. / Hu, Y. / Li, X. / Institute of Electrical and Electronics Engineers et al. | 2014
- 261
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Attack-Resilient Sensor FusionIvanov, R. / Pajic, M. / Lee, I. / Institute of Electrical and Electronics Engineers et al. | 2014
- 267
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Bandwidth-Efficient Controller-Server Co-Design with Stability GuaranteesAminifar, A. / Bini, E. / Eles, P. / Peng, Z. / Institute of Electrical and Electronics Engineers et al. | 2014
- 273
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Fault-tolerant Control Synthesis and Verification of Distributed Embedded SystemsKauer, M. / Soudbakhsh, D. / Goswami, D. / Chakraborty, S. / Annaswamy, A.M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 279
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Garbage Collection for Multi-version Index on Flash MemoryLam, K.-Y. / Wang, J. / Chang, Y.-H. / Hsieh, J.-W. / Huang, P.-C. / Poon, C.K. / Zhu, C.J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 283
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D2Cyber: A Design Automation Tool for Dependable CybercarsMunir, A. / Koushanfar, F. / Institute of Electrical and Electronics Engineers et al. | 2014
- 287
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Contract-Based Design of Control Protocols for Safety-Critical Cyber-Physical SystemsNuzzo, P. / Finn, J.B. / Iannopollo, A. / Alberto, L. / Sangiovanni-Vincentelli / Institute of Electrical and Electronics Engineers et al. | 2014
- 291
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Spatial Pattern Prediction Based Management of Faulty Data CachesKeramidas, G. / Mavropoulos, M. / Karvouniari, A. / Nikolos, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 297
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Combined DVFS and Mapping Exploration for Lifetime and Soft-Error Susceptibility Improvement in MPSoCsDas, A. / Kumar, A. / Veeravalli, B. / Bolchini, C. / Miele, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 303
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DARP: Dynamically Adaptable Resilient Pipeline Design in MicroprocessorsChen, H. / Roy, S. / Chakraborty, K. / Institute of Electrical and Electronics Engineers et al. | 2014
- 309
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A Fault Detection Mechanism in a Data-flow Scheduled Multithreaded ProcessorFu, J. / Yang, Q. / Poss, R. / Jesshope, C.R. / Zhang, C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 313
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Mission Profile Aware IC Design - A Case StudyJerke, G. / Kahng, A.B. / Institute of Electrical and Electronics Engineers et al. | 2014
- 319
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Mission Profile Aware Robustness Assessment of Automotive Power DevicesNirmaier, T. / Burger, A. / Harrant, M. / Viehl, A. / Bringmann, O. / Rosenstiel, W. / Pelz, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 325
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Application of Mission Profiles to Enable Cross-Domain Constraint-Driven DesignKatzschke, C. / Sohn, M.-P. / Olbrich, M. / Bexten, V.M.z. / Tristl, M. / Barke, E. / Institute of Electrical and Electronics Engineers et al. | 2014
- 331
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Monitoring and WCET Analysis in COTS Multi-core-SoC-based Mixed-Criticality SystemsNowotsch, J. / Paulitsch, M. / Henrichsen, A. / Pongratz, W. / Schacht, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Hardware Virtualization Support for Shared Resources in Mixed-Criticality Multicore SystemsSander, O. / Sandmann, T. / Duy, V.V. / Bahr, S. / Bapp, F. / Becker, J. / Michel, H.U. / Kaule, D. / Adam, D. / Lubbers, E. et al. | 2014
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An Efficient Reliable PUF-Based Cryptographic Key Generator in 65nm CMOSBhargava, M. / Mai, K. / Institute of Electrical and Electronics Engineers et al. | 2014
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Increasing the Efficiency of Syndrome Coding for PUFs with Helper Data CompressionHiller, M. / Sigl, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 360
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Key-recovery Attacks on Various RO PUF Constructions via Helper Data ManipulationDelvaux, J. / Verbauwhede, I. / Institute of Electrical and Electronics Engineers et al. | 2014
- 366
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IIR Filters Using Stochastic ArithmeticSaraf, N. / Bazargan, K. / Lilja, D.J. / Riedel, M.D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 372
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Efficient Transient Thermal Simulation of 3D ICs with Liquid-Cooling and Through Silicon ViasFourmigue, A. / Beltrame, G. / Nicolescu, G. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Logic Integrated Optimal Pin-Count Design for Digital Microfluidic BiochipsDinh, T.A. / Yamashita, S. / Ho, T.-Y. / Institute of Electrical and Electronics Engineers et al. | 2014
- 384
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Fast and Accurate Computation Using Stochastic CircuitsAlaghi, A. / Hayes, J.P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 388
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Achieving Efficient Packet-based Memory System by Exploiting Correlation of Memory RequestsLu, T. / Chen, L. / Chen, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 394
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ALLARM: Optimizing Sparse Directories for Thread-Local DataRoy, A. / Jones, T.M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 400
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Introducing Thread Criticality Awareness in Prefetcher Aggressiveness ControlPanda, B. / Balachandran, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 406
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A Multi Banked - Multi Ported - non Blocking Shared L2 Cache for MPSoC PlatformsLoi, I. / Benini, L. / Institute of Electrical and Electronics Engineers et al. | 2014
- 412
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DRAM-based Coherent Caches and How to Take Advantage of the Coherence Protocol to Reduce the Refresh EnergyJaksic, Z. / Canal, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 416
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Reducing Set-Associative L1 Data Cache Energy by Early Load Data Dependence Detection (ELD3)Bardizbanyan, A. / Sjalander, M. / Whalley, D. / Larsson-Edefors, P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 420
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Distributed Cooperative Shared Last-Level Caching in Tiled Multiprocessor System on ChipDamodaran, P.P. / Wallentowitz, S. / Herkersdorf, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 424
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EATBit: Effective Automated Test for Binary Translation with High Code CoverageGuo, H. / Wang, Z. / Wu, C. / He, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 430
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On-Device Objective-C Application Optimization Framework for High-Performance Mobile ProcessorsBournoutian, G. / Orailoglu, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 436
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Code Generation for Embedded Heterogeneous Architectures on AndroidMembarth, R. / Reiche, O. / Hannig, F. / Teich, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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Design of Safety Critical Systems by RefinementIliasov, A. / Alekseyev, A. / Sokolov, D. / Mokhov, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Energy Optimization in Android Applications through Wakelock PlacementAlam, F. / Panda, P.R. / Tripathi, N. / Sharma, N. / Narayan, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Lifetime Holes Aware Register Allocation for Clustered VLIW ProcessorsZhang, X. / Wu, H. / Sun, H. / Xue, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 458
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- 494
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Mapping Mixed-Criticality Applications on Multi-Core ArchitecturesGiannopoulou, G. / Stoimenov, N. / Huang, P. / Thiele, L. / Institute of Electrical and Electronics Engineers et al. | 2014
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Area Minimization Synthesis for Reconfigurable Single-Electron Transistor Arrays with Fabrication ConstraintsChen, Y.-H. / Chen, J.-Y. / Huang, J.-D. / Institute of Electrical and Electronics Engineers et al. | 2014
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Software-based Pauli Tracking in Fault-tolerant Quantum CircuitsPaler, A. / Devitt, S. / Nemoto, K. / Polian, I. / Institute of Electrical and Electronics Engineers et al. | 2014
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Efficient SMT-based ATPG for Interconnect Open DefectsErb, D. / Scheibler, K. / Sauer, M. / Becker, B. / Institute of Electrical and Electronics Engineers et al. | 2014
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Interconnect Test for 3D Stacked Memory-on-LogicTaouil, M. / Masadeh, M. / Hamdioui, S. / Marinissen, E.J. / Institute of Electrical and Electronics Engineers et al. | 2014
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An Effective Approach to Automatic Functional Processor Test Generation for Small-Delay FaultsRiefert, A. / Ciganda, L. / Sauer, M. / Bernardi, P. / Reorda, M.S. / Becker, B. / Institute of Electrical and Electronics Engineers et al. | 2014
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Multi-Site Test Optimization for Multi-Vdd SoCs Using Space- and Time-Division MultiplexingVartziotis, F. / Kavousianos, X. / Chakrabarty, K. / Parekhji, R. / Jain, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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An Efficient Temperature-Gradient Based Burn-In Technique for 3D Stacked ICsAghaee, N. / Peng, Z. / Eles, P. / Institute of Electrical and Electronics Engineers et al. | 2014
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Test and Non-Test Cubes for Diagnostic Test Generation Based on Merging of Test CubesPomeranz, I. / Institute of Electrical and Electronics Engineers et al. | 2014
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New Implementions of Predictive Alternate Analog/RF test with Augmented Model RedundancyAyari, H. / Azais, F. / Bernard, S. / Comte, M. / Kerzerho, V. / Renovell, M. / Institute of Electrical and Electronics Engineers et al. | 2014
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System Integration - The Bridge between More than Moore and More MooreHeinig, A. / Dietrich, M. / Herkersdorf, A. / Miller, F. / Wild, T. / Hahn, K. / Grunewald, A. / Bruck, R. / Krohnert, S. / Reisinger, J. et al. | 2014
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A Landscape of the New Dark Silicon Design RegimeTaylor, M.B. / Institute of Electrical and Electronics Engineers et al. | 2014
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Integrated Microfluidic Power Generation and Cooling for Bright Silicon MPSoCsSabry, M.M. / Sridhar, A. / Atienza, D. / Ruch, P. / Michel, B. / Institute of Electrical and Electronics Engineers et al. | 2014
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Effective Resource Management towards Efficient ComputingStenstrom, P. / Institute of Electrical and Electronics Engineers et al. | 2014
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Modeling Steep Slope Devices: From Circuits to ArchitecturesSwaminathan, K. / Kim, M.S. / Chandramoorthy, N. / Sedighi, B. / Perricone, R. / Sampson, J. / Narayanan, V. / Institute of Electrical and Electronics Engineers et al. | 2014
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Impact of Steep-Slope Transistors on Non-Von Neumann Architectures: CNN Case StudyPalit, I. / Sedighi, B. / Hortvath, A. / Hu, X.S. / Nahas, J. / Niemier, M. / Institute of Electrical and Electronics Engineers et al. | 2014
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Asynchronous Design for New On-Chip Wide Dynamic Range Power ElectronicsShang, D. / Zhang, X. / Xia, F. / Yakovlev, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Real-time Optimization of the Battery Banks Lifetime in Hybrid Residential Electrical SystemsRossi, M. / Toppano, A. / Brunelli, D. / Institute of Electrical and Electronics Engineers et al. | 2014
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Optimal Dimensioning of Active Cell Balancing ArchitecturesNarayanaswamy, S. / Steinhorst, S. / Lukasiewycz, M. / Kauer, M. / Chakraborty, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Optimal Design and Management of a Smart Residential PV and Energy Storage SystemZhu, D. / Wang, Y. / Chang, N. / Pedram, M. / Institute of Electrical and Electronics Engineers et al. | 2014
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Design and Fabrication of a 315 μH Bondwire Micro-Transformer for Ultra-Low Voltage Energy HarvestingMacrelli, E. / Wang, N. / Roy, S. / Hayes, M. / Paganelli, R.P. / Tartagni, M. / Romani, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Providing Regulation Services and Managing Data Center Peak Power BudgetsAksanli, B. / Rosing, T. / Institute of Electrical and Electronics Engineers et al. | 2014
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The Energy Benefit of Level-crossing Sampling Including the Actuator's Energy ConsumptionHensel, B. / Kabitzsch, K. / Institute of Electrical and Electronics Engineers et al. | 2014
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Design and Evaluation of Fine-Grained Power-Gating for Embedded MicroprocessorsKondo, M. / Kobyashi, H. / Sakamoto, R. / Wada, M. / Tsukamoto, J. / Namiki, M. / Wang, W. / Amano, H. / Matsunaga, K. / Kudo, M. et al. | 2014
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SuperRange: Wide Operational Range Power Delivery Design for Both STV and NTV ComputingHe, X. / Yan, G. / Han, Y. / Li, X. / Institute of Electrical and Electronics Engineers et al. | 2014
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Modeling and Analysis of Digital Linear Dropout Regulators with Adaptive Control for High Efficiency under Wide Dynamic Range Digital LoadsGangopadhyay, S. / Lee, Y. / Nasir, S.B. / Raychowdhury, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Using MaxBMC for Pareto-Optimal Circuit InitializationReimer, S. / Sauer, M. / Schubert, T. / Becker, B. / Institute of Electrical and Electronics Engineers et al. | 2014
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Partial Witnesses from Preprocessed Quantified Boolean FormulasSeidl, M. / Konighofer, R. / Institute of Electrical and Electronics Engineers et al. | 2014
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Equivalence Checking for Function Pipelining in Behavioral SynthesisHao, K. / Ray, S. / Xie, F. / Institute of Electrical and Electronics Engineers et al. | 2014
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Towards the Formal Analysis of Microresonators Based Photonic SystemsSiddique, U. / Tahar, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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SKETCHILOG: Sketching Combinational CircuitsBecker, A. / Novo, D. / Ienne, P. / Institute of Electrical and Electronics Engineers et al. | 2014
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Towards Verifying Determinism of SystemC DesignsLe, H.M. / Drechsler, R. / Institute of Electrical and Electronics Engineers et al. | 2014
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Library-Based Scalable Refinement Checking for Contract-Based DesignIannopollo, A. / Nuzzo, P. / Tripakis, S. / Sangiovanni-Vincentelli, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Isochronous Networks by ConstructionBai, Y. / Schneider, K. / Institute of Electrical and Electronics Engineers et al. | 2014
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Tightly-Coupled Hardware Support to Dynamic Parallelism Acceleration in Embedded Shared Memory ClustersBurgio, P. / Tagliavini, G. / Conti, F. / Marongiu, A. / Benini, L. / Institute of Electrical and Electronics Engineers et al. | 2014
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p-OFTL: An Object-based Semantic-aware Parallel Flash Translation LayerWang, W. / Lu, Y. / Shu, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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Using Guided Local Search for Adaptive Resource Reservation in Large-scale Embedded SystemsBraak, T.D.t. / Institute of Electrical and Electronics Engineers et al. | 2014
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Accelerating Graph Computation with Racetrack Memory and Pointer-Assisted Graph RepresentationPark, E. / Yoo, S. / Lee, S. / Li, H. / Institute of Electrical and Electronics Engineers et al. | 2014
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Nostradamus: Low-Cost Hardware-Only Error Detection for Processor CoresNathan, R. / Sorin, D.J. / Institute of Electrical and Electronics Engineers et al. | 2014
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Word-Line Power Supply Selector for Stability Improvement of Embedded SRAMs in High Reliability ApplicationsAlorda, B. / Carmona, C. / Bota, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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A High Performance SEU-Tolerant Latch for Nanoscale CMOS TechnologyHuang, Z. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Low-Cost Radiation Hardened Flip-flopLin, Y. / Zwolinski, M. / Halak, B. / Institute of Electrical and Electronics Engineers et al. | 2014
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PSP-Cache: A Low-Cost Fault-Tolerant Cache Memory ArchitectureFarbeh, H. / Miremadi, S.G. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Hybrid Non-Volatile SRAM Cell with Concurrent SEU Detection and CorrectionJunsangsri, P. / Lombardi, F. / Han, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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The Connected Car and Its Implication to the Automotive Chip RoadmapBolle, M. / Bosch, R. / Institute of Electrical and Electronics Engineers et al. | 2014
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Cross Layer Resiliency in Real WorldChandra, V. / Institute of Electrical and Electronics Engineers et al. | 2014
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Hardware/Software Approach for Code Synchronization in Low-Power Multi-Core Sensor NodesBraojos, R. / Dogan, A. / Beretta, I. / Ansaloni, G. / Atienza, D. / Institute of Electrical and Electronics Engineers et al. | 2014
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Hybrid Memory Architecture for Voltage Scaling in Ultra-Low Power Multi-Core Biomedical ProcessorsBortolotti, D. / Bartolini, A. / Weis, C. / Rossi, D. / Benini, L. / Institute of Electrical and Electronics Engineers et al. | 2014
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Context Aware Power Management for Motion-sensing Body Area Network NodesCasamassima, F. / Farella, E. / Benini, L. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Quality-Scalable and Energy-Efficient Approach for Spectral Analysis of Heart Rate VariabilityKarakonstantis, G. / Sankaranarayanan, A. / Sabry, M.M. / Atienza, D. / Burg, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Battery Aware Stochastic QoS Boosting in Mobile Computing DevicesShen, H. / Chen, Q. / Qiu, Q. / Institute of Electrical and Electronics Engineers et al. | 2014
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Exploiting Expendable Process-Margins in DRAMs for Run-Time Performance OptimizationChandrasekar, K. / Goossens, S. / Weis, C. / Koedam, M. / Akesson, B. / Wehn, N. / Goossens, K. / Institute of Electrical and Electronics Engineers et al. | 2014
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Cache Aging Reduction with Improved Performance Using Dynamically Re-sizable CacheMahmood, H. / Poncino, M. / Macii, E. / Institute of Electrical and Electronics Engineers et al. | 2014
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On GPU Bus Power Reduction with 3D IC TechnologiesLee, Y.-J. / Lim, S.K. / Institute of Electrical and Electronics Engineers et al. | 2014
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Process Variation-Aware Workload Partitioning Algorithms for GPUs Supporting Spatial-MultitaskingAguilera, P. / Lee, J. / Farmahini-Farahani, A. / Morrow, K. / Schulte, M. / Kim, N.S. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Thermal Resilient Integration of Many-core Microprocessors and Main Memory by 2.5D TSI I/OsWu, S.-S. / Wang, K. / Sai Manoj, P.D. / Ho, T.-Y. / Yu, M. / Yu, H. / Institute of Electrical and Electronics Engineers et al. | 2014
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Leveraging On-Chip Networks for Efficient Prediction on Multicore CoherenceHuang, L. / Institute of Electrical and Electronics Engineers et al. | 2014
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An Adaptive Memory Interface Controller for Improving Bandwidth Utilization of Hybrid and Reconfigurable SystemsCastellana, V.G. / Tumeo, A. / Ferrandi, F. / Institute of Electrical and Electronics Engineers et al. | 2014
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Asynchronous Asymmetrical Write Termination (AAWT) for a Low Power STT-MRAMBishnoi, R. / Ebrahimi, M. / Oboril, F. / Tahoori, M.B. / Institute of Electrical and Electronics Engineers et al. | 2014
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Write-Once-Memory-Code Phase Change MemoryLi, J. / Mohanram, K. / Institute of Electrical and Electronics Engineers et al. | 2014
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Improving STT-MRAM Density through Multibit Error CorrectionDel Bel, B. / Kim, J. / Kim, C.H. / Sapatnekar, S.S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Energy Efficient In-Memory AES Encryption Based on Nonvolatile Domain-wall NanowireWang, Y. / Yu, H. / Sylvester, D. / Kong, P. / Institute of Electrical and Electronics Engineers et al. | 2014
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ICE: Inline Calibration for Memristor Crossbar-based Computing EngineLi, B. / Wang, Y. / Chen, Y. / Li, H. / Yang, H. / Institute of Electrical and Electronics Engineers et al. | 2014
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Complementary Resistive Switch Based Stateful Logic Operations Using Material ImplicationYang, Y. / Mathew, J. / Pradhan, D.K. / Ottavi, M. / Pontarelli, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Scalability Bottlenecks Discovery in MPSoC Platforms Using Data Mining on Simulation TracesLagraa, S. / Termier, A. / Petrot, F. / Institute of Electrical and Electronics Engineers et al. | 2014
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Computing a Language-Based Guarantee for Timing Properties of Cyber-Physical SystemsDhruva, N. / Kumar, P. / Giannopoulou, G. / Thiele, L. / Institute of Electrical and Electronics Engineers et al. | 2014
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Resource Optimization for CSDF-modeled Streaming Applications with Latency ConstraintsLiu, D. / Spasic, J. / Zhai, J.T. / Stefanov, T. / Chen, G. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Layered Approach for Testing Timing in the Model-Based ImplementationKim, B. / Hwang, H.I. / Park, T. / Son, S.H. / Lee, I. / Institute of Electrical and Electronics Engineers et al. | 2014
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Model-based Protocol Log Generation for Testing a Telecommunication Test Harness Using CLPBalck, K. / Grinchtein, O. / Pearson, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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Time-Decoupled Parallel SystemC SimulationHenrikWeinstock, J. / Schumacher, C. / Leupers, R. / Ascheid, G. / Tosoratto, L. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Unified Methodology for a Fast Benchmarking of Parallel ArchitectureGuerre, A. / Acquaviva, J.-T. / Lhuillier, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
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Bit-Flipping Scan - A Unified Architecture for Fault Tolerance and Offline TestImhof, M.E. / Wunderlich, H.-J. / Institute of Electrical and Electronics Engineers et al. | 2014
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Testing PUF-Based Secure Key Storage CircuitsCortez, M. / Roelofs, G. / Hamdioui, S. / Di Natale, G. / Institute of Electrical and Electronics Engineers et al. | 2014
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Making it Harder to Unlock an LSIB: Honeytraps and Misdirection in a P1687 NetworkZygmontowicz, A. / Dworak, J. / Crouch, A. / Potter, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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Co-Optimization of Memory BIST Grouping, Test Scheduling, and Logic PlacementKahng, A.B. / Kang, I. / Institute of Electrical and Electronics Engineers et al. | 2014
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Power Modeling and Analysis in Early Design PhasesFischer, B. / Cech, C. / Muhr, H. / Institute of Electrical and Electronics Engineers et al. | 2014
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System-level Design Methodology Enabling Fast Development of Baseband MP-SoC for 4G Small Cell Base StationTang, S. / Zhu, Z. / Su, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
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Virtual Prototype Life Cycle in Automotive ApplicationsThanner, M. / Institute of Electrical and Electronics Engineers et al. | 2014
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Extreme-Scale Computer Architecture: Energy Efficiency from the Ground upTorrellas, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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Voltage Island Management in Near Threshold Manycore Architectures to Mitigate Dark SiliconSilvano, C. / Palermo, G. / Xydis, S. / Stamelakos, I. / Institute of Electrical and Electronics Engineers et al. | 2014
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Resolving the Memory Bottleneck for Single Supply Near-Threshold ComputingGemmeke, T. / Sabry, M.M. / Stuijt, J. / Raghavan, P. / Catthoor, F. / Atienza, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1035
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Efficiency of a Glitch Detector against Electromagnetic Fault InjectionZussa, L. / Dehbaoui, A. / Tobich, K. / Dutertre, J.-M. / Maurine, P. / Guillaume-Sage, L. / Clediere, J. / Tria, A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Analyzing and Eliminating the Causes of Fault Sensitivity AnalysisGhalaty, N.F. / Aysu, A. / Schaumont, P. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Smaller and Faster Variant of RSMYamashita, N. / Minematsu, K. / Okamura, T. / Tsunoo, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Multiple Fault Injection Methodology Based on Cone Partitioning towards RTL Modeling of Laser AttacksPapdimitriou, A. / Hely, D. / Beroulle, V. / Maistri, P. / Leveugle, R. / Institute of Electrical and Electronics Engineers et al. | 2014
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Energy Efficient MIMO Processing: A Case Study of Opportunistic Run-Time ApproximationsNovo, D. / Farahpour, N. / Ienne, P. / Ahmad, U. / Catthoor, F. / Institute of Electrical and Electronics Engineers et al. | 2014
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Energy-Efficient FPGA Implementation for Binomial Option Pricing Using OpenCLMorales, V.M. / Horrein, P.-H. / Baghdadi, A. / Hochapfel, E. / Vaton, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Hardware Implementation of a Reed-Solomon Soft Decoder Based on Information Set DecodingScholl, S. / Wehn, N. / Institute of Electrical and Electronics Engineers et al. | 2014
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Ambient Variation-tolerant and Inter Components Aware Thermal Management for Mobile System on ChipsPaterna, F. / Zanotelli, J. / Rosing, T.S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Energy Efficient Data Flow Transformation for Givens Rotation Based QR DecompositionSharma, N. / Panda, P.R. / Li, M. / Agrawal, P. / Catthoor, F. / Institute of Electrical and Electronics Engineers et al. | 2014
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Mode-Controlled Dataflow Based Modeling & Analysis of a 4G-LTE ReceiverSalunkhe, H. / Moreira, O. / van Berkel, K. / Institute of Electrical and Electronics Engineers et al. | 2014
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An Activity-Sensitive Contention Delay Model for Highly Efficient Deterministic Full-System SimulationsChen, S.-Y. / Chen, C.-H. / Tsay, R.-S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Automatic Specification Granularity Tuning for Design Space ExplorationZhang, J. / Schirner, G. / Institute of Electrical and Electronics Engineers et al. | 2014
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EDT: A Specification Notation for Reactive SystemsVenkatesh, R. / Shrotri, U. / Krishna, G.M. / Agrawal, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Model-Based Actor Multiplexing with Application to Complex Communication ProtocolsZebelein, C. / Haubelt, C. / Falk, J. / Schwarzer, T. / Teich, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Novel Model for System-Level Decision Making with Combined ASP and SMT SolvingBiewer, A. / Gladigau, J. / Haubelt, C. / Institute of Electrical and Electronics Engineers et al. | 2014
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DeSpErate: Speeding-up Design Space Exploration by Using Predictive Simulation SchedulingMariani, G. / Palermo, G. / Zaccaria, V. / Silvano, C. / Institute of Electrical and Electronics Engineers et al. | 2014
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Software Architecture of High Efficiency Video Coding for Many-Core Systems with Power-Efficient Workload BalancingKhan, M.U.K. / Shafique, M. / Henkel, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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GPU-EvR: Run-time Event Based Real-time Scheduling Framework on GPGPU PlatformLee, H. / Faruque, M.A.A. / Institute of Electrical and Electronics Engineers et al. | 2014
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Multi-Objective Distributed Run-time Resource Management for Many-CoresWildermann, S. / Glass, M. / Teich, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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CoMik: A Predictable and Cycle-Accurately Composable Real-Time MicrokernelNelson, A. / Nejad, A.B. / Molnos, A. / Koedam, M. / Goossens, K. / Institute of Electrical and Electronics Engineers et al. | 2014
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Utilization-aware Load Balancing for the Energy Efficient Operation on the big.LITTLE ProcessorKim, M. / Kim, K. / Geraci, J.R. / Hong, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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hevcDTM: Application-Driven Dynamic Thermal Management for High Efficiency Video CodingPalomino, D. / Shafique, M. / Amrouch, H. / Susin, A. / Henkel, J. / Institute of Electrical and Electronics Engineers et al. | 2014
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Improving Efficiency of Extensible Processors by Using Approximate Custom InstructionsKamal, M. / Ghasemazar, A. / Afzali-Kusha, A. / Pedram, M. / Institute of Electrical and Electronics Engineers et al. | 2014
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Efficient Performance Estimation with Very Small Sample Size via Physical Subspace Projection and Maximum A Posteriori EstimationYu, L. / Saxena, S. / Hess, C. / Elfadel, I.M. / Antoniadis, D. / Boning, D. / Institute of Electrical and Electronics Engineers et al. | 2014
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Joint Virtual Probe: Joint Exploration of Multiple Test Items' Spatial Patterns for Efficient Silicon Characterization and Test PredictionZhang, S. / Lin, F. / Hsu, C.-K. / Cheng, K.-T. / Wang, H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1165
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Substituting Transition Faults with Path Delay Faults as a Basic Delay Fault ModelPomeranz, I. / Institute of Electrical and Electronics Engineers et al. | 2014
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Standard Cell Library Tuning for Variability Tolerant DesignsFabrie, S. / Echeverri, J.D. / Vertregt, M. / de Gyvez, J.P. / Institute of Electrical and Electronics Engineers et al. | 2014
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Probabilistic Standard Cell Modeling Considering Non-Gaussian Parameters and CorrelationsLange, A. / Sohrmann, C. / Jancke, R. / Haase, J. / Lorenz, I. / Schlichtmann, U. / Institute of Electrical and Electronics Engineers et al. | 2014
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Ultra-low Power Electronics with Si/Ge Tunnel FETTrivedi, A.R. / Amir, M.F. / Mukhopadhyay, S. / Institute of Electrical and Electronics Engineers et al. | 2014
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Brain-Inspired Computing with Spin Torque DevicesRoy, K. / Sharad, M. / Fan, D. / Yogendra, K. / Institute of Electrical and Electronics Engineers et al. | 2014
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Toward Ultralow-Power Computing at Exteme with Silicon Carbide (SiC) Nanoelectromechanical LogicBhunia, S. / Ranganathan, V. / He, T. / Rajgopal, S. / Yang, R. / Mehregany, M. / Feng, P.X.-L. / Institute of Electrical and Electronics Engineers et al. | 2014
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III-V Semiconductor Nanowires for Future DevicesSchmid, H. / Borg, B.M. / Moselund, K. / Kunungo, P.D. / Signorello, G. / Karg, S. / Mensch, P. / Schmidt, V. / Riel, H. / Institute of Electrical and Electronics Engineers et al. | 2014
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Advanced System on a Chip Design Based on Controllable-Polarity FETsGaillardon, P.-E. / Amaru, L. / Zhang, J. / De Micheli, G. / Institute of Electrical and Electronics Engineers et al. | 2014
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Reconfigurable Silicon Nanowire Devices and Circuits: Opportunities and ChallengesWeber, W.M. / Trommer, J. / Grube, M. / Heinzig, A. / Konig, M. / Mikolajick, T. / Institute of Electrical and Electronics Engineers et al. | 2014
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Advancing CMOS with Carbon ElectronicsKreupl, F. / Institute of Electrical and Electronics Engineers et al. | 2014
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Application Mapping for Express Channel-Based Networks-on-ChipZhu, D. / Chen, L. / Yue, S. / Pedram, M. / Institute of Electrical and Electronics Engineers et al. | 2014
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Parallel Probe Based Dynamic Connection Setup in TDM NoCsLiu, S. / Jantsch, A. / Lu, Z. / Institute of Electrical and Electronics Engineers et al. | 2014
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ElastiStore: An Elastic Buffer Architecture for Network-on-Chip RoutersSeitanidis, I. / Psarras, A. / Dimitrakopoulos, G. / Nicopoulos, C. / Institute of Electrical and Electronics Engineers et al. | 2014
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Dynamic Construction of Circuits for Reactive Traffic in Homogeneous CMPsOrtin, M. / Suarez, D. / Villarroya, M. / Izu, C. / Vinals, V. / Institute of Electrical and Electronics Engineers et al. | 2014
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Improving Hamiltonian-based Routing Methods for On-chip Networks: A Turn Model ApproachBahrebar, P. / Stroobandt, D. / Institute of Electrical and Electronics Engineers et al. | 2014
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Embedded Reconfigurable Logic for ASIC Design Obfuscation against Supply Chain AttacksLiu, B. / Wang, B. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Minimalist Approach to Remote AttestationFrancillon, A. / Nguyen, Q. / Rasmussen, K.B. / Tsudik, G. / Institute of Electrical and Electronics Engineers et al. | 2014
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Multi Resolution Touch Panel with Built-in Fingerprint Sensing SupportKoundinya, P. / Theril, S. / Feng, T. / Prakash, V. / Bao, J. / Shi, W. / Institute of Electrical and Electronics Engineers et al. | 2014
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HEROIC: Homomorphically EncRypted One Instruction ComputerTsoutsos, N.G. / Maniatakos, M. / Institute of Electrical and Electronics Engineers et al. | 2014
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EDA Tools Trust Evaluation through Security Property ProofsJin, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
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Fast STA Prediction-based Gate-level Timing SimulationAhmad, T.B. / Ciesielski, M.J. / Institute of Electrical and Electronics Engineers et al. | 2014
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A Cross-Level Verification Methodology for Digital IPs Augmented with Embedded Timing MonitorsGuarnieri, V. / Petricca, M. / Sassone, A. / Vinco, S. / Bombieri, N. / Fummi, F. / Macii, E. / Poncino, M. / Institute of Electrical and Electronics Engineers et al. | 2014
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Empowering Study of Delay Bound Tightness with Simulated AnnealingZhao, X. / Lu, Z. / Institute of Electrical and Electronics Engineers et al. | 2014
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Analysis and Evaluation of Per-Flow Delay Bound for Multiplexing ModelsLong, Y. / Lu, Z. / Yan, X. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1295
-
Connecting Different Worlds - Technology Abstraction for Reliability-Aware Design and TestSchlichtmann, U. / Kleeberger, V.B. / Abraham, J.A. / Evans, A. / Gimmler-Dumont, C. / Glass, M. / Herkersdorf, A. / Nassif, S.R. / Wehn, N. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1303
-
Rate-Adaptive Tasks: Model, Analysis, and Design IssuesButtazzo, G.C. / Bini, E. / Buttle, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1309
-
Acceptance and Random Generation of Event Sequences under Real Time Calculus ConstraintsBanerjee, K. / Dasgupta, P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1315
-
General and Efficient Response Time Analysis for EDF SchedulingGuan, N. / Yi, W. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1321
-
The Schedulability Region of Two-Level Mixed-Criticality Systems Based on EDF-VDMuller, D. / Masrur, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1327
-
Facilitating Timing Debug by Logic Path CorrespondenceAdler, O. / Arbel, E. / Averbouch, I. / Beer, I. / Grijnevitch, I. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1333
-
Statistical Static Timing Analysis Using a Skew-Normal Canonical Delay ModelVijaykumar, M. / Vasudevan, V. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1339
-
Leakage-Power-Aware Clock Period MinimizationYeh, H.-H. / Huang, S.-H. / Nieh, Y.-T. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1345
-
A Deep Learning Methodology to Proliferate Golden Signoff TimingHan, S.-S. / Kahng, A.B. / Nath, S. / Vydyanathan, A.S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1351
-
Aging-aware Standard Cell Library DesignKiamehr, S. / Firouzi, F. / Ebrahimi, M. / Tahoori, M.B. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1355
-
Pass-XNOR Logic: A New Logic Style for P-N Junction Based Graphene CircuitsTenace, V. / Calimera, A. / Macii, E. / Poncino, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1359
-
Mixed Allocation of Adjustable Delay Buffers Combined with Buffer Sizing in Clock Tree Synthesis of Multiple Power Mode DesignsPark, K. / Kim, G. / Kim, T. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1363
-
Memcomputing: The Cape of Good HopeShi, Y. / Chen, H.-M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1366
-
MSim: A General Cycle Accurate Simulation Platform for Memcomputing StudiesZhang, C. / Deng, P. / Geng, H. / Liu, J. / Zhu, Q. / Xiong, J. / Shi, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1371
-
Energy-Efficient Hardware Acceleration through Computing in the MemoryPaul, S. / Karam, R. / Bhunia, S. / Puri, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1377
-
Exploring the Limits of Phase Change MemoriesWuttig, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1379
-
Magnetic Memories: From DRAM Replacement to Ultra Low Power Logic ChipsPrenat, G. / Di Pendina, G. / Layer, C. / Goncalves, O. / Jaber, K. / Dieny, B. / Sousa, R. / Prejbeanu, I.L. / Nozieres, J.P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1380
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Resistive Memories: Which Applications?Clermidy, F. / Jovanovic, N. / Onkaraiah, S. / Oucheikh, H. / Thomas, O. / Turkyilmaz, O. / Vianello, E. / Portal, J.-M. / Bocquet, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1386
-
Thinfilm Printed Ferro-Electric Memories and Integrated ProductsKarlsson, C. / Fischer, P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1387
-
An Adaptive Transmitting Power Technique for Energy Efficient mm-Wave Wireless NoCsMineo, A. / Palesi, M. / Ascia, G. / Catania, V. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1393
-
Performance Evaluation of Wireless NoCs in Presence of Irregular Network Routing StrategiesWettin, P. / Murray, J. / Kim, R. / Yu, X. / Pande, P.P. / Heo, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1399
-
Low-Latency Wireless 3D NoCs via Randomized Shortcut ChipsMatsutani, H. / Koibuchi, M. / Fujiwara, I. / Kagami, T. / Take, Y. / Kuroda, T. / Bogdan, P. / Marculescu, R. / Amano, H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1405
-
Hybrid Wire-Surface Wave Architecture for One-to-Many Communication in Network-on-ChipKarkar, A. / Dahir, N. / Al-Dujaily, R. / Tong, K. / Mak, T. / Yakovlev, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1409
-
Failure Analysis of a Network-on-Chip for Real-Time Mixed-Critical SystemsRambo, E.A. / Tschiene, A. / Diemer, J. / Ahrendts, L. / Ernst, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1413
-
Global Fan Speed Control Considering Non-Ideal Temperature Measurements in Enterprise ServersKim, J. / Sabry, M.M. / Atienza, D. / Vaidyanathan, K. / Gross, K. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1419
-
Unveiling Eurora - Thermal and Power Characterization of the Most Energy-Efficient Supercomputer in the WorldBartolini, A. / Cacciari, M. / Cavazzoni, C. / Tecchiolli, G. / Benini, L. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1425
-
Contention Aware Frequency Scaling on CMPs with Guaranteed Quality of ServiceShen, H. / Qiu, Q. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1431
-
Concurrent Placement, Capacity Provisioning, and Request Flow Control for a Distributed Cloud InfrastructureChen, S. / Wang, Y. / Pedram, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1437
-
COOLIP: Simple yet Effective Job Allocation for Distributed Thermally-Throttled ProcessorsKumar, P. / Yang, H. / Bacivarov, I. / Thiele, L. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1441
-
Energy Optimization in 3D MPSoCs with Wide-I/O DRAM Using Temperature Variation Aware Bank-wise RefreshSadri, M. / Jung, M. / Weis, C. / Wehn, N. / Benini, L. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1445
-
Automatic Detection of Concurrency Bugs through Event Ordering ConstraintsMurillo, L.G. / Wawroschek, S. / Castrillon, J. / Leupers, R. / Ascheid, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1451
-
Hardware-Based Fast Exploration of Cache Hierarchies in Application Specific MPSoCsNawinne, I. / Schneider, J. / Javaid, H. / Parameswaran, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1457
-
SSDExplorer: A Virtual Platform for Fine-Grained Design Space Exploration of Solid State DrivesZuolo, L. / Zambelli, C. / Micheloni, R. / Galfano, S. / Indaco, M. / Di Carlo, S. / Prinetto, P. / Olivo, P. / Bertozzi, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1463
-
Efficient Simulation and Modelling of Non-rectangular NoC TopologiesQi, J. / Zwolinski, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1467
-
Moving from Co-Simulation to Simulation for Effective Smart Systems DesignFummi, F. / Lora, M. / Stefanni, F. / Trachanis, D. / Vanhese, J. / Vinco, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1471
-
May-Happen-in-Parallel Analysis Based on Segment Graphs for Safe ESL ModelsChen, W. / Han, X. / Domer, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1477
-
Timing Analysis of First-Come First-Served Scheduled Interval-Timed Directed Acyclic GraphsFrijns, R.M.W. / Adyanthaya, S. / Stuijk, S. / Voeten, J.P.M. / Geilen, M.C.W. / Schiffelers, R.R.H. / Corporaal, H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1483
-
A Dynamic Computation Method for Fast and Accurate Performance Evaluation of Multi-core ArchitecturesLe Nours, S. / Postula, A. / Bergmann, N.W. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1489
-
Cross-correlation of Specification and RTL for Soft IP AnalysisSingh, B. / Shankar, A. / Wolff, F. / Papachristou, C. / Weyer, D. / Clay, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1495
-
Thermal-Aware Frequency Scaling for Adaptive Workloads on Heterogeneous MPSoCsYu, H. / Syed, R. / Ha, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1501
-
Partitioned Mixed-Criticality Scheduling on Multiprocessor PlatformsGu, C. / Guan, N. / Deng, Q. / Yi, W. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1507
-
Generation of Communication Schedules for Multi-Mode Distributed Real-Time ApplicationsAzim, A. / Carvajal, G. / Pellizzoni, R. / Fischmeister, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1513
-
Provably Minimal Energy Using Coordinated DVS and Power GatingConos, N.A. / Meguerdichian, S. / Dabiri, F. / Potkonjak, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1519
-
A Tree Arbiter Cell for High Speed Resource Sharing in Asynchronous EnvironmentsNaqvi, S.R. / Steininger, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1525
-
An Efficient Manipulation Package for Biconditional Binary Decision DiagramsAmaru, L. / Gaillardon, P.-E. / De Micheli, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1531
-
Synthesis Algorithm of Parallel Index Generation UnitsMatsunaga, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1537
-
Automating Data Reuse in High-Level SynthesisMeeus, W. / Stroobandt, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1541
-
A Universal Symmetry Detection AlgorithmMaurer, P.M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1545
-
Optimization of Design Complexity in Time-Multiplexed Constant MultiplicationsAksoy, L. / Flores, P. / Monteiro, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1549
-
Hardware Primitives for the Synthesis of Multithreaded Elastic SystemsDimitrakopoulos, G. / Seitanidis, I. / Psarras, A. / Tsiouris, K. / Mattheakis, P. / Cortadella, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1553
-
Special Day Keynote: Organic Electronics - From Lab to MarketsLeo, K. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1554
-
Spintronics for Low-Power ComputingZhang, Y. / Zhao, W. / Klein, J.-O. / Kang, W. / Querlioz, D. / Ravelosona, D. / Chappert, C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1560
-
CHAMELEON: CHANNEL Efficient Optical Network-on-ChipLe Beux, S. / Li, H. / O Connor, I. / Cheshmi, K. / Liu, X. / Trajkovic, J. / Nicolescu, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1566
-
Low-Voltage Organic Transistors for Flexible ElectronicsZschieschang, U. / Rodel, R. / Kraft, U. / Takimiya, K. / Zaki, T. / Letzkus, F. / Butschke, J. / Richter, H. / Burghartz, J.N. / Xiong, W. et al. | 2014
- 1572
-
Brisk and Limited-Impact NoC Routing ReconfigurationLee, D. / Parikh, R. / Bertacco, V. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1578
-
Thermal Management of Manycore Systems with Silicon-Photonic NetworksZhang, T. / Abellan, J.L. / Joshi, A. / Coskun, A.K. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1584
-
Assessing the Energy Break-Even Point between an Optical NoC Architecture and an Aggressive Electronic BaselineRamini, L. / Grani, P. / Fankem, H.T. / Ghiribaldi, A. / Bartolini, S. / Bertozzi, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1590
-
DCM: An IP for the Autonomous Control of Optical and Electrical Reconfigurable NoCsButer, W. / Osewold, C. / Gregorek, D. / Garcia-Ortiz, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1594
-
Minimally Buffered Single-Cycle Deflection RouterJonna, G.R. / Jose, J. / Radhakrishnan, R. / Mutyam, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1598
-
The Metamodeling Approach to System Level SynthesisEcker, W. / Velten, M. / Zafari, L. / Goyal, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1600
-
Logic Synthesis of Low-power ICs with Ultra-wide Voltage and Frequency ScalingPu, Y. / Echeverri, J. / Meijer, M. / de Gyvez, J.P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1602
-
Formal Verification of Taint-propagation Security Properties in a Commercial SoC DesignSubramanyan, P. / Arora, D. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1604
-
Early Design Stage Thermal Evaluation and Mitigation: The Locomotiv Architectural CaseSassolas, T. / Sandionigi, C. / Guerre, A. / Aminot, A. / Vivet, P. / Boussetta, H. / Ferro, L. / Peltier, N. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1606
-
Multi-Disciplinary Integrated Design Automation Tool for Automotive Cyber-Physical SystemsCanedo, A. / Faruque, M.A.A. / Richter, J.H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1608
-
Predictive Parallel Event-driven HDL Simulation with A New Powerful Prediction StrategyYang, S. / Han, J. / Kwak, D. / Kim, N. / Cha, D. / Park, J. / Kim, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1611
-
ArChiVED: Architectural Checking via Event Digests for High Performance ValidationHsu, C.-H. / Chatterjee, D. / Morad, R. / Gal, R. / Bertacco, V. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1617
-
Coverage Evaluation of Post-silicon Validation Tests with Virtual PrototypesCong, K. / Lei, L. / Yang, Z. / Xie, F. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1623
-
Effective Post-Silicon Failure Localization Using Dynamic Program SlicingFriedler, O. / Kadry, W. / Morgenshtein, A. / Nahir, A. / Sokhin, V. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1629
-
Design-for-Debug Routing for FIB ProbingLee, C.-Y. / Li, T.-H. / Chen, T.-C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1633
-
Functional Test Generation Guided by Steady-State Probabilities of Abstract DesignWang, J. / Li, H. / Lv, T. / Wang, T. / Li, X. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1637
-
Automated System Testing Using Dynamic and Resource Restricted ClientsCaspar, M. / Lippmann, M. / Hardt, W. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1641
-
Scenario-aware Data Placement and Memory Area Allocation for Multi-Processor System-on-Chips with Reconfigurable 3D-stacked SRAMsTsai, M.-L. / Chen, Y.-J. / Chen, Y.-T. / Chang, R.-H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1647
-
Optimized Buffer Allocation in Multicore PlatformsOdendahl, M. / Goens, A. / Leupers, R. / Ascheid, G. / Ries, B. / Vocking, B. / Henriksson, T. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1653
-
Memory-Constrained Static Rate-Optimal Scheduling of Synchronous Dataflow Graphs via RetimingZhu, X.-Y. / Geilen, M. / Basten, T. / Stuijk, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1659
-
A Constraint-Based Design Space Exploration Framework for Real-Time Applications on MPSoCsRosvall, K. / Sander, I. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1665
-
Reliability-Aware Mapping Optimization of Multi-Core Systems with Mixed-CriticalityKang, S.-H. / Yang, H. / Kim, S. / Becivarov, I. / Ha, S. / Thiele, L. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1669
-
From Simulink to NoC-based MPSoC on FPGARobino, F. / Oberg, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1673
-
Minimal Sparse Observability of Complex Networks: Application to MPSoC Sensor Placement and Run-time Thermal Estimation & TrackingSarma, S. / Dutt, N. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1679
-
mDTM: Multi-Objective Dynamic Thermal Management for On-Chip SystemsKhdr, H. / Ebi, T. / Shafique, M. / Amrouch, H. / Henkel, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1685
-
Thermal Management of Batteries Using a Hybrid Supercapacitor ArchitectureShin, D. / Poncino, M. / Macii, E. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1691
-
Thermal Analysis and Model Identification Techniques for a Logic + WIDEIO Stacked DRAM Test ChipBeneventi, F. / Bartolini, A. / Vivet, P. / Dutoit, D. / Benini, L. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1695
-
Adaptive Power Allocation for Many-core Systems Inspired from Multiagent Auction ModelWang, X. / Zhao, B. / Mak, T. / Yang, M. / Jiang, Y. / Daneshtalab, M. / Palesi, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1699
-
Unified, Ultra Compact, Quadratic Power Proxies for Multi-Core ProcessorsYasin, M. / Shahrour, A. / Elfadel, I.M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1703
-
Exploiting STT-NV Technology for Reconfigurable, High Performance, Low Power, and Low Temperature Functional Unit DesignAshammagari, A.R. / Mahmoodi, H. / Homayoun, H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1709
-
A Power-Efficient Reconfigurable Architecture Using PCM Configuration TechnologyAhari, A. / Asadi, H. / Khaleghi, B. / Tahoori, M.B. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1715
-
Extending Lifetime of Battery-Powered Coarse-Grained Reconfigurable Computing PlatformsYin, S. / Ouyang, P. / Liu, L. / Wei, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1721
-
3D FPGA Using High-density Interconnect Monolithic IntegrationTurkyilmaz, O. / Cibrario, G. / Rozeau, O. / Batude, P. / Clermidy, F. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1725
-
Joint Communication Scheduling and Interconnect Synthesis for FPGA-based Many-Core SystemsCilardo, A. / Fusella, E. / Gallo, L. / Mazzeo, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1729
-
A Novel Embedded System for Vision TrackingNikitakis, A. / Paganos, T. / Papaefstathiou, I. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1733
-
GPGPUs: How to Combine High Computational Power with High ReliabilityGomez, L.B. / Cappello, F. / Carro, L. / DeBardeleben, N. / Fang, B. / Gurumurthi, S. / Pattabiraman, K. / Rech, P. / Reorda, M.S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1742
-
Integrated Circuits Processing Chemical Information: Prospects and ChallengesRichter, A. / Voigt, A. / Schuffny, R. / Henker, S. / Volp, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1743
-
Interfacing to Living CellsLauwereins, R. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1746
-
Video Analytics Using Beyond CMOS DevicesNarayanan, V. / Datta, S. / Cauwenberghs, G. / Chiarulli, D. / Levitan, S. / Wong, P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1751
-
Energy Efficient Neural Networks for Big Data AnalyticsWang, Y. / Li, B. / Luo, R. / Chen, Y. / Xu, N. / Yang, H. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1753
-
Special Session: How Secure are PUFs Really? On the Reach and Limits of Recent PUF AttacksRuhrmair, U. / Schlichtmann, U. / Burleson, W. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1757
-
PUFs at a GlanceRuhrmair, U. / Holcomb, D.E. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1763
-
PUF Modeling Attacks: An Introduction and OverviewRuhrmair, U. / Solter, J. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1769
-
Hybrid Side-Channel / Machine-Learning Attacks on PUFs: A New Threat?Xu, X. / Burleson, W. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1775
-
Physical Vulnerabilities of Physically Unclonable FunctionsHelfmeier, C. / Boit, C. / Nedospasov, D. / Tajik, S. / Seifert, J.-P. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1779
-
Protocol Attacks on Advanced PUF Protocols and Countermeasuresvan Dijk, M. / Ruhrmair, U. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1785
-
Quo Vadis, PUF? Trends and Challenges of Emerging Physical-Disorder Based SecurityRostami, M. / Wendt, J.B. / Potkonjak, M. / Koushanfar, F. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1791
-
Flexible and Scalable Implementation of H.264/AVC Encoder for Multiple Resolutions Using ASIPsDoan, H.C. / Javaid, H. / Parameswaran, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1797
-
A Flexible ASIP Architecture for Connected Components Labeling in Embedded Vision ApplicationsEusse, J.F. / Leupers, R. / Ascheid, G. / Sudowe, P. / Leibe, B. / Sadasue, T. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1803
-
Image Progressive Acquisition for Hardware SystemsLiu, J. / Bouganis, C. / Cheung, P.Y.K. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1809
-
High-Quality Real-Time Hardware Stereo Matching Based on Guided Image FilteringTtofis, C. / Theocharides, T. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1815
-
Optimization of Standard Cell Based Detailed Placement for 16 nm FinFET ProcessDu, Y. / Wong, M.D.F. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1821
-
Signature Indexing of Design Layouts for Hotspot DetectionAndrades, C. / Rodriguez, M.A. / Chiang, C.C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1827
-
Metal Layer Planning for Silicon Interposers with Consideration of Routability and Manufacturing CostLiu, W.-H. / Chien, T.-K. / Wang, T.-C. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1833
-
Non-Intrusive Integration of Advanced Diagnosis Features in Automotive E/E-ArchitecturesAbelein, U. / Cook, A. / Engelke, P. / Glass, M. / Reimann, F. / Gomez, L.R. / Russ, T. / Teich, J. / Ull, D. / Wunderlich, H.-J. et al. | 2014
- 1839
-
ABACUS: A Technique for Automated Behavioral Synthesis of Approximate Computing CircuitsNepal, K. / Li, Y. / Bahar, R.I. / Reda, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1845
-
Automatic Generation of Custom SIMD Instructions for Superword Level ParallelismKim, T. / Hoskote, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1851
-
System-level Scheduling of Real-time Streaming Applications Using a Semi-partitioned ApproachCannella, E. / Bamakhrama, M.A. / Stefanov, T. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1857
-
ASLAN: Synthesis of Approximate Sequential CircuitsRanjan, A. / Raha, A. / Venkataramani, S. / Roy, K. / Raghunathan, A. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1863
-
VRCon: Dynamic Reconfiguration of Voltage Regulators in a Multicore PlatformLee, W. / Wang, Y. / Pedram, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1869
-
Coarse-grained Bubble Razor to Exploit the Potential of Two-Phase Transparent Latch DesignsKim, H. / Kim, D. / Kim, J.-J. / Yoo, S. / Lee, S. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1875
-
FEPMA: Fine-Grained Event-Driven Power Meter for Android Smartphones Based on Device Driver Layer Event MonitoringKim, K. / Shin, D. / Xie, Q. / Wang, Y. / Pedram, M. / Chang, N. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1881
-
An Analog Non-Volatile Neural Network Platform for Prototyping RF BIST SolutionsMaliuk, D. / Makris, Y. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1887
-
Built-In Self-Test and Characterization of Polar Transmitter Parameters in the Loop-Back ModeJeong, J.W. / Ozev, S. / Sen, S. / Natarajan, V. / Slamani, M. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1893
-
A Flexible BIST Strategy for SDR TransmittersDogaru, E. / dos Santos, F.V. / Rebernak, W. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1899
-
Sigma-Delta Testability for Pipeline A/D ConvertersGines, A. / Leger, G. / Institute of Electrical and Electronics Engineers et al. | 2014
- 1905
-
Future SoC Verification Methodology: UVM Evolution or Revolution?Drechsler, R. / Chevallaz, C. / Fummi, F. / Hu, A.J. / Morad, R. / Schirrmeister, F. / Goryachev, A. / Institute of Electrical and Electronics Engineers et al. | 2014