Analysis and Architecture Design of Variable Block-Size Motion Estimation for H.264/AVC (English)
- New search for: Chen, C.-Y.
- New search for: Chien, S.-Y.
- New search for: Huang, Y.-W.
- New search for: Chen, T.-C.
- New search for: Wang, T.-C.
- New search for: Chen, L.-G.
- New search for: Chen, C.-Y.
- New search for: Chien, S.-Y.
- New search for: Huang, Y.-W.
- New search for: Chen, T.-C.
- New search for: Wang, T.-C.
- New search for: Chen, L.-G.
In:
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS PART 1 REGULAR PAPERS
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53
, 3
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578-593
;
2006
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ISSN:
- Article (Journal) / Print
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Title:Analysis and Architecture Design of Variable Block-Size Motion Estimation for H.264/AVC
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Contributors:Chen, C.-Y. ( author ) / Chien, S.-Y. ( author ) / Huang, Y.-W. ( author ) / Chen, T.-C. ( author ) / Wang, T.-C. ( author ) / Chen, L.-G. ( author )
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Published in:IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS PART 1 REGULAR PAPERS ; 53, 3 ; 578-593
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Publisher:
- New search for: IEEE
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Publication date:2006-01-01
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Size:16 pages
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ISSN:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
- New search for: 621.3815
- Further information on Dewey Decimal Classification
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Classification:
DDC: 621.3815 -
Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents – Volume 53, Issue 3
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 481
-
A varactor configuration minimizing the amplitude-to-phase noise conversion in VCOsBonfanti, A. / Levantino, S. / Samori, C. / Lacaita, A.L. et al. | 2006
- 481
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Analog Circuits and Systems - A Varactor Configuration Minimizing the Amplitude-to-Phase Noise Conversion in VCOsBonfanti, A. et al. | 2006
- 489
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Analytical synthesis of high-order single-ended-input OTA-grounded C all-pass and band-reject filter structuresChun-Ming Chang, / Chun-Li Hou, / Wen-Yaw Chung, / Jiun-Wei Horng, / Chu-Kuei Tu, et al. | 2006
- 489
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Analog Circuits and Systems - Analytical Synthesis of High-Order Single-Ended-Input OTA-Grounded C All-Pass and Band-Reject Filter StructuresChang, C.-M. et al. | 2006
- 499
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Frequency-dependent harmonic-distortion analysis of a linearized cross-coupled CMOS OTA and its application to OTA-C filtersJianlong Chen, / Sanchez-Sinencio, E. / Silva-Martinez, J. et al. | 2006
- 499
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Analog Circuits and Systems - Frequency-Dependent Harmonic-Distortion Analysis of a Linearized Cross-Coupled CMOS OTA and its Application to OTA-C FiltersChen, J. et al. | 2006
- 511
-
Digital background calibration for memory effects in pipelined analog-to-digital convertersKeane, J.P. / Hurst, P.J. / Lewis, S.H. et al. | 2006
- 511
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Analog Circuits and Systems - Digital Background Calibration for Memory Effects in Pipelined Analog-to-Digital ConvertersKeane, J.P. et al. | 2006
- 526
-
Analog Circuits and Systems - A Spur-Reduction Technique for a 5-GHz Frequency SynthesizerKuo, C.-Y. et al. | 2006
- 526
-
A spur-reduction technique for a 5-GHz frequency synthesizerChun-Yi Kuo, / Jung-Yu Chang, / Shen-Iuan Liu, et al. | 2006
- 534
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Yield enhancement with optimal area allocation for ratio-critical analog circuitsYu Lin, / Degang Chen, / Geiger, R. et al. | 2006
- 534
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Analog Circuits and Systems - Yield Enhancement With Optimal Area Allocation for Ratio-Critical Analog CircuitsLin, Y. et al. | 2006
- 554
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A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise and high phase accuracyMazzanti, A. / Svelto, F. et al. | 2006
- 554
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Analog Circuits and Systems - A 1.8-GHz Injection-Locked Quadrature CMOS VCO With Low Phase Noise and High Phase AccuracyMazzanti, A. et al. | 2006
- 561
-
A Matrix Amplifier in 0.18-mum SOI CMOSPark, J. / Allstot, D. J. et al. | 2006
- 561
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Analog Circuits and Systems - A Matrix Amplifier in 0.18-mm SOI CMOSPark, J. et al. | 2006
- 561
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A matrix amplifier in 0.18-/spl mu/m SOI CMOSJinho Park, / Allstot, D.J. et al. | 2006
- 569
-
Receiver channel with resonance-based timing detection for a laser range finderPehkonen, J. / Palojarvi, P. / Kostamovaara, J. et al. | 2006
- 569
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Analog Circuits and Systems - Receiver Channel With Resonance-Based Timing Detection for a Laser Range FinderPehkonen, J. et al. | 2006
- 578
-
Digital Circuits and Systems - Analysis and Architecture Design of Variable Block-Size Motion Estimation for H.264-AVCChen, C.-Y. et al. | 2006
- 578
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Analysis and architecture design of variable block-size motion estimation for H.264/AVCChing-Yeh Chen, / Shao-Yi Chien, / Yu-Wen Huang, / Tung-Chien Chen, / Tu-Chih Wang, / Liang-Gee Chen, et al. | 2006
- 594
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The application of complex quantized feedback in integrated wireless receiversEbadi, Z.S. / Mirabbasi, S. / Saleh, R. et al. | 2006
- 594
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Digital Circuits and Systems - The Application of Complex Quantized Feedback in Integrated Wireless ReceiversEbadi, Z.S. et al. | 2006
- 604
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Digital Circuits and Systems - A Two-Stage Angle-Rotation Architecture and Its Error Analysis for Efficient Digital Mixer ImplementationFu, D. et al. | 2006
- 604
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A two-stage angle-rotation architecture and its error analysis for efficient digital mixer implementationDengwei Fu, / Willson, A.N. et al. | 2006
- 615
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Memory-free low-cost designs of advanced encryption standard using common subexpression elimination for subfunctions in transformationsShen-Fu Hsiao, / Ming-Chih Chen, / Chia-Shin Tu, et al. | 2006
- 615
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Digital Circuits and Systems - Memory-Free Low-Cost Designs of Advanced Encryption Standard Using Common Subexpression Elimination for Subfunctions in TransformationsHsiao, S.-F. et al. | 2006
- 627
-
Digital Circuits and Systems - Three Hardware Architectures for the Binary Modular Exponentiation: Sequential, Parallel, and SystolicNedjah, N. et al. | 2006
- 627
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Three hardware architectures for the binary modular exponentiation: sequential, parallel, and systolicNedjah, N. / Mourelle, Ld.M. et al. | 2006
- 634
-
An enhanced first-order sigma-delta modulator with a controllable signal-to-noise ratioAl-Alaoui, M.A. / Ferzli, R. et al. | 2006
- 634
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Theory and Systems - An Enhanced First-Order Sigma-Delta Modulator With a Controllable Signal-to-Noise RatioAl-Alaoui, M.A. et al. | 2006
- 644
-
Global asymptotic stability of a class of neural networks with distributed delaysWu-Hua Chen, / Wei Xing Zheng, et al. | 2006
- 644
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Theory and Systems - Global Asymptotic Stability of a Class of Neural Networks With Distributed DelaysChen, W.-H. et al. | 2006
- 653
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Hybrid filtered error LMS algorithm: another alternative to filtered-x LMSDeBrunner, V.E. / Dayong Zhou, et al. | 2006
- 653
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Theory and Systems - Hybrid Filtered Error LMS Algorithm: Another Alternative to Filtered-x LMSDeBrunner, V.E. et al. | 2006
- 662
-
Theory and Systems - Frequency-Domain Characterization of Sliding Mode Control of an Inverter Used in DSTATCOM ApplicationGupta, R. et al. | 2006
- 662
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Frequency-domain characterization of sliding mode control of an inverter used in DSTATCOM applicationGupta, R. / Ghosh, A. et al. | 2006
- 677
-
Analysis of class D inverter with irregular driving patternsKoizumi, H. / Kurokawa, K. / Mori, S. et al. | 2006
- 677
-
Theory and Systems - Analysis of Class D Inverter With Irregular Driving PatternsKoizumi, H. et al. | 2006
- 688
-
Theory and Systems - Multilayer Hybrid Fuzzy Neural Networks: Synthesis via Technologies of Advanced Computational IntelligenceOh, S.-K. et al. | 2006
- 688
-
Multilayer hybrid fuzzy neural networks: synthesis via technologies of advanced computational intelligenceSung-Kwun Oh, / Pedrycz, W. / Byoung-Jun Park, et al. | 2006
- 704
-
Theory and Systems - Loss-Free Complex Impedance Network ElementsShmilovitz, D. et al. | 2006
- 704
-
Loss-free complex impedance network elementsShmilovitz, D. et al. | 2006
- 712
-
Generalized correlation-delay-shift-keying scheme for noncoherent chaos-based communication systemsTam, W.M. / Lau, F.C.M. / Tse, C.K. et al. | 2006
- 712
-
Theory and Systems - Generalized Correlation-Delay-Shift-Keying Scheme for Noncoherent Chaos-Based Communication SystemsTam, W.M. et al. | 2006
- 722
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Theory and Systems - Minimum Description Length Criterion for Modeling of Chaotic Attractors With Multilayer Perceptron NetworksYi, Z. et al. | 2006
- 722
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Minimum description length criterion for modeling of chaotic attractors with multilayer perceptron networksZhao Yi, / Small, M. et al. | 2006
- 733
-
Theory and Systems - Synchronization in General Complex Delayed Dynamical NetworksZhou, J. et al. | 2006
- 733
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Synchronization in general complex delayed dynamical networksJin Zhou, / Tianping Chen, et al. | 2006
- 745
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Theory and Systems - Adaptive Nonlinear PCA Algorithms for Blind Source Separation Without PrewhiteningZhu, X.-L. et al. | 2006
- 745
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Adaptive nonlinear PCA algorithms for blind source separation without prewhiteningXiao-Long Zhu, / Xian-Da Zhang, / Zi-Zhe Ding, / Ying Jia, et al. | 2006
- 754
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COMMENTS AND CORRECTIONS - Corrections to "LMI Approach for Global Periodicity of Neural Networks With Time-Varying Delays"Rong, L. et al. | 2006
- 754
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Corrections to “LMI Approach for Global Periodicity of Neural Networks With Time-Varying Delays”Rong, L. et al. | 2006
- 755
-
CALLS FOR PAPERS - Special Issue on Advances on Life Science Systems and Applications| 2006
- 755
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Special issue on advances on life science systems and applications| 2006
- 756
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Special issue on smart sensors| 2006
- 756
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CALLS FOR PAPERS - Special Issue on Smart Sensors| 2006
- 757
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2006 IEEE International Conference on Multimedia and Expo (ICME)| 2006
- 757
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CALLS FOR PAPERS - IEEE ICME 2006| 2006
- 758
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CALLS FOR PAPERS - Call for Participation -- IEEE ISCAS 2006| 2006
- 758
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2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006)| 2006
- 759
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CALLS FOR PAPERS - IEEE MWSCAS 2006| 2006
- 759
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49th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2006)| 2006
- 760
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Information for Authors| 2006
- 760
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IEEE Transactions on Circuits and Systems—I: Regular Papers Information for authors| 2006
- c1
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Table of contents| 2006
- c2
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IEEE Transactions on Circuits and Systems—I: Regular Papers publication information| 2006
- c3
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IEEE Circuits and Systems Society Information| 2006