135-MHz 258-K Gates VLSI Design for All-Intra H.264/AVC Scalable Video Encoder (English)
- New search for: Li, G. L.
- New search for: Chen, T. Y.
- New search for: Shen, M. W.
- New search for: Wen, M. H.
- New search for: Chang, T. S.
- New search for: Li, G. L.
- New search for: Chen, T. Y.
- New search for: Shen, M. W.
- New search for: Wen, M. H.
- New search for: Chang, T. S.
In:
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION SYSTEMS
;
21
, 4
;
636-647
;
2013
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ISSN:
- Article (Journal) / Print
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Title:135-MHz 258-K Gates VLSI Design for All-Intra H.264/AVC Scalable Video Encoder
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Contributors:Li, G. L. ( author ) / Chen, T. Y. ( author ) / Shen, M. W. ( author ) / Wen, M. H. ( author ) / Chang, T. S. ( author )
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Published in:IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION SYSTEMS ; 21, 4 ; 636-647
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Publisher:
- New search for: INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS
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Publication date:2013-01-01
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Size:12 pages
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ISSN:
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Type of media:Article (Journal)
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Type of material:Print
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Language:English
- New search for: 321.395
- Further information on Dewey Decimal Classification
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Classification:
DDC: 321.395 -
Source:
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Table of contents – Volume 21, Issue 4
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 605
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Testing and Validation - RATS: Restoration-Aware Trace Signal Selection for Post-Silicon ValidationBasu, K et al. | 2013
- 605
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RATS: Restoration-Aware Trace Signal Selection for Post-Silicon ValidationBasu, Kanad / Mishra, Prabhat et al. | 2013
- 614
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Test Patterns of Multiple SIC Vectors: Theory and Application in BIST SchemesLiang, Feng / Zhang, Luwen / Lei, Shaochong / Zhang, Guohe / Gao, Kaile / Liang, Bin et al. | 2013
- 624
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Low Power Design - Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-FlopsShyu, Y-T et al. | 2013
- 624
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Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-FlopsShyu, Ya-Ting / Lin, Jai-Ming / Huang, Chun-Po / Lin, Cheng-Wu / Lin, Ying-Zu / Chang, Soon-Jyh et al. | 2013
- 636
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135-MHz 258-K Gates VLSI Design for All-Intra H.264/AVC Scalable Video EncoderLi, Gwo-Long / Chen, Tzu-Yu / Shen, Meng-Wei / Wen, Meng-Hsun / Chang, Tian-Sheuan et al. | 2013
- 636
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VLSI Design - 135-MHz 258-K Gates VLSI Design for All-Intra H.264/AVC Scalable Video EncoderLi, G-L et al. | 2013
- 648
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Analysis and Design of On-Chip Decoupling CapacitorsCharania, Tasreen / Opal, Ajoy / Sachdev, Manoj et al. | 2013
- 659
-
Reconfigurable Accelerator for the Word-Matching Stage of BLASTNChen, Yupeng / Schmidt, Bertil / Maskell, Douglas L. et al. | 2013
- 670
-
Architecturally Homogeneous Power-Performance Heterogeneous Multicore SystemsChakraborty, Koushik / Roy, Sanghamitra et al. | 2013
- 670
-
Power Management - Architecturally Homogeneous Power-Performance Heterogeneous Multicore SystemsChakraborty, K et al. | 2013
- 680
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Active Filter-Based Hybrid On-Chip DC–DC Converter for Point-of-Load Voltage RegulationKose, Selçuk / Tam, Simon / Pinzon, Sally / McDermott, Bruce / Friedman, Eby G. et al. | 2013
- 692
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CusNoC: Fast Full-Chip Custom NoC GenerationLi, Katherine Shu-Min et al. | 2013
- 692
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NOC - CusNoC: Fast Full-Chip Custom NoC GenerationLi, K S-M et al. | 2013
- 706
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Cooperating Virtual Memory and Write Buffer Management for Flash-Based Storage SystemsShi, Liang / Li, Jianhua / Xue, Chun Jason / Zhou, Xuehai et al. | 2013
- 706
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Memories - Cooperating Virtual Memory and Write Buffer Management for Flash-Based Storage SystemsShi, L et al. | 2013
- 720
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MDC FFT/IFFT Processor With Variable Length for MIMO-OFDM SystemsYang, Kai-Jiun / Tsai, Shang-Ho / Chuang, Gene C. H. et al. | 2013
- 720
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Communications Circuits - MDC FFT/IFFT Processor With Variable Length for MIMO-OFDM SystemsYang, K-J et al. | 2013
- 732
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Current-Reused 2.4-GHz Direct-Modulation Transmitter With On-Chip Automatic TuningAmir-Aslanzadeh, Hesam / Pankratz, Erik John / Mishra, Chinmaya / Sanchez-Sinencio, Edgar et al. | 2013
- 747
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Reconfigurable Adaptive Singular Value Decomposition Engine Design for High-Throughput MIMO-OFDM SystemsChen, Yen-Liang / Zhan, Cheng-Zhou / Jheng, Ting-Jyun / Wu, An-Yeu et al. | 2013
- 761
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FPGA Design - The LUT-SR Family of Uniform Random Number Generators for FPGA ArchitecturesThomas, D B et al. | 2013
- 761
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The LUT-SR Family of Uniform Random Number Generators for FPGA ArchitecturesThomas, David B. / Luk, Wayne et al. | 2013
- 771
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Exploring the Use of Emerging Nonvolatile Memory Technologies in Future FPGAsPan, Yangyang / Li, Yiran / Sun, Hongbin / Xu, Wei / Zheng, Nanning / Zhang, Tong et al. | 2013
- 771
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BRIEF PAPERS - Exploring the Use of Emerging Nonvolatile Memory Technologies in Future FPGAsPan, Y et al. | 2013
- 776
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Broadside and Skewed-Load Tests Under Primary Input ConstraintsPomeranz, Irith et al. | 2013
- 781
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Supply Noise Suppression by Triple-Well StructureOgasahara, Yasuhiro / Hashimoto, Masanori / Kanamoto, Toshiki / Onoye, Takao et al. | 2013
- 786
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Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore ArchitecturesTheodorou, Giorgos / Kranitis, Nektarios / Paschalis, Antonis / Gizopoulos, Dimitris et al. | 2013
- 791
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Comments on "Low-energy CSMT carry generators and binary adders"Parhi, Keshab K. et al. | 2013
- 792
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems information for authors| 2013
- C1
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Table of contents| 2013
- C2
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems publication information| 2013
- C3
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems society information| 2013
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COMMENTS AND CORRECTIONS - Comments on "Low-Energy CSMT Carry Generators and Binary Adders"Parhi, K K et al. | 2013