A high precise E-nose for daily indoor air quality monitoring in living environment (English)
- New search for: He, Jie
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- New search for: He, Jie
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In:
Integration, the VLSI Journal
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58
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286-294
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2017
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ISSN:
- Article (Journal) / Electronic Resource
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Title:A high precise E-nose for daily indoor air quality monitoring in living environment
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Contributors:
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Published in:Integration, the VLSI Journal ; 58 ; 286-294
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Publisher:
- New search for: Elsevier B.V.
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Publication date:2017-01-01
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Size:9 pages
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ISSN:
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DOI:
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Type of media:Article (Journal)
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Type of material:Electronic Resource
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Language:English
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Keywords:
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Source:
Table of contents – Volume 58
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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A routing framework for technology migration with bump encroachmentWu, Po-Yi / Mak, Wai-Kei / Wang, Ting-Chi / Zhuo, Cheng / Unda, Kassan / Shi, Yiyu et al. | 2017
- 9
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PASSIOT: A Pareto-optimal multi-objective optimization approach for synthesis of analog circuits using Sobol’ indices-based engineKourany, Taher / Ghoneima, Maged / Hegazi, Emad / Ismail, Yehea et al. | 2016
- 22
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Low-loss active inductor with independently adjustable self-resonance frequency and quality factor parametersMomen, H.G. / Yazgi, M. / Kopru, R. / Saatlo, A.N. et al. | 2016
- 27
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A 0.33V 2.5μW cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130nm CMOSJin, Wei / He, Weifeng / Jiang, Jianfei / Huang, Haichao / Zhao, Xuejun / Sun, Yanan / Chen, Xin / Jing, Naifeng et al. | 2017
- 35
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An integrated fault tolerance technique for combinational circuits based on implications and transistor sizingSheikh, Ahmad T. / El-Maleh, Aiman H. et al. | 2017
- 47
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Stitch aware detailed placement for multiple E-beam lithographyLin, Yibo / Yu, Bei / Zou, Yi / Li, Zhuo / Alpert, Charles J. / Pan, David Z. et al. | 2017
- 55
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Low space complexity CRT-based bit-parallel polynomial basis multipliers for irreducible trinomialsZhang, Jiajun / Fan, Haining et al. | 2017
- 64
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Cluster-based delta-QMC technique for fast yield analysisQui, Nguyen Cao / He, Si-Rong / Liu, Chien-Nan Jimmy et al. | 2017
- 74
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Scaling equations for the accurate prediction of CMOS device performance from 180nm to 7nmStillmaker, Aaron / Baas, Bevan et al. | 2017
- 82
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A mechanism for detecting on-chip radio frequency interference of field-programmable gate arrayZhong, Hengfei / Huang, Zhuoquan / Chen, Dihu / Su, Tao / Wang, Zixin et al. | 2017
- 91
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On supporting rapid prototyping of embedded systems with reconfigurable architecturesKoutras, I. / Maragos, K. / Diamantopoulos, D. / Siozios, K. / Soudris, D. et al. | 2017
- 101
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A fast temperature-aware fixed-outline floorplanning framework using convex optimizationKhodabandeloo, Behnam / Khonsari, Ahmad / Jasemi, Masoomeh / Taheri, Golnaz et al. | 2017
- 111
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CMOS Analog Rank Order Filters using positive feedback comparatorsBandala-Hernandez, H.C. / Díaz-Sánchez, A. / Rocha-Pérez, J.M. / Ramírez-Angulo, J. / López-Ortega, I.Y. / Lemus-López, J. / Molinar-Solís, J.E. et al. | 2017
- 116
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Self-triggering hardware trojan: Due to NBTI related aging in 3-D ICsMossa, Siraj Fulum / Hasan, Syed Rafay / Elkeelany, Omar et al. | 2016
- 125
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Loosely coupled multi-bit flip-flop allocation for power reductionMoon, Hyoungseok / Kim, Taewhan et al. | 2017
- 134
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An efficient VLSI architecture design for logarithmic multiplication by using the improved operand decompositionDurgesh Nandan / Kanungo, Jitendra / Mahajan, Anurag et al. | 2017
- 142
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A standard cell phase locked loop design, analysis and high-level synthesis tool (CellPLL)Balcioglu, Yalcin / Dundar, Gunhan et al. | 2017
- 155
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Bio-inspired fault tolerant network on chipSethi, Muhammad Athar Javed / Hussin, Fawnizu Azmadi / Hamid, Nor Hisham et al. | 2017
- 167
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Low Power Low Latency Floorplan‐aware Path Synthesis in Application-Specific Network-on-Chip DesignMukherjee, Priyajit / Chattopadhyay, Santanu et al. | 2017
- 189
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New advances of high-level synthesis for efficient and reliable hardware designCampbell, Keith / Zuo, Wei / Chen, Deming et al. | 2016
- 215
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A quantitative design methodology for high-speed interpolation/averaging ADCsTang, He / Peng, Yong / Lu, Xiang / Wang, Albert / Wang, Hai et al. | 2017
- 225
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Special issue on IEEE/ACM System Level Interconnect Prediction (SLIP) Workshop 2016Ho, Tsung-Yi / Taskin, Baris et al. | 2017
- 226
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Revisiting 3DIC benefit with multiple tiersChan, Wei-Ting Jonas / Kahng, Andrew B. / Li, Jiajia et al. | 2017
- 236
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Minimizing detection-to-boosting latency toward low-power error-resilient circuitsHsu, Chih-Cheng / Hashimoto, Masanori / Lin, Mark Po-Hung et al. | 2017
- 245
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An adaptive hybrid memetic algorithm for thermal-aware non-slicing VLSI floorplanningChen, Jianli / Liu, Yan / Zhu, Ziran / Zhu, Wenxing et al. | 2017
- 253
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Giant Spin-Hall assisted STT-RAM and logic designEken, Enes / Bayram, Ismail / Zhang, Yaojun / Yan, Bonan / Wu, Wenqing / Li, Hai (Helen) / Chen, Yiran et al. | 2017
- 263
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Guest editorial – Special issue on hardware assisted techniques for IoT and bigdata applicationsMohanty, Saraju P. / Srivastava, Ashok / Hu, Shiyan / Ghosal, Prasun et al. | 2017
- 267
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Area, energy, and time assessment for a distributed TPM for distributed trust in IoT clustersHamadeh, Hala / Chaudhuri, Soma / Tyagi, Akhilesh et al. | 2016
- 274
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A framework for post-disaster communication using wireless ad hoc networksRay, Niranjan Kumar / Turuk, Ashok Kumar et al. | 2016
- 286
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A high precise E-nose for daily indoor air quality monitoring in living environmentHe, Jie / Xu, Liyuan / Wang, Peng / Wang, Qin et al. | 2017
- 295
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Energy efficient EEG acquisition and reconstruction for a Wireless Body Area NetworkSingh, Wazir / Shukla, Ankita / Deb, Sujay / Majumdar, Angshul et al. | 2016
- 303
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Automated diagnostics for manufacturing machinery based on well-regularized deep neural networksDiBiano, Robert / Mukhopadhyay, Supratik et al. | 2017
- 311
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Shaping data for application performance and energy optimization in dynamic data view frameworkVenkatesan, Varun / Ponpandi, Swamy D. / Tyagi, Akhilesh et al. | 2016
- 320
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Energy aware synthesis of application kernels through composition of data-paths on a CGRAS., Nalesh / Madhu, Kavitha T. / Das, Saptarsi / Nandy, S.K. / Narayan, Ranjani et al. | 2017
- 329
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A novel switchable pin method for regulating power in chip-multiprocessorZhao, Zhou / Srivastava, Ashok / Peng, Lu / Chen, Shaoming / Mohanty, Saraju P. et al. | 2016
- 339
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AutoNFT: Architecture synthesis for hardware DFT of length-of-coprime-number productsFeng, Gan / Yao, Lan / Chen, Song et al. | 2017
- 348
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Threshold adjustment of receiver chip to achieve a data rate >66Gbit/sec in point to point interconnectMajumder, Alak / Mondal, Abir J. / Bhattacharyya, Bidyut K. et al. | 2016
- 356
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A mathematical formulation to design and implementation of a low voltage swing transceiver circuitMondal, Abir J. / Majumder, Alak / Bhattacharyya, Bidyut K. et al. | 2016
- 369
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Design exploration of a Symmetric Pass Gate Adiabatic Logic for energy-efficient and secure hardwareDinesh Kumar, S. / Thapliyal, Himanshu / Mohammad, Azhar / Perumalla, Kalyan S. et al. | 2016
- 378
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Low cost optimized Trojan secured schedule at behavioral level for single & Nested loop control data flow graphs (Invited Paper)Sengupta, Anirban / Roy, Dipanjan / Bhadauria, Saumya et al. | 2016
- 390
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Secure split test techniques to prevent IC piracy for IoT devicesKumar, K. Sudeendra / Rao, G. Hanumanta / Sahoo, Sauvagya / Mahapatra, K.K. et al. | 2016
- 401
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A novel current controlled configurable RO PUF with improved security metricsSahoo, Sauvagya Ranjan / Kumar, K. Sudeendra / Mahapatra, Kamalakanta et al. | 2016
- 411
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Introduction to the special issue on PRIME 2016 and SMACD 2016Horta, Nuno / Baschirotto, Andrea / Fernández, Francisco V. / Dundar, Gunhan / Goes, João / Fernandes, Jorge et al. | 2017
- 413
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Design of low-power wideband frequency quadruplers based on transformer-coupled resonators for E-Band backhaul applicationsIotti, Lorenzo / Bassi, Matteo / Mazzanti, Andrea / Svelto, Francesco et al. | 2017
- 421
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Thermal aware design and comparative analysis of a high performance 64-bit adder in FD-SOI and bulk CMOS technologiesBaltacı, Can / Leblebici, Yusuf et al. | 2017
- 430
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A 65nm CMOS key establishment core based on tree parity machinesGomez, Hector / Reyes, Óscar / Roa, Elkim et al. | 2017
- 438
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Arduino-controlled HP memristor emulator for memristor circuit applicationsOlumodeji, Olufemi Akindele / Gottardi, Massimo et al. | 2017
- 446
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A computational design of a versatile microchamber for in vitro nanosecond pulsed electric fields experimentsCasciola, Maura / Liberti, Micaela / Denzi, Agnese / Paffi, Alessandra / Merla, Caterina / Apollonio, Francesca et al. | 2017
- 454
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A contribution towards model-based design of application-specific MEMSKlaus, Jenny / Schäfer, Eric / Paris, Roman / Frank, Astrid / Sommer, Ralf et al. | 2017
- 463
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An inductor modeling and optimization toolbox for RF circuit designPassos, F. / Roca, E. / Castro-López, R. / Fernández, F.V. et al. | 2017
- 473
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A generalized numerical method for ferrite inductors analysis in high current ripple operationDi Capua, Giulia / Femia, Nicola / Stoyka, Kateryna et al. | 2017
- 485
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Stochastic-based placement template generator for analog IC layout-aware synthesisMartins, Ricardo / Lourenço, Nuno / Canelas, António / Horta, Nuno et al. | 2017
- 496
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Aging signature properties and an efficient signature determination tool for online monitoringAfacan, Engin / Dundar, Gunhan / Pusane, Ali E. / Yelten, M. Berke / Baskaya, Faik et al. | 2017
- 505
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Path reuse-aware routing for non-volatile memory based FPGAsXue, Yuan / Yang, Chengmo et al. | 2016
- 518
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Dynamic electromigration modeling for transient stress evolution and recovery under time-dependent current and temperature stressingHuang, Xin / Sukharev, Valeriy / Kim, Taeyoung / Tan, Sheldon X.-D. et al. | 2016
- 528
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An optimal energy co-scheduling framework for smart buildingsCui, Tiansong / Chen, Shuang / Wang, Yanzhi / Zhu, Qi / Nazarian, Shahin / Pedram, Massoud et al. | 2016
- 538
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A novel test compression algorithm for analog circuits to decrease production costsAhmadyan, Seyed Nematollah / Natarajan, Suriyaprakash / Vasudevan, Shobha et al. | 2017
- 549
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Clustered checkpointing: Maximizing the level of confidence for non-equidistant checkpointingNikolov, Dimitar / Larsson, Erik et al. | 2016
- 563
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IP protection through gate-level netlist security enhancementMeade, Travis / Zhang, Shaojie / Jin, Yier et al. | 2016
- 571
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Ensuring safety and efficiency in networks-on-chipKostrzewa, Adam / Saidi, Selma / Ecco, Leonardo / Ernst, Rolf et al. | 2016
- 583
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A high performance reliable NoC routerWang, Lu / Ma, Sheng / Li, Chen / Chen, Wei / Wang, Zhiying et al. | 2016
- IFC
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Inside Front Cover - Editorial Board Page| 2017