Semiformal Verification of Software-Controlled Connections (English)
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In:
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
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556-561
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2017
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ISBN:
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ISSN:
- Conference paper / Electronic Resource
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Title:Semiformal Verification of Software-Controlled Connections
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Contributors:
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Published in:
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Publisher:
- New search for: IEEE
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Publication date:2017-07-01
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Size:292380 byte
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ISBN:
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DOI:
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Type of media:Conference paper
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Type of material:Electronic Resource
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Language:English
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Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
-
Voltage Noise Analysis with Ring Oscillator ClocksMachado, Lucas / Perez, Antoni Roca / Cortadella, Jordi et al. | 2017
- 7
-
Resilient Cell-Based Architecture for Time-to-Digital ConverterWu, Chia-Hua / Huang, Shi-Yu / Chern, Mason / Chou, Yung-Fa / Kwai, Ding-Ming et al. | 2017
- 13
-
Reconfigurable Support Vector Machine Classifier with Approximate ComputingVan Leussen, Martin / Huisken, Jos / Wang, Lei / Jiao, Hailong / Gyvez, Jose Pineda de et al. | 2017
- 19
-
Unconventional Layout Techniques for a High Performance, Low Variability Subthreshold Standard Cell LibraryMorris, Jordan / Prabhat, Pranay / Myers, James / Yakovlev, Alex et al. | 2017
- 25
-
SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High LevelJafri, Syed Mohammad Asad Hassan / Farahini, Nasim / Hemani, Ahmed et al. | 2017
- 32
-
High Speed Power Efficient Carry Select Adder DesignKatreepalli, Raghava / Haniotakis, Themistoklis et al. | 2017
- 38
-
Architecting SOT-RAM Based GPU Register FileMittal, Sparsh / Bishnoi, Rajendra / Oboril, Fabian / Wang, Haonan / Tahoori, Mehdi / Jog, Adwait / Vetter, Jeffrey S. et al. | 2017
- 45
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RIMPA: A New Reconfigurable Dual-Mode In-Memory Processing Architecture with Spin Hall Effect-Driven Domain Wall Motion DeviceAngizi, Shaahin / He, Zhezhi / Parveen, Farhana / Fan, Deliang et al. | 2017
- 51
-
Area and Delay Efficient Design of a Quantum Bit String ComparatorBabu, Hafiz Md. Hasan / Jamal, Lafifa / Dibbo, Sayanton Vhaduri / Biswas, Ashis Kumer et al. | 2017
- 57
-
Novel Pulsed-Latch Replacement in Non-Volatile Flip-Flop CoreCai, Hao / Wang, You / Naviner, Lirida / Zhao, Weisheng et al. | 2017
- 62
-
Analysis of RRAM Reliability Soft-Errors on the Performance of RRAM-Based Neuromorphic SystemsTosson, Amr M.S. / Yu, Shimeng / Anis, Mohab H. / Wei, Lan et al. | 2017
- 68
-
Design of Quantum Circuits for Galois Field Squaring and ExponentiationMunoz-Coreas, Edgard / Thapliyal, Himanshu et al. | 2017
- 74
-
STBC: Side Channel Attack Tolerant Balanced Circuit with Reduced Propagation DelayKim, Hyunmin / Hong, Seokhie / Preneel, Bart / Verbauwhede, Ingrid et al. | 2017
- 80
-
AICNN: Implementing Typical CNN Algorithms with Analog-to-Information Conversion ArchitectureJia, Kaige / Liu, Zheyu / Qiao, Fei / Liu, Xinjun / Wei, Qi / Yang, Huazhong et al. | 2017
- 86
-
Efficient FPGA Implementation of the SHA-3 Hash FunctionSundal, Magnus / Chaves, Ricardo et al. | 2017
- 92
-
Decoupling Translation Lookaside Buffer Coherence from Cache CoherenceLiu, Hao / Meunier, Quentin L. / Greiner, Alain et al. | 2017
- 98
-
Centrality Indicators for Efficient and Scalable Logic MaskingColombier, Brice / Bossuet, Lilian / Hely, David et al. | 2017
- 104
-
Combined TDM and SDM Circuit Switching NoCs with Dedicated Connection AllocatorChen, Yong / Matus, Emil / Fettweis, Gerhard P. et al. | 2017
- 110
-
Efficient Single-Precision Floating-Point Division Using Harmonized Parabolic SynthesisSavas, Suleyman / Hertz, Erik / Nordstrom, Tomas / Ul-Abdin, Zain et al. | 2017
- 116
-
An Efficient Design of an FPGA-Based Multiplier Using LUT Merging TheoremSworna, Zarrin Tasnim / Haque, Mubin Ul / Babu, Hafiz Md. Hasan / Jamal, Lafifa / Biswas, Ashis Kumer et al. | 2017
- 122
-
High-Performance and Energy-Efficient 256-Bit CMOS Priority EncoderBalobas, Dimitrios / Konofaos, Nikos et al. | 2017
- 128
-
Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack ViaSrinivasa, Srivatsa Rangachar / Mohan, Karthik / Chen, Wei-Hao / Hsu, Kuo-Hsinag / Li, Xueqing / Chang, Meng-Fan / Gupta, Sumeet Kumar / Sampson, John / Narayanan, Vijaykrishnan et al. | 2017
- 134
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Floating-Point Arithmetic Using GPGPU on FPGAsAl Kadi, Muhammed / Janssen, Benedikt / Huebner, Michael et al. | 2017
- 140
-
Minimizing Critical Access Time for 3D Data Bus Based on Inserted Bus Switches and RepeatersTsai, Chia-Chun et al. | 2017
- 146
-
Sample Preparation on Micro-Electrode-Dot-Array Digital Microfluidic BiochipsLi, Zipeng / Lai, Kelvin Yi-Tse / Chakrabarty, Krishnendu / Ho, Tsung-Yi / Lee, Chen-Yi et al. | 2017
- 152
-
Hybrid Polymorphic Logic Gate with 5-Terminal Magnetic Domain Wall Motion DeviceParveen, Farhana / He, Zhezhi / Angizi, Shaahin / Fan, Deliang et al. | 2017
- 158
-
Ultra-Low Energy Data Driven Computing Using Asynchronous Micropipelines and Nano-Electro-Mechanical RelaysAlrudainy, Haider M. / Mokhov, Andrey / Xia, Fei / Yakovlev, Alex et al. | 2017
- 164
-
Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based TechnologiesTesta, Eleonora / Zografos, Odysseas / Soeken, Mathias / Vaysset, Adrien / Manfrini, Mauricio / Lauwereins, Rudy / De Micheli, Giovanni et al. | 2017
- 170
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BioViz: An Interactive Visualization Engine for the Design of Digital Microfluidic BiochipsStoppe, Jannis / Keszocze, Oliver / Luenert, Maximilian / Wille, Robert / Drechsler, Rolf et al. | 2017
- 176
-
Scouting Logic: A Novel Memristor-Based Logic Design for Resistive ComputingXie, Lei / Nguyen, H.A. Du / Yu, Jintao / Kaichouhi, Ali / Taouil, Mottaqiallah / AlFailakawi, Mohammad / Hamdioui, Said et al. | 2017
- 182
-
Latency Aware Block Replacement for L1 Caches in Chip MultiprocessorDas, Shirshendu / Kapoor, Hemangee K. et al. | 2017
- 188
-
Wireless NoCs Using Directional and Substrate Propagation AntennasPano, Vasil / Liu, Yuqiao / Yilmaz, Isikcan / More, Ankit / Taskin, Baris / Dandekar, Kapil et al. | 2017
- 194
-
A Multi-Gbps Fully Pipelined Layered Decoder for IEEE 802.11n/ac/ax LDPC CodesUsman, Saleh / Mansour, Mohammad M. / Chehab, Ali et al. | 2017
- 200
-
A Meta-Routing Method to Create Multiple Virtual Logical Networks on a Single Hardware NoCAmor, Hela Belhadj / Sheibanyrad, Hamed / Petrot, Frederic et al. | 2017
- 206
-
Secured-by-Design FPGA against Early EvaluationAlmohaimeed, Ziyad / Sima, Mihai et al. | 2017
- 213
-
Customizing Skewed Trees for Fast Memory Integrity Verification in Embedded SystemsVig, Saru / Tzer, Tan Yng / Jiang, Guiyuan / Lam, Siew-Kei et al. | 2017
- 219
-
A New High Performance VLSI Architecture for LMS Adaptive Filter Using Distributed ArithmeticKhan, Mohd Tasleem / Ahamed, Shaik Rafi et al. | 2017
- 225
-
Ultra High Throughput Unrolled Layered Architecture for QC-LDPC DecodersBoncalo, Oana / Amaricai, Alexandru et al. | 2017
- 231
-
A General Design Framework for Sparse Parallel Prefix AddersBanerjee, Soumya / Rao, Wenjing et al. | 2017
- 237
-
On Benchmarking Pin Access for Nanotechnology Standard CellsFang, Shang-Rong / Tai, Cheng-Wei / Lin, Rung-Bin et al. | 2017
- 243
-
A Power Efficient System Design Methodology Employing Approximate Arithmetic UnitsAyhan, Tuba / Kula, Firat / Altun, Mustafa et al. | 2017
- 249
-
A Side-Channel Attack Resistant AES with 500Mbps, 1.92pJ/Bit PVT Variation Tolerant True Random Number GeneratorPeng, Yimai / Zhao, Haobo / Sun, Xun / Sun, Chen et al. | 2017
- 255
-
Unobtrusive Wearable Health Monitoring SystemAboughaly, Ali A. / El Ghany, Mohamed A. Abd et al. | 2017
- 260
-
Low Power Image Acquisition Scheme Using On-Pixel Event Driven HalftoningKodge, Sangamesh / Chaudhary, Himanshu / Sharad, Mrigank et al. | 2017
- 266
-
Low Power Implantable Spike Sorting Scheme Based on Neuromorphic Classifier with Supervised Training EnginePathak, Rakshit / Dash, Saurav / Mukhopadhyay, Anand Kumar / Basu, Arindam / Sharad, Mrigank et al. | 2017
- 272
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A Power Delivery Network and Cell Placement Aware IR-Drop Mitigation Technique: Harvesting Unused Timing Slacks to Schedule Useful SkewsBhamidipati, Lakshmi / Gunna, Bhoopal / Homayoun, Houman / Sasan, Avesta et al. | 2017
- 278
-
Physical Design Variation in Relative Timed Asynchronous CircuitsSharma, Tannu / Stevens, Kenneth S. et al. | 2017
- 284
-
Exploiting Bus Communication to Improve Cache Attacks on Systems-on-ChipsSepulveda, Johanna / Gross, Mathieu / Zankl, Andreas / Sigl, Georg et al. | 2017
- 290
-
Detection of Layout-Level Trojans by Monitoring Substrate with Preexisting Built-in SensorsGuimaraes, Leonel Acunha / Bastos, Rodrigo Possamai / Fesquet, Laurent et al. | 2017
- 296
-
Coding for Efficient Caching in Multicore Embedded SystemsAdegbija, Tosiron / Tandon, Ravi et al. | 2017
- 302
-
A Workload Characterization for the Internet of Medical Things (IoMT)Limaye, Ankur / Adegbija, Tosiron et al. | 2017
- 308
-
Functional Broadside Test Generation Using a Commercial ATPG ToolWang, Naixing / Yao, Bo / Lin, Xijiang / Pomeranz, Irith et al. | 2017
- 314
-
Static Compaction by Merging of Seeds for LFSR-Based Test GenerationPomeranz, Irith et al. | 2017
- 320
-
Comprehensive Study for Detection of Weak Resistive Open and Short Defects in FDSOI TechnologyKarel, Amit / Azais, Florence / Comte, Mariane / Galliere, Jean-Marc / Renovell, Michel / Singh, Keshav et al. | 2017
- 326
-
Offset Analysis and Design Optimization of a Dynamic Sense Amplifier for Resistive MemoriesMraihi, Salmen / Boujamaa, El Mehdi / Dray, Cyrille / Klein, Jacques-Olivier et al. | 2017
- 332
-
Efficient Metastability-Containing MultiplexersFriedrichs, Stephan / Kinali, Attila et al. | 2017
- 338
-
Micro Latch-Up Analysis on Ultra-Nanometer VLSI Technologies: A New Monte Carlo ApproachAzimi, Sarah / Sterpone, Luca et al. | 2017
- 344
-
GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTackTahoori, Mehdi / Nair, Sarath Mohanachandran / Bishnoi, Rajendra / Senni, Sophiane / Mohdad, Jad / Mailly, Frederick / Torres, Lionel / Benoit, Pascal / Nouet, Pascal / Ma, Rui et al. | 2017
- 350
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Project HIPNOS: Case Study of High Performance Avionics for Active Debris Removal in SpaceLentaris, George / Stratakos, Ioannis / Stamoulias, Ioannis / Maragos, Konstantinos / Soudris, Dimitrios / Lourakis, Manolis / Zabulis, Xenophon / Gonzalez-Arjona, David et al. | 2017
- 356
-
Hardware Security for Critical Infrastructures - The CIPSEC Project ApproachFournaris, Apostolos P. / Lampropoulos, Konstantinos / Koufopavlou, Odysseas et al. | 2017
- 362
-
AEGLE's Cloud Infrastructure for Resource Monitoring and Containerized Accelerated AnalyticsKoliogeorgi, Konstantina / Masouros, Dimosthenis / Zervakis, Georgios / Xydis, Sotirios / Becker, Tobias / Gaydadjiev, Georgi / Soudris, Dimitrios et al. | 2017
- 368
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A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA ProjectRabozzi, Marco / Brondolin, Rolando / Natale, Giuseppe / Del Sozzo, Emanuele / Huebner, Michael / Brokalakis, Andreas / Ciobanu, Catalin / Stroobandt, Dirk / Santambrogio, Marco Domenico et al. | 2017
- 374
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Profile-Driven Power Optimizations for AAL Robots: Maximizing Robots Idle Time by Offloading Monitoring Workload to Dedicated Hardware ComponentsKeramidas, Georgios / Voros, Nikolaos / Antonopoulos, Christos / Schwiegelshohn, Fynn / Wehner, Philipp / Gohringer, Diana / Mariatos, Evaggelinos et al. | 2017
- 379
-
Unified Model for Contrast Enhancement and DenoisingJames, Alex Pappachen / Krestinskaya, Olga / Mathew, Joshin John et al. | 2017
- 385
-
SDN-Based Circuit-Switching for Many-CoresRuaro, Marcelo / Medina, Henrique Martins / Moraes, Fernando Gehm et al. | 2017
- 391
-
NEDA: NOP Exploitation with Dependency Awareness for Reliable VLIW ProcessorsPsiakis, Rafail / Kritikakou, Angeliki / Sentieys, Olivier et al. | 2017
- 397
-
Serial ATA Commands Logger for Security Monitoring on FPGA DevicesTuricu, Dan Cristian / Cret, Octavian / Vacariu, Lucia et al. | 2017
- 403
-
PACT: Priority-Aware Phase-Based Cache Tuning for Embedded SystemsGianelli, Sam / Adegbija, Tosiron et al. | 2017
- 409
-
CAPSL: The Component Authentication Process for Sandboxed LayoutsWhitaker, Taylor JL / Bobda, Christophe et al. | 2017
- 415
-
Formal Verification of Truncated Multipliers Using Algebraic Approach and Re-SynthesisSu, Tiankai / Yu, Cunxi / Yasin, Atif / Ciesielski, Maciej et al. | 2017
- 421
-
Assessing Self-Repair on FPGAs with Biologically Realistic Astrocyte-Neuron NetworksKarim, Shvan / Harkin, Jim / McDaid, Liam / Gardiner, Bryan / Liu, Junxiu / Halliday, David M. / Tyrrell, Andy M. / Timmis, Jon / Millard, Alan / Johnson, Anju et al. | 2017
- 427
-
Memristor-Based Clock Design and Optimization with In-Situ TunabilityKong, Shuyu / Gu, Jie / Zhou, Hai et al. | 2017
- 433
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Reconfigurable Hardened Latch and Flip-Flop for FPGAsAhangari, Hamzeh / Alouani, Ihsen / Ozturk, Ozcan / Niar, Smail et al. | 2017
- 439
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Efficient Reconfigurable Global Network-on-Chip Designs towards Heterogeneous CPU-GPU Systems: An Application-Aware ApproachLe, Tung Thanh / Zhao, Dan / Bayoumi, Magdy et al. | 2017
- 445
-
Parallel Simulation-Based Verification of RC Power GridsFawaz, Mohammad / Najm, Farid N. et al. | 2017
- 453
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An Effective Power Grid Optimization Approach for the Electromigration ReliabilityYan, Ming / Cai, Yici / Wang, Chenguang / Zhou, Qiang et al. | 2017
- 459
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On Tolerating Faults of TSV/Microbumps for Power Delivery Networks in 3D ICFang, Sheng-Hsin / Lin, Chang-Tzu / Liao, Wei-Hsun / Huang, Chien-Chia / Chen, Li-Chin / Chen, Hung-Ming / Lee, I-Hsuan / Kwai, Ding-Ming / Chou, Yung-Fa et al. | 2017
- 465
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WT-CTS: Incremental Delay Balancing Using Parallel Wiring Type For CTSLerner, Scott / Taskin, Baris et al. | 2017
- 471
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Automatic Assertion Generation for Simulation, Formal Verification and EmulationZhang, Tong / Saab, Daniel / Abraham, Jacob A. et al. | 2017
- 477
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Cache Partitioning + Loop Tiling: A Methodology for Effective Shared Cache ManagementKelefouras, Vasilios / Keramidas, Georgios / Voros, Nikolaos et al. | 2017
- 483
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OFDM Based High Data Rate, Fading Resilient Transceiver for Wireless Networks-on-ChipGade, Sri Harsha / Garg, Sakshi / Deb, Sujay et al. | 2017
- 489
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DENA: A DVFS-Capable Heterogeneous NoC ArchitectureCremona, Luca / Fornaciari, William / Marchese, Andrea / Zanella, Michele / Zoni, Davide et al. | 2017
- 495
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Exploiting Configurability as a Defense against Cache Side Channel AttacksDai, Chenxi / Adegbija, Tosiron et al. | 2017
- 501
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CCATDC: A Configurable Compact Algorithmic Time-to-Digital ConverterLi, Shuo / Xu, Xiaolin / Burleson, Wayne et al. | 2017
- 507
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AIsim: Functional Simulator for Analog-to-Information Perceptual SystemsLiu, Hong / Liu, Zheyu / Qiao, Fei / Lin, Mark Po-Hung / Wei, Qi / Yang, Huazhong et al. | 2017
- 513
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A Hierarchical and Programmable OTA-C FilterBhanja, Mousumi / Ray, Baidyanath et al. | 2017
- 519
-
A 0.3V Low Cost Low Power 24 GHz Low Noise Amplifier with Body Bias TechnologyHuang, Ming-Yu / Huang, Ren-Yuan / Weng, Ro-Min et al. | 2017
- 523
-
Capacitor Mismatch Calibration Technique to Improve the SFDR of 14-Bit SAR ADCFan, Hua / Maloberti, Franco / Li, Dagang / Hu, Daqian / Cen, Yuanjun / Heidari, Hadi et al. | 2017
- 529
-
Design of an Asynchronous Detector with Priority Encoding TechniquePark, Keunyeol / Kwon, Ohoon / Noh, Hyunseob / Jin, Minhyun / Song, Minkyu et al. | 2017
- 533
-
Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level EffectsFlenker, Tino / Malburg, Jan / Fey, Gorschwin / Avramenko, Serhiy / Violante, Massimo / Reorda, Matteo Sonza et al. | 2017
- 539
-
Transistor Temperature Deviation Analysis in Monolithic 3D Standard CellsBrocard, Melanie / Mathieu, Benoit / Colonna, Jean-Philippe / Santos, Cristiano / Fenouillet-Beranger, Claire / Cao-Minh, Vincent Lu / Cibrario, Gerald / Brunet, Laurent / Batude, Perrine / Andrieu, Francois et al. | 2017
- 545
-
Reducing Search Space for Fault Diagnosis: A Probability-Based Scoring ApproachSabaghian-Bidgoli, Hossein / Behnam, Payman / Alizadeh, Bijan / Navabi, Zainalabedin et al. | 2017
- 551
-
Layout Vulnerability Reduction against Trojan Insertion Using Security-Aware White Space DistributionHossein-Talaee, Hamed / Jahanian, Ali et al. | 2017
- 556
-
Semiformal Verification of Software-Controlled ConnectionsGrimm, Tomas / Lettnin, Djones / Hubner, Michael et al. | 2017
- 562
-
Compact Modeling of Graphene Barristor for Digital Integrated Circuit DesignZhao, Zhou / Chen, Xinlu / Srivastava, Ashok / Peng, Lu / Mohanty, Saraju P. et al. | 2017
- 568
-
Performing Mathematics Using DNA: Complex Number Arithmetic Using Sticker ModelSarkar, Mayukh / Ghosal, Prasun et al. | 2017
- 574
-
Analysis of Side-Channel Attack AES Hardware Trojan Benchmarks against CountermeasuresK, Sudeendra Kumar / Sahoo, Sauvagya / Mahapatra, Abhishek / Swain, Ayas Kanta / Mahapatra, K.K. et al. | 2017
- 580
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A VCO-Based MPPT Circuit for Low-Voltage Energy HarvestersHassan, Ali H. / Hamed, Esraa M. / Badr, Eman / Elsharqawy, Omar / Ismail, Tawfik / Gabran, Salam R.I. / Ismail, Yehea / Mostafa, Hassan et al. | 2017
- 585
-
Design of 5-Bit Flash ADC Using Multiple Input Standard Cell Gates for Large Input SwingKhalapure, Sumit / R.K., Siddharth / Y.B., Nithin Kumar / M.H., Vasantha et al. | 2017
- 589
-
A 0.5 V Low Power OTA-C Low Pass Filter for ECG DetectionR., Rakhi / Taralkar, Abhijeet D. / M.H., Vasantha / Y.B., Nithin Kumar et al. | 2017
- 594
-
A Novel Opamp and Capacitor Sharing 10 Bit 20 MS/s Low Power Pipelined ADC in 0.18µm CMOS TechnologyR, Greeshma / K, Anoop V / Venkataramani, B et al. | 2017
- 600
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Design of Low Power 4-Bit 400MS/s Standard Cell Based Flash ADCS.M., Mayur / R.K., Siddharth / Y.B., Nithin Kumar / M.H., Vasantha et al. | 2017
- 604
-
A Novel CMOS-Based Fully Differential Operational Floating ConveyorElGemmazy, Hossam / Helmy, Amr / Mostafa, Hassan / Ismail, Yehea et al. | 2017
- 609
-
Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable FunctionYanambaka, Venkata P. / Mohanty, Saraju P. / Kougianos, Elias / Sundaravadivel, Prabha / Singh, Jawar et al. | 2017
- 615
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Exploiting Memristive Crossbar Memories as Dual-Use Security Primitives in IoT DevicesRose, Garrett S. / Majumder, Md. Badruddoja / Uddin, Mesbah et al. | 2017
- 621
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Adiabatic Computing Based Low-Power and DPA-Resistant Lightweight Cryptography for IoT DevicesThapliyal, Himanshu / Varun, T.S.S / Kumar, S. Dinesh et al. | 2017
- 627
-
Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research RoadmapShafique, Muhammad / Hafiz, Rehan / Javed, Muhammad Usama / Abbas, Sarmad / Sekanina, Lukas / Vasicek, Zdenek / Mrazek, Vojtech et al. | 2017
- 633
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Data Stream Processing in Networks-on-ChipRettkowski, Jens / Gohringer, Diana et al. | 2017
- 639
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On How to Design Dataflow FPGA-Based Accelerators for Convolutional Neural NetworksNatale, Giuseppe / Bacis, Marco / Santambrogio, Marco Domenico et al. | 2017
- 645
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Hardware Acceleration for Machine LearningZhao, Ruizhe / Luk, Wayne / Niu, Xinyu / Shi, Huifeng / Wang, Haitao et al. | 2017
- 651
-
A Fully Integrated Fast-Response LDO Voltage Regulator with Adaptive Transient Current DistributionTong, Xingyuan / Wei, Kangkang et al. | 2017
- 655
-
A 0.32 µW, 76.8 dB SNDR Programmable Gain Instrumentation Amplifier for Bio-Potential Signal Processing ApplicationsAdimulam, Mahesh Kumar / Movva, Krishna Kumar / Kolluru, K. / M.B., Srinivas et al. | 2017
- 661
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A Digital Offset Reduction Method for Dynamic Comparators Based on Phase MeasurementAmaya, Andres / Ardila, Javier / Roa, Elkim et al. | 2017
- 665
-
Reconfigurable Robust Hybrid Oscillator Arbiter PUF for IoT Security Based on DL-FETYanambaka, Venkata P. / Mohanty, Saraju P. / Kougianos, Elias / Sundaravadivel, Prabha / Singh, Jawar et al. | 2017
- 671
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An IoT Enabled Real-Time Communication and Location Tracking System for Vehicular EmergencyKoley, Subha / Ghosal, Prasun et al. | 2017
- 677
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A Flexible Pay-per-Device Licensing Scheme for FPGA IP CoresK., Sudeendra Kumar / Sahoo, Sauvagya / Mahapatra, Abhishek / Swain, Ayas Kanta / Mahapatra, K.K. et al. | 2017
- 683
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In-Memory Computing with Spintronic DevicesFan, Deliang / Angizi, Shaahin / He, Zhezhi et al. | 2017
- 689
-
Approximate SRAM for Energy-Efficient, Privacy-Preserving Convolutional Neural NetworksYang, Lita / Murmann, Boris et al. | 2017
- 695
-
Author Index| 2017
- 702
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[Publisher's information]| 2017
- c1
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[Front cover]| 2017
- i
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[Title page i]| 2017
- iii
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[Title page iii]| 2017
- iv
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[Copyright notice]| 2017
- v
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Table of contents| 2017
- xvii
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Message from the General Chairs| 2017
- xviii
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Message from the Program Chairs| 2017
- xx
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Track Chairs| 2017
- xxii
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Program Committee| 2017
- xxv
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Additional Reviewers| 2017
- xxvi
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Keynotes and distinguished lecture| 2017