Performance Modeling and Reporting for the UML 2.0 Design of Embedded Systems (English)
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In:
2005 International Symposium on System-on-Chip
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50-53
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2005
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ISBN:
- Conference paper / Electronic Resource
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Title:Performance Modeling and Reporting for the UML 2.0 Design of Embedded Systems
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Contributors:
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Published in:
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Publisher:
- New search for: IEEE
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Publication date:2005-01-01
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Size:961206 byte
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ISBN:
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DOI:
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Type of media:Conference paper
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Type of material:Electronic Resource
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Language:English
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Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 1
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Design Methodologies and CAD Tool Flows for Networks on ChipsMurali, S. et al. | 2005
- 7
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System-level modeling and validation increase design productivity and save errorsChown, B. et al. | 2005
- 2
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Network-on-Chip: A New Paradigm for System-on-Chip DesignNurmi, J. et al. | 2005
- 8
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Low-Power SOC Design Using Configurable Processors-The Non-Nuclear OptionRowen, Chris / Dixit, Ashish / Leibson, Steve et al. | 2005
- 14
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Acceleration of Modular Exponentiation on System-on-a-Programmable-ChipHamalainen, P. / Ning Liu, / Hannikainen, M. / Hamalainen, T.D. et al. | 2005
- 18
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Instruction Folding for an Asynchronous Java Co-ProcessorSantti, T. / Plosila, J. et al. | 2005
- 22
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Dynamic Verification of OCP-based SoCBarsotti, N. / Mariani, R. / Martinelli, M. / Pasquariello, M. et al. | 2005
- 23
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Reconfigurable Security Primitive for Embedded SystemsGogniat, G. / Wolf, T. / Burleson, W. et al. | 2005
- 29
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A FPGA Implementation of An Open-Source Floating-Point Computation SystemBrunelli, C. / Garzia, F. / Nurmi, J. / Mucci, C. / Campi, F. / Rossi, D. et al. | 2005
- 33
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Multiplierless Reconfigurable Processing Element And Its Applications to DSP KernelsSangKyu Lee, / JeongEun Kim, / Namsub Kim, / Jinsang Kim, / Won-Kyung Cho, et al. | 2005
- 37
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SOPC Builder, a Novel Design Methodology for IP IntegrationZammattio, S. et al. | 2005
- 38
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Proof of Concept for Low-power Digital Asynchronous IC DesignZetterman, T.J. / Liimatainen, J.T. / Alamaunu, J.T. et al. | 2005
- 42
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Exploiting the Area X Performance Trade-off with Code CompressionNetto, E.W. / Billo, E. / Azevedo, R. et al. | 2005
- 46
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Application Specific Instruction Set Processor Microarchitecture for UTMS-FDD Cell SearchPuusaari, K. et al. | 2005
- 50
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Performance Modeling and Reporting for the UML 2.0 Design of Embedded SystemsKukkala, P. / Hannikainen, M. / Hamalainen, T.D. et al. | 2005
- 54
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Providing Compilers and Application Program Support for Reconfigurable SoCs: Radical but OverdueOlugbon, A. / Arslan, T. / Lindsay, I. / MacDougall, S. et al. | 2005
- 58
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Practical Assertion-based Formal Verification for SoC DesignsPing Yeung, / Larsen, K. et al. | 2005
- 62
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Static Estimation of Execution Times for Hardware Accelerators in System-on-ChipsHolzer, M. / Rupp, M. et al. | 2005
- 66
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Design-Time Application Exploration for MP-SoC Customized Run-Time ManagementYkman-Couvreur, Ch. / Brockmeyer, E. / Nollet, V. / Marescaux, Th. / Catthoor, Fr. / Corporaal, H. et al. | 2005
- 70
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Overview of the 4S ProjectSmit, G. / Schuler, E. / Becker, J. / Quevremont, J. / Brugger, W. et al. | 2005
- 74
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Implementing Non Power-of-Two FFTs on Coarse-Grain Reconfigurable ArchitecturesRivaton, A. / Quevremont, J. / Qiwei Zhang, / Wolkotte, P. / Smit, G. et al. | 2005
- 78
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Run-time Mapping of Applications to a Heterogeneous SoCSmit, L.T. / Hurink, J.L. / Smit, G.J.M. et al. | 2005
- 82
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Energy Model of Networks-on-Chip and a BusWolkotte, P.T. / Smit, G.J.M. / Kavaldjiev, N. / Becker, J.E. / Becker, J. et al. | 2005
- 86
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SoC Leakage Power Reduction Algorithm by Input Vector ControlXiaotao Chang, / Dongrui Fan, / Yinhe Han, / Zhimin Zhang, et al. | 2005
- 90
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ParLe—A Parallel Computing Learning Set for MPSOCs/NOCsForsell, M. et al. | 2005
- 90
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ParLe - a parallel computing learning set for MPSOCs/NOCsForsell, M. et al. | 2007
- 96
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Towards a Formal Power Estimation Framework for Hardware SystemsTuominen, J. / Santti, T. / Plosila, J. et al. | 2005
- 100
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Predictive Synchronization Scheme between Simulator And Accelerator Free from Performance DeteriorationJae-Gon Lee, / Ki-Yong Ahn, / Chong-Min Kyung, et al. | 2005
- 104
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An Effective IP Reuse Methodology for Quality System-on-Chip DesignSarkar, S. / Shinde, S. / Subash, C.G. et al. | 2005
- 108
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Interfacing UML 2.0 for Multiprocessor System-on-Chip Design FlowRiihimaki, J. / Kukkala, P. / Kangas, T. / Hannikainen, M. / Hamalainen, T.D. et al. | 2005
- 112
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Architectural and Physical Design Optimizations for Efficient Intra-tile CommunicationPapanikolaou, A. / Starzer, F. / Miranda, M. / De Bosschere, K. / Catthoor, F. et al. | 2005
- 116
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Formal Modelling of Synchronous Hardware Components for System-on-ChipWesterlund, T. / Plosila, J. et al. | 2005
- 120
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Rapid Refinable SoC SDR DesignIsomaki, P. / Avessta, N. et al. | 2005
- 124
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Reliable Asynchronous Links for SoCNigussie, E. / Plosila, J. / Isoaho, J. et al. | 2005
- 128
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Analysis of System Architecture of FPGA-based Embedded Controller for Magnetically Suspended RotorJastrzebski, R. / Pollanen, R. / Pyrhonen, O. et al. | 2005
- 133
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FPGA Prototyping: Untapping Potential within the Multimillion-Gate System-on-Chip Design SpaceInnamaa, A. et al. | 2005
- 137
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Cell Library Development Methodology for Throughput Enhancement of Electron Beam Direct-Write Lithography SystemsSugihara, M. / Takata, T. / Nakamura, K. / Inanami, R. / Hayashi, H. / Kishimoto, K. / Hasebe, T. / Kawano, Y. / Matsunaga, Y. / Murakami, K. et al. | 2005
- 141
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A Synchronization Coprocessor Architecture for WCDMA/OFDM Mobile Terminal ImplementationsHarju, L. / Nurmi, J. et al. | 2005
- 146
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Hybrid Algorithm for Mapping Static Task Graphs on Multiprocessor SoCsOrsila, H. / Kangas, T. / Hamalainen, T.D. et al. | 2005
- 151
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Efficiency of Leakage Reduction Techniques on Different Static Logic Styles for Embedded Portable Applications with High Standby to Active Time RatioJayapal, S. / Sudalaiyandi, S. / Manoli, Y. et al. | 2005
- 155
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An On-Chip CDMA Communication NetworkXin Wang, / Nurmi, J. et al. | 2005
- 161
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High-Level Switching Activity Prediction Through Sampled Monitored SimulationKlein, F. / Azevedo, R. / Araujo, G. et al. | 2005
- 167
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Exploitation of UML 2.0—Based Platform Service Model and SystemC Workload Simulation in MPEG-4 PartitioningKreku, J. / Etelapera, M. / Soininen, J.-P. et al. | 2005
- 171
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An OCP Compliant Network Adapter for GALS-based SoC Design Using the MANGO Network-on-ChipBjerregaard, T. / Mahadevan, S. / Olsen, R.G. / Sparso, J. et al. | 2005
- 175
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A Formal Approach to Virtualisation and Provisioning in AMBA AHB-based Reconfigurable Systems-on-ChipOlugbon, A. / Arslan, T. / Lindsay, I. et al. | 2005
- 179
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System-level Modeling of Wireless Integrated Sensor NetworksVirk, K. / Hansen, K. / Madsen, J. et al. | 2005
- 183
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Future Trends in SoC InterconnectFurber, S. / Bainbridge, J. et al. | 2005
- 187
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Indexes| 2005
- C1
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Covers| 2005
- I
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[Title page]| 2005
- II
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Copyright page| 2005
- IX
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Society related material| 2005
- V
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Foreword| 2005
- VII
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Conference committee| 2005
- VIII
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list-reviewer| 2005
- X
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Table of contents| 2005