18.5 A 54MHz Crystal Oscillator With 30× 18.5 Start-Up Time Reduction Using 2-Step Injection in 65nm CMOS (English)
- New search for: Megawer, Karim M.
- New search for: Pal, Nilanjan
- New search for: Elkholy, Ahmed
- New search for: Ahmed, Mostafa G.
- New search for: Khashaba, Amr
- New search for: Griffith, Danielle
- New search for: Hanumolu, Pavan Kumar
- New search for: Megawer, Karim M.
- New search for: Pal, Nilanjan
- New search for: Elkholy, Ahmed
- New search for: Ahmed, Mostafa G.
- New search for: Khashaba, Amr
- New search for: Griffith, Danielle
- New search for: Hanumolu, Pavan Kumar
In:
2019 IEEE International Solid- State Circuits Conference - (ISSCC)
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302-304
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2019
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ISBN:
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ISSN:
- Conference paper / Electronic Resource
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Title:18.5 A 54MHz Crystal Oscillator With 30× 18.5 Start-Up Time Reduction Using 2-Step Injection in 65nm CMOS
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Contributors:Megawer, Karim M. ( author ) / Pal, Nilanjan ( author ) / Elkholy, Ahmed ( author ) / Ahmed, Mostafa G. ( author ) / Khashaba, Amr ( author ) / Griffith, Danielle ( author ) / Hanumolu, Pavan Kumar ( author )
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Published in:
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Publisher:
- New search for: IEEE
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Publication date:2019-02-01
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Size:313210 byte
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ISBN:
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ISSN:
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DOI:
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Type of media:Conference paper
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Type of material:Electronic Resource
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Language:English
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Source:
Table of contents conference proceedings
The tables of contents are generated automatically and are based on the data records of the individual contributions available in the index of the TIB portal. The display of the Tables of Contents may therefore be incomplete.
- 2
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[Copyright notice]| 2019
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Table of contents| 2019
- 4
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ISSCC 2019 Reflections| 2019
- 5
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The Visuals Supplement and The Saratoga Group – Three Decades of History| 2019
- 8
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ISSCC 2019 Foreword| 2019
- 10
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ISSCC 2019 Session 1 Overview| 2019
- 12
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1.1 Deep Learning Hardware: Past, Present, and FutureLeCun, Yann et al. | 2019
- 20
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1.2 Intelligence on Silicon: From Deep-Neural-Network Accelerators to Brain Mimicking AI-SoCsYoo, Hoi-Jun et al. | 2019
- 27
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ISSCC AWARDS| 2019
- 29
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1.3 Integration of Photonics and ElectronicsSmit, Meint / Williams, Kevin / Tol, Jos van der et al. | 2019
- 35
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1.4 5G Wireless Communication: An Inflection PointIlderem, Vida et al. | 2019
- 40
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ISSCC 2019 Session 2 Overview: Processors| 2019
- 42
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2.1 Summit and Sierra: Designing AI/HPC SupercomputersKahle, James A. / Moreno, Jaime / Dreps, Dan et al. | 2019
- 44
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2.2 A 978GOPS/W Flexible Streaming Processor for Real-Time Image Processing Applications in 22nm FDSOISmets, Sander / Goedeme, Toon / Mittal, Anurag / Verhelst, Marian et al. | 2019
- 46
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2.3 An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of ThingsBanerjee, Utsav / Pathak, Abhishek / Chandrakasan, Anantha P. et al. | 2019
- 48
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2.4 A Distributed Autonomous and Collaborative Multi-Robot System Featuring a Low-Power Robot SoC in 22nm CMOS for Integrated Battery-Powered MinibotsHonkote, Vinayak / Kurian, Dileep / Muthukumar, Sriram / Ghosh, Dibyendu / Yada, Satish / Jain, Kartik / Jackson, Bradley / Klotchkov, Ilya / Nimmagadda, Mallikarjuna Rao / Dattawadkar, Shreela et al. | 2019
- 50
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2.5 A 40×40 Four-Neighbor Time-Based In-Memory Computing Graph ASIC Chip Featuring Wavefront Expansion and 2D Gradient ControlEverson, Luke R. / Sapatnekar, Sachin S. / Kim, Chris H. et al. | 2019
- 52
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2.6 A 2 ×30k-Spin Multichip Scalable Annealing Processor Based on a Processing-In-Memory Approach for Solving Large-Scale Combinatorial Optimization ProblemsTakemoto, Takashi / Hayashi, Masato / Yoshimura, Chihiro / Yamaoka, Masanao et al. | 2019
- 54
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2.7 A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-DOtani, Sugako / Otsuki, Norimasa / Suzuki, Yasufumi / Okumura, Naoto / Maeda, Shohei / Yanagita, Tomonori / Koike, Takao / Shimazaki, Yasuhisa / Ito, Masao / Uemura, Minoru et al. | 2019
- 56
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ISSCC 2019 Session 3 Overview: Nyquist Rate ADCs| 2019
- 58
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3.1 A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of DistortionHershberg, Benjamin / Dermit, Davide / Liempd, Barend van / Martens, Ewout / Markulic, Nereo / Lagos, Jorge / Craninckx, Jan et al. | 2019
- 60
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3.2 A 7.6mW 1GS/s 60dB SNDR Single-Channel SAR-Assisted Pipelined ADC with Temperature-Compensated Dynamic Gm-R-Based AmplifierJiang, Wenning / Zhu, Yan / Zhang, Minglei / Chan, Chi-Hang / Martins, Rui P. et al. | 2019
- 62
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3.3 A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOSRamkaj, Athanasios / Ramos, Juan Carlos Pena / Lyu, Yifan / Strackx, Maarten / Marcel Pelgrom, J. M. / Steyaert, Michiel / Verhelst, Marian / Tavernier, Filip et al. | 2019
- 64
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3.4 A 0.01mm2 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input CapacitorShen, Linxiao / Shen, Yi / Tang, Xiyuan / Hsu, Chen-Kai / Shi, Wei / Li, Shaolan / Zhao, Wenda / Mukherjee, Abhishek / Sun, Nan et al. | 2019
- 66
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3.5 A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced TechniquesZhang, Minglei / Chan, Chi-Hang / Zhu, Yan / Martins, Rui P. et al. | 2019
- 68
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3.6 A 6-to-600MS/s Fully Dynamic Ringamp Pipelined ADC with Asynchronous Event-Driven Clocking in 16nmHershberg, Benjamin / Liempd, Barend van / Markulic, Nereo / Lagos, Jorge / Martens, Ewout / Dermit, Davide / Craninckx, Jan et al. | 2019
- 70
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3.7 A 10mW 16b 15MS/s Two-Step SAR ADC with 95dB DR Using Dual-Deadzone Ring-AmplifierElShater, Ahmed / Lee, Calvin Yoji / Venkatachala, Praveen Kumar / Muhlestein, Jason / Leuenberger, Spencer / Sobue, Kazuki / Hamashita, Koichi / Moon, Un-Ku et al. | 2019
- 72
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ISSCC 2019 Session 4 Overview: Power Amplifiers| 2019
- 74
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4.1 A Watt-Level Phase-Interleaved Multi-Subharmonic Switching Digital Power Amplifier Achieving 31.4% Average Drain EfficiencyZhang, Aoyang / Chen, Mike Shuo-Wei et al. | 2019
- 76
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4.2 A Broadband Switched-Transformer Digital Power Amplifier for Deep Back-Off Efficiency EnhancementXiong, Liang / Li, Tong / Yin, Yun / Min, Hao / Yan, Na / Xu, Hongtao et al. | 2019
- 78
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4.3 A Multiphase Interpolating Digital Power Amplifier for TX Beamforming in 65nm CMOSBai, Zhidong / Yuan, Wen / Azam, Ali / Walling, Jeffrey Sean et al. | 2019
- 80
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4.4 A Highly Linear High-Power 802.11ac/ax WLAN SiGe HBT Power Amplifier Using a Compact 2nd-Harmonic-Shorting Four-Way Transformer and Integrated Thermal SensorsJu, Inchan / McPartlin, Mike / Huang, Chun-Wen Paul / Cheon, Clifford DY / Doherty, Mark / Cressler, John D. et al. | 2019
- 82
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4.5 A 13.5dBm Fully Integrated 200-to-255GHz Power Amplifier with a 4-Way Power Combiner in SiGe:C BiCMOSEissa, Mohamed Hussein / Kissinger, Dietmar et al. | 2019
- 84
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4.6 A mm-Wave 3-Way Linear Doherty Radiator with Multi Antenna Coupling and On-Antenna Current-Scaling Series Combiner for Deep Power Back-Off Efficiency EnhancementNguyen, Huy Thong / Li, Sensen / Wang, Hua et al. | 2019
- 86
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4.7 A Compact DC-to-108GHz Stacked-SOI Distributed PA/Driver Using Multi-Drive Inter-Stack Coupling, Achieving 1.525THz GBW, 20.8dBm Peak P1dB, and Over 100Gb/s in 64-QAM and PAM-4 ModulationEl-Aassar, Omar / Rebeiz, Gabriel M. et al. | 2019
- 88
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4.8 A Highly Linear Super-Resolution Mixed-Signal Doherty Power Amplifier for High-Efficiency mm-Wave 5G Multi-Gb/s CommunicationsWang, Fei / Li, Tso-Wei / Wang, Hua et al. | 2019
- 90
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4.9 A 60GHz CMOS Power Amplifier with Cascaded Asymmetric Distributed-Active-Transformer Achieving Watt-Level Peak Output Power with 20.8% PAE and Supporting 2Gsym/s 64-QAM ModulationNguyen, Huy Thong / Jung, Doohwan / Wang, Hua et al. | 2019
- 92
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ISSCC 2019 Session 5 Overview: Image Sensors| 2019
- 94
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5.1 A Stacked Global-Shutter CMOS Imager with SC-Type Hybrid-GS Pixel and Self-Knee Point Calibration Single Frame HDR and On-Chip Binarization Algorithm for Smart Vision ApplicationsXu, Chen / Mo, Yaowu / Ren, Guanjing / Ma, Weijian / Wang, Xin / Shi, Wenjie / Hou, Jinjian / Shao, Ke / Wang, Haojie / Xiao, Pengge et al. | 2019
- 96
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5.2 Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT ApplicationsChoo, Kyojin D. / Xu, Li / Kim, Yejoong / Seol, Ji-Hwan / Wu, Xiao / Sylvester, Dennis / Blaauw, David et al. | 2019
- 98
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5.3 A Data-Compressive 1.5b/2.75b Log-Gradient QVGA Image Sensor with Multi-Scale Readout for Always-On Object DetectionYoung, Christopher / Omid-Zohoor, Alex / Lajevardi, Pedram / Murmann, Boris et al. | 2019
- 100
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5.4 A 76mW 500fps VGA CMOS Image Sensor with Time-Stretched Single-Slope ADCs Achieving 1.95e- Random NoisePark, Injun / Park, Chanmin / Cheon, Jimin / Chae, Youngcheol et al. | 2019
- 102
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5.5 Dual-Tap Pipelined-Code-Memory Coded-Exposure-Pixel CMOS Image Sensor for Multi-Exposure Single-Frame Computational ImagingSarhangnejad, Navid / Katic, Nikola / Xia, Zhengfan / Wei, Mian / Gusev, Nikita / Dutta, Gairik / Gulve, Rahul / Haim, Harel / Garcia, Manuel Moreno / Stoppa, David et al. | 2019
- 104
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5.6 A 400×400-Pixel 6μm-Pitch Vertical Avalanche Photodiodes CMOS Image Sensor Based on 150ps-Fast Capacitive Relaxation Quenching in Geiger Mode for Synthesis of Arbitrary Gain ImagesHirose, Yutaka / Koyama, Shinzo / Okino, Toru / Inoue, Akito / Saito, Shigeru / Nose, Yugo / Ishii, Motonori / Yamahira, Seiji / Kasuga, Shigetaka / Mori, Mitsuyoshi et al. | 2019
- 106
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5.7 A 256×256 40nm/90nm CMOS 3D-Stacked 120dB Dynamic-Range Reconfigurable Time-Resolved SPAD ImagerHenderson, Robert K. / Johnston, Nick / Hutchings, Sam W. / Gyongy, Istvan / Abbas, Tarek Al / Dutton, Neale / Tyler, Max / Chan, Susan / Leach, Jonathan et al. | 2019
- 108
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5.8 A 32×32-Pixel 0.9THz Imager with Pixel-Parallel 12b VCO-Based ADC in 0.18μm CMOSYokoyama, Sayuri / Ikebe, Masayuki / Kanazawa, Yuri / Ikegami, Takahiro / Ambalathankandy, Prasoon / Hiramatsu, Shota / Sano, Eiichi / Takida, Yuma / Minamide, HIroaki et al. | 2019
- 110
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ISSCC 2019 Session 6 Overview: Ultra-High-Speed Wireline| 2019
- 112
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6.1 A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFETCevrero, Alessandro / Ozkaya, Ilter / Francese, Pier Andrea / Brandli, Matthias / Menolfi, Christian / Morf, Thomas / Kossel, Marcel / Kull, Lukas / Luu, Danny / Dazzi, Martino et al. | 2019
- 114
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6.2 A 60Gb/s PAM-4 ADC-DSP Transceiver in 7nm CMOS with SNR-Based Adaptive Power Scaling Achieving 6.9pJ/b at 32dB LossLaCroix, Marc-Andre / Wong, Henry / Liu, Yun Hua / Ho, Huong / Lebedev, Semyon / Krotnev, Petar / Nicolescu, Dorin Alexandru / Petrov, Dmitry / Carvalho, Carlos / Alie, Stephen et al. | 2019
- 116
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6.3 A Sub-250mW 1-to-56Gb/s Continuous-Range PAM-4 42.5dB IL ADC/DAC-Based Transceiver in 7nm FinFETPisati, Matteo / Bernardinis, Fernando De / Pascale, Paolo / Nani, Claudio / Sosio, Marco / Pozzati, Enrico / Ghittori, Nicola / Magni, Federico / Garampazzi, Marco / Bollati, Giacomino et al. | 2019
- 118
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6.4 A 180mW 56Gb/s DSP-Based Transceiver for High Density IOs in Data Center Switches in 7nm FinFET TechnologyAli, Tamer / Yousry, Ramy / Park, Henry / Chen, Ehung / Weng, Po-Shuan / Huang, Yi-Chieh / Liu, Chun-Cheng / Wu, Chien-Hua / Huang, Shih-Hao / Lin, Chungshi et al. | 2019
- 120
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6.5 A 400Gb/s Transceiver for PAM-4 Optical Direct-Detect Application in 16nm FinFETLoi, C. / Mellati, A. / Tan, A. / Farhoodfar, A. / Tiruvur, A. / Helal, B. / Killips, B. / Rad, F. / Riani, J. / Pernillo, J. et al. | 2019
- 122
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6.6 A 128Gb/s 1.3pJ/b PAM-4 Transmitter with Reconfigurable 3-Tap FFE in 14nm CMOSToprak-Deniz, Zeynep / Proesel, Jonathan E. / Bulzacchelli, John F. / Ainspan, Herschel A. / Dickson, Timothy O. / Beakes, Michael P. / Meghelli, Mounir et al. | 2019
- 124
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6.7 A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOSPeng, Pen-Jui / Chen, Yan-Ting / Lai, Sheng-Tsung / Chen, Chao-Hsuan / Huang, Hsiang-En / Shih, Ted et al. | 2019
- 126
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6.8 A 36Gb/s Adaptive Baud-Rate CDR with CTLE and 1-Tap DFE in 28nm CMOSYoo, Danny / Bagherbeik, Mohammad / Rahman, Wahid / Sheikholeslami, Ali / Tamura, Hirotaka / Shibasaki, Takayuki et al. | 2019
- 128
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ISSCC 2019 Session 7 Overview: Machine Learning| 2019
- 130
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7.1 An 11.5TOPS/W 1024-MAC Butterfly Structure Dual-Core Sparsity-Aware Neural Processing Unit in 8nm Flagship Mobile SoCSong, Jinook / Cho, Yunkyo / Park, Jun-Seok / Jang, Jun-Woo / Leev, Sehwan / Song, Joon-Ho / Lee, Jae-Gon / Kang, Inyup et al. | 2019
- 132
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7.2 A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive ApplicationsYamada, Yutaka / Sano, Toru / Tanabe, Yasuki / Ishigaki, Yutaro / Hosoda, Soichiro / Hyuga, Fumihiko / Moriya, Akira / Hada, Ryuji / Masuda, Atsushi / Uchiyama, Masato et al. | 2019
- 134
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An 879GOPS 243mW 80fps VGA Fully Visual CNN-SLAM Processor for Wide-Range Autonomous ExplorationLi, Ziyun / Chen, Yu / Gong, Luyao / Liu, Lu / Sylvester, Dennis / Blaauw, David / Kim, Hun-Seok et al. | 2019
- 136
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A 2.1TFLOPS/W Mobile Deep RL Accelerator with Transposable PE Array and Experience CompressionKim, Changhyeon / Kang, Sanghoon / Shin, Dongjoo / Choi, Sungpill / Kim, Youngwoo / Yoo, Hoi-Jun et al. | 2019
- 138
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7.5 A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm2and 6T HBST-TRAM-Based 2D Data-Reuse ArchitectureYue, Jinshan / Liu, Ruoyang / Sun, Wenyu / Yuan, Zhe / Wang, Zhibo / Tu, Yung-Ning / Chen, Yi-Ju / Ren, Ao / Wang, Yanzhi / Chang, Meng-Fan et al. | 2019
- 140
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7.6 A 65nm 236.5nJ/Classification Neuromorphic Processor with 7.5% Energy Overhead On-Chip Learning Using Direct Spike-Only FeedbackPark, Jeongwoo / Lee, Juyun / Jeon, Dongsuk et al. | 2019
- 142
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7.7 LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16Lee, Jinsu / Lee, Juhyoung / Han, Donghyeon / Lee, Jinmook / Park, Gwangtae / Yoo, Hoi-Jun et al. | 2019
- 144
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ISSCC 2019 Session 8 Overview: DC-DC Converters| 2019
- 146
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8.1 A 93.8% Peak Efficiency, 5V-Input, 10A Max ILOAD Flying Capacitor Multilevel Converter in 22nm CMOS Featuring Wide Output Voltage Range and Flying Capacitor PrechargingSchaef, Christopher / Weng, Sheldon / Choi, Beomseok / Lambert, William / Radhakrishnan, Kaladhar / Ravichandran, Krishnan / Tschanz, James / De, Vivek et al. | 2019
- 148
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8.2 A Continuous-Input-Current Passive-Stacked Third-Order Buck Converter Achieving 0.7W/mm2 Power Density and 94% Peak EfficiencyAbdulslam, Abdullah / Mercier, Patrick P. et al. | 2019
- 150
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8.3 A 10.9W 93.4%-Efficient (27W 97%-Efficient) Flying-Inductor Hybrid DC-DC Converter Suitable for 1-Cell (2-Cell) Battery Charging ApplicationsHardy, Casey / Le, Hanh-Phuc et al. | 2019
- 152
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8.4 Fully Integrated Buck Converter with 78% Efficiency at 365mW Output Power Enabled by Switched-Inductor Capacitor Topology and Inductor Current Reduction TechniqueTang, Nghia / Nguyen, Bai / Tang, Yangyang / Hong, Wookpyo / Zhou, Zhiyuan / Heo, Deukhyoun et al. | 2019
- 154
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8.5 A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode OperationSchaef, Christopher / Desai, Nachiket / Krishnamurthy, Harish / Weng, Sheldon / Do, Huong / Lambert, William / Radhakrishnan, Kaladhar / Ravichandran, Krishnan / Tschanz, James / De, Vivek et al. | 2019
- 156
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8.6 A Fully Integrated 85%-Peak-Efficiency Hybrid Multi Ratio Resonant DC-DC Converter with 3.0-to-4.5V Input and 500μA -to-120mA Load RangeRenz, Peter / Kaufmann, Maik / Lueders, Michael / Wicht, Bernhard et al. | 2019
- 158
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8.7 A 2MHz 4-to-60VIN Buck-Boost Converter for Automotive Use Achieving 95% Efficiency and CISPR 25 Class 5 StandardXue, Jing / Song, Min Kyu / Ke, Xugang / Chen, Min / Shtargot, Leonard et al. | 2019
- 160
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ISSCC 2019 Session 9 Overview: High-Frequency Transceivers for Radar and Communications| 2019
- 162
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9.1 Toward Automotive Surround-View RadarsHung, Chih-Ming / Lin, Alex TC / Peng, BC / Wang, Hua / Hsu, Jui-Lin / Lu, Yen-Ju / Hsu, Weishow / Zhan, Jing-Hong Conan / Juan, Brian / Lok, Chi-Hang et al. | 2019
- 164
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9.2 A 192-Virtual-Receiver 77/79GHz GMSK Code-Domain MIMO Radar System-on-ChipGiannini, Vito / Goldenberg, Marius / Eshraghi, Aria / Maligeorgos, James / Lim, Lysander / Lobo, Ryan / Welland, Dave / Chow, Chung-Kai / Dornbusch, Andrew / Dupuis, Tim et al. | 2019
- 166
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9.3 A680 μW Burst-Chirp UWB Radar Transceiver for Vital Signs and Occupancy Sensing up to 15m DistanceLiu, Yao-Hong / Sheelavant, Sunil / Mercuri, Marco / Mateman, Paul / Dijkhuis, Johan / Zomagboguelou, Wilfried / Breeschoten, Arjan / Traferro, Stefano / Zhan, Yan / Torf, Tom et al. | 2019
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9.4 A 145GHz FMCW-Radar Transceiver in 28nm CMOSVisweswaran, Akshay / Vaesen, Kristof / Sinha, Siddhartha / Ocket, Ilja / Glassee, Miguel / Desset, Claude / Bourdoux, Andre / Wambacq, Piet et al. | 2019
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9.5 An 80Gb/s 300GHz-Band Single-Chip CMOS TransceiverLee, Sangyeop / Dong, Ruibing / Yoshida, Takeshi / Amakawa, Shuhei / Hara, Shinsuke / Kasamatsu, Akifumi / Sato, Junji / Fujishima, Minoru et al. | 2019
- 172
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9.6 A 42.2Gb/s 4.3pJ/b 60GHz Digital Transmitter with 12b/Symbol Polarization MIMOThakkar, Chintan / Shopov, Stefan / Chakrabarti, Anandaroop / Yamada, Shuhei / Choudhury, Debabani / Jaussi, James / Casper, Bryan et al. | 2019
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9.7 A Scalable 71-to-76GHz 64-Element Phased-Array Transceiver Module with 2×2 Direct-Conversion IC in 22nm FinFET CMOS TechnologyPellerano, Stefano / Callender, Steven / Shin, Woorim / Wang, Yanjie / Kundu, Somnath / Agrawal, Abhishek / Sagazio, Peter / Carlton, Brent / Sheikh, Farhana / Amadjikpe, Arnaud et al. | 2019
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9.8 A 28GHz 20.3%-Transmitter-Efficiency 1.5°-Phase-Error Beamforming Front-End IC with Embedded Switches and Dual-Vector Variable-Gain Phase ShiftersPark, Jinseok / Lee, Seungchan / Lee, Dongho / Hong, Songcheol et al. | 2019
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ISSCC 2019 Session 10 Overview: Sensor Interfaces| 2019
- 180
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10.1 An Energy Measurement Front-End with Integrated In-Situ Background Full System Accuracy Monitoring Including the Current and Voltage SensorsDanesh, Seyed / Holland, William / Spalding, Joe / Guidry, Michael / Hurwitz, J. E. D. et al. | 2019
- 182
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10.2 A 22ng/√Hz 17mW MEMS Accelerometer with Digital Noise-Reduction TechniquesFurubayashi, Yuki / Oshima, Takashi / Yamawaki, Taizo / Watanabe, Keiki / Mori, Keijiro / Mori, Naoki / Matsumoto, Akira / Kazama, Hideto / Kamada, Yudai / Isobe, Atsushi et al. | 2019
- 184
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10.3 A 0.12mm2 Wien-Bridge Temperature Sensor with 0.1°C (3σ) Inaccuracy from -40°C to 180°CPan, Sining / Gurleyuk, Cagri / Pimenta, Matheus F. / Makinwa, Kofi A. A. et al. | 2019
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10.4 A Wheatstone Bridge Temperature Sensor with a Resolution FoM of 20fJ.K2Pan, Sining / Makinwa, Kofi A. A. et al. | 2019
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ISSCC 2019 Session 11 Overview: Diagnostics| 2019
- 190
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11.1 A 5.37mW/Channel Pitch-Matched Ultrasound ASIC with Dynamic-Bit-Shared SAR ADC and 13.2V Charge-Recycling TX in Standard CMOS for Intracardiac EchocardiographyLee, Jihee / Lee, Kyoung-Rog / Eovino, Benjamin E. / Park, Jeong Hoan / Lin, Liwei / Yoo, Hoi-Jun / Yoo, Jerald et al. | 2019
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11.2 A CMOS Biosensor Array with 1024 3-Electrode Voltammetry Pixels and 93dB Dynamic RangeManickam, Arun / You, Kae-Dyi / Wood, Nicholas / Pei, Lei / Liu, Yang / Singh, Rituraj / Gamini, Nader / Shahrjerdi, Davood / Kuimelis, Robert G. / Hassibi, Arjang et al. | 2019
- 194
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11.3 A Capacitive Biosensor for Cancer Diagnosis Using a Functionalized Microneedle and a 13.7b-Resolution Capacitance-to-Digital Converter from 1 to 100nFSong, Seungwoo / Na, Jukwan / Jang, Moonhyung / Lee, Hyeyeon / Lee, Hyesoo / Lim, Yongbeom / Choi, Heonjin / Chae, Youngcheol et al. | 2019
- 196
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11.4 A Fast-Readout Mismatch-Insensitive Magnetoresistive Biosensor Front-End Achieving Sub-ppm SensitivityZhou, Xiahan / Sveiven, Michael / Hall, Drew A. et al. | 2019
- 198
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11.5 A 512-Pixel 3kHz-Frame-Rate Dual-Shank Lensless Filterless Single-Photon-Avalanche-Diode CMOS Neural Imaging ProbeLee, Changhyuk / Taal, Adriaan J. / Choi, Jaebin / Kim, Kukjoo / Tien, Kevin / Moreaux, Laurent / Roukes, Michael L. / Shepard, Kenneth L. et al. | 2019
- 200
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ISSCC 2019 Session 12 Overview: Emerging Technologies| 2019
- 202
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12.1 An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHzNatsui, Masanori / Suzuki, Daisuke / Tamakoshi, Akira / Watanabe, Toshinari / Honjo, Hiroaki / Koike, Hiroki / Nasuno, Takashi / Ma, Yitao / Tanigawa, Takaho / Noguchi, Yasuo et al. | 2019
- 204
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12.2 Micro Short-Circuit Detector Including S/H Circuit for 1hr Retention and 52dB Comparator Composed of C-Axis Aligned Crystalline IGZO FETs for Li-Ion Battery Protection ICInoue, Hiroki / Aoki, Takeshi / Akasawa, Fumika / Hamada, Toshiki / Takeuchi, Toshihiko / Nei, Kousei / Seki, Takako / Yakubo, Yuto / Takahashi, Kei / Fukai, Shuji et al. | 2019
- 206
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12.3 Memory Solutions for Flexible Thin-Film Logic: up to 8kb, >105.9kb/s LPROM and SRAM with Integrated Timing Generation Meeting the ISO NFC StandardDe Roose, Florian / Genoe, Jan / Kronemeijer, Auke J. / Myny, Kris / Dehaene, Wim et al. | 2019
- 208
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ISSCC 2019 Session 13 Overview: Non-Volatile Memories| 2019
- 210
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13.1 A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer TechnologyShibata, N. / Kanda, K. / Shimizu, T. / Nakai, J. / Nagao, O. / Kobayashi, N. / Miakashi, M. / Nagadomi, Y. / Nakano, T. / Kawabe, T. et al. | 2019
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13.2 A 3.6Mb 10.1Mb/mm2 Embedded Non-Volatile ReRAM Macro in 22nm FinFET Technology with Adaptive Forming/Set/Reset Schemes Yielding Down to 0.5V with Sensing Time of 5ns at 0.7VJain, Pulkit / Arslan, Umut / Sekhar, Meenakshi / Lin, Blake C. / Wei, Liqiong / Sahu, Tanaya / Alzate-vinasco, Juan / Vangapaty, Ajay / Meterelliyoz, Mesut / Strutt, Nathan et al. | 2019
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13.3 A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing TechniqueWei, Liqiong / Alzate, Juan G. / Arslan, Umut / Brockman, Justin / Das, Nilanjan / Fischer, Kevin / Ghani, Tahir / Golonzka, Oleg / Hentges, Patrick / Jahan, Rawshan et al. | 2019
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13.4 A 512Gb 3-bit/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s InterfaceKang, Dongku / Kim, Minsu / Jeon, Su Chang / Jung, Wontaeck / Park, Jooyong / Choo, Gyosoo / Shim, Dong-kyo / Kavala, Anil / Kim, Seung-Bum / Kang, Kyung-Min et al. | 2019
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13.5 A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array TechnologySiau, Chang / Kim, Kwang-Ho / Lee, Seungpil / Isobe, Katsuaki / Shibata, Noboru / Verma, Kapil / Ariki, Takuya / Li, Jason / Yuh, Jong / Amarnath, Anirudh et al. | 2019
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ISSCC 2019 Session 14 Overview: Machine Learning and Digital LDO Circuits| 2019
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14.1 A 65nm 1.1-to-9.1TOPS/W Hybrid-Digital-Mixed-Signal Computing Platform for Accelerating Model-Based and Model-Free Swarm RoboticsCao, Ningyuan / Chang, Muya / Raychowdhury, Arijit et al. | 2019
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14.2 A Compute SRAM with Bit-Serial Integer/Floating-Point Operations for Programmable In-Memory Vector AccelerationWang, Jingcheng / Wang, Xiaowei / Eckert, Charles / Subramaniyan, Arun / Das, Reetuparna / Blaauw, David / Sylvester, Dennis et al. | 2019
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14.3 A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience TechniquesWu, Tony F. / Le, Binh Q. / Radway, Robert / Bartolo, Andrew / Hwang, William / Jeong, Seungbin / Li, Haitong / Tandon, Pulkit / Vianello, Elisa / Vivet, Pascal et al. | 2019
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14.4 All-Digital Time-Domain CNN Engine Using Bidirectional Memory Delay Lines for Energy-Efficient Edge ComputingSayal, Aseem / Fathima, Shirin / Nibhanupudi, S. S. Teja / Kulkarni, Jaydeep P. et al. | 2019
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14.5 A 0.6-to-1.1V Computationally Regulated Digital LDO with 2.79-Cycle Mean Settling Time and Autonomous Runtime Gain Tracking in 65nm CMOSSun, Xun / Boora, Akshat / Zhang, Wenbing / Pamula, Venkata Rajesh / Sathe, Visvesh et al. | 2019
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14.6 A 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage RippleLi, Shuo / Calhoun, Benton H. et al. | 2019
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14.7 A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant CompensationLiu, Xiaosen / Krishnamurthy, Harish K. / Na, Taesik / Weng, Sheldon / Ahmed, Khondker Z. / Ravichandran, Krishnan / Tschanz, James / De, Vivek et al. | 2019
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ISSCC 2019 Session 15 Overview: Power for 5G, Wireless Power, and GaN Converters| 2019
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15.1 An 88%-Efficiency Supply Modulator Achieving 1.08μs/V Fast Transition and 100MHz Envelope-Tracking Bandwidth for 5G New Radio RF Power AmplifierPaek, Ji-Seon / Kim, Dongsu / Bang, Jun-Suk / Baek, Jongbeom / Choi, Jeonghyun / Nomiyama, Takahiro / Han, Jaeyeol / Choo, Younghwan / Youn, Yongsik / Park, Euiyoung et al. | 2019
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15.2 A 90ns/V Fast-Transition Symbol-Power-Tracking Buck Converter for 5G mm-Wave Phased-Array TransceiverPaek, Ji-Seon / Nomiyama, Takahiro / Han, Jaeyeol / Kim, Ik-Hwan / Lee, Yumi / Kim, Dongsu / Park, Euiyoung / Lee, Sungjun / Lee, Jongwoo / Cho, Thomas Byunghak et al. | 2019
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15.3 A 100W and 91% GaN-Based Class-E Wireless-Power-Transfer Transmitter with Differential-Impedance-Matching Control for Charging Multiple DevicesXie, Cheng-Yu / Yang, Shang-Hsien / Lu, Shen-Fu / Lin, Fa-Yi / Lin, Yen-An / Ou-Yang, You-Zheng / Chen, Ke-Horng / Liu, Kuo-Chi / Lin, Yin-Hsi et al. | 2019
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15.4 A 52% Peak-Efficiency >1W Isolated Power Transfer System Using Fully Integrated Magnetic-Core TransformerYue, Zhuo / Shaoyu, Ma / Tianting, Zhao / Wenhui, Qin / Yuanyuan, Zhao / Yingjie, Guo / Baoxing, Chen et al. | 2019
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15.5 An 800mW Fully Integrated Galvanic Isolated Power Transfer System Meeting CISPR 22 Class-B Emission Levels with 6dB MarginQin, Wenhui / Yang, Xin / Ma, Shaoyu / Liu, Fang / Zhao, Yuanyuan / Zhao, Tianting / Chen, Baoxing et al. | 2019
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15.6 A 10MHz i-Collapse Failure Self-Prognostic GaN Power Converter with TJ-Independent In-Situ Condition Monitoring and Proactive Temperature Frequency ScalingChen, Yingping / Ma, D. Brian et al. | 2019
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15.7 An 8.3MHz GaN Power Converter Using Markov Continuous RSSM for 35dBμV Conducted EMI Attenuation and One-Cycle TON Rebalancing for 27.6dB VO Jittering SuppressionChen, Yingping / Ma, D. Brian et al. | 2019
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15.8 A 4.5V/ns Active Slew-Rate-Controlling Gate Driver with Robust Discrete-Time Feedback Technique for 600V Superjunction MOSFETsKawai, Shusuke / Ueno, Takeshi / Onizuka, Kohei et al. | 2019
- 254
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ISSCC 2019 Session 16 Overview: Frequency Synthesizers| 2019
- 256
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16.1 A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOSLiu, Hanli / Sun, Zheng / Huang, Hongye / Deng, Wei / Siriburanon, Teerachot / Pang, Jian / Wang, Yun / Wu, Rui / Someya, Teruki / Shirane, Atsushi et al. | 2019
- 258
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16.2 A 76fsrms Jitter and –40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain OptimizationKim, Juyeop / Yoon, Heein / Lim, Younghyun / Lee, Yongsun / Cho, Yoonseo / Seong, Taeho / Choi, Jaehyouk et al. | 2019
- 260
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16.3 A −246dB Jitter-FoM 2.4GHz Calibration-Free Ring-Oscillator PLL Achieving 9% Jitter Variation Over PVTYang, Xiaofeng / Chan, Chi-Hang / Zhu, Yan / Martins, Rui P. et al. | 2019
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6.4 A 0.5-to-2.5GHz Multi-Output Fractional Frequency Synthesizer with 90fs Jitter and -106dBc Spurious Tones Based on Digital Spur CancellationHung, Szu-Yao / Pamarti, Sudhakar et al. | 2019
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16.5 A Fractional-N Synthesizer with 110fsrms Jitter and a Reference Quadrupler for Wideband 802.11axSong, Fei / Zhao, Yu / Wu, Bart / Tang, Litian / Lin, Leon / Razavi, Behzad et al. | 2019
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16.6 A Calibration-Free Triple-Loop Bang-Bang PLL Achieving 131fsrms Jitter and-70dBc Fractional SpursYang, Dihang / Abidi, Asad / Darabi, Hooman / Xu, Hao / Murphy, David / Wu, Hao / Wang, Zhaowen et al. | 2019
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16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fsrms Jitter in 65nm LP CMOSGrimaldi, Luigi / Bertulessi, Luca / Karman, Saleh / Cherniak, Dmytro / Garghetti, Alessandro / Samori, Carlo / Lacaita, Andrea L. / Levantino, Salvatore et al. | 2019
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16.8 A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference SpurYang, Zunsong / Chen, Yong / Yang, Shiheng / Mak, Pui-In / Martins, Rui P. et al. | 2019
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16.9 4.48GHz 0.18μm SiGe BiCMOS Exact-Frequency Fractional-N Frequency Synthesizer with Spurious-Tone Suppression Yielding a -80dBc In-Band Fractional SpurKennedy, Michael Peter / Donnelly, Yann / Breslin, James / Tulisi, Stefano / Patil, Sanganagouda / Curtin, Ciaran / Brookes, Stephen / Shelly, Brian / Griffin, Patrick / Keaveney, Michael et al. | 2019
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17.1 AI x Robotics: Technology Challenges and Opportunities in Sensors, Actuators, and Integrated CircuitsFujita, Masahiro et al. | 2019
- 278
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17.2 A 142nW Voice and Acoustic Activity Detection Chip for mm-Scale Sensor Nodes Using Time-Interleaved Mixer-Based Frequency ScanningCho, Minchang / Oh, Sechang / Shi, Zhan / Lim, Jongyup / Kim, Yejoong / Jeong, Seokhyeon / Chen, Yu / Blaauw, David / Kim, Hun-Seok / Sylvester, Dennis et al. | 2019
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17.3 Hybrid System for Efficient LAE-CMOS Interfacing in Large-Scale Tactile-Sensing Skins via TFT-Based Compressed SensingAygun, Levent E. / Kumar, Prakhar / Zheng, Zhiwu / Chen, Ting-Sheng / Wagner, Sigurd / Sturm, James C. / Verma, Naveen et al. | 2019
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17.4 16MHz FRAM Micro-Controller with a Low-Cost Sub-1μA Embedded Piezo-Electric Strain Sensor for ULP Motion DetectionKhanna, Sudhanshu / Zwerg, Michael / Elies, Brian / Luebbe, Juergen / Krishnasawamy, Nagaraj / Najar, Hadi / Bellary, Suman / Shih, Wei-Yan / Summerfelt, Scott / Bartling, Steven et al. | 2019
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17.5 A 0.8mm3 Ultrasonic Implantable Wireless Neural Recording System With Linear AM BackscatteringGhanbari, Mohammad Meraj / Piech, David K. / Shen, Konlin / Alamouti, Sina Faraji / Yalcin, Cem / Johnson, Benjamin C. / Carmena, Jose M. / Maharbiz, Michel M. / Muller, Rikky et al. | 2019
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17.6 A Sub-40μW 5Mb/s Magnetic Human Body Communication Transceiver Demonstrating Trans-Body Delivery of High-Fidelity Audio to a Wearable In-Ear HeadphonePark, Jiwoong / Mercier, Patrick P. et al. | 2019
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17.7 A 7.0fps Optical and Electrical Dual Tomographic Imaging SoC for Skin-Disease Diagnosis SystemLee, Yongsu / Kim, Kwantae / Lee, Jiwon / Lee, Kyoung-Rog / Gweon, Surin / Kim, Minseo / Yoo, Hoi-Jun et al. | 2019
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17.8 A 2.6μW Monolithic CMOS Photoplethysmographic Sensor Operating with 2μW LED PowerCaizzone, Antonino / Boukhayma, Assim / Enz, Christian et al. | 2019
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ISSCC 2019 Session 18 Overview: Analog Techniques| 2019
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18.1 A -105dBc THD+N (-114dBc HD2) at 2.8VPP Swing and 120dB DR Audio Decoder with Sample-and-Hold Noise Filtering and Poly Resistor Linearization SchemesWen, Shon-Hang / Chen, Kuan-Dar / Hsiao, Chuan-Hung / Chen, Ya-Chi et al. | 2019
- 296
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18.2 A 16fJ/Conversion-Step Time-Domain Two-Step Capacitance-to-Digital ConverterTang, Xiyuan / Li, Shaolan / Shen, Linxiao / Zhao, Wenda / Yang, Xiangxing / Williams, Randy / Liu, Jiaxin / Tan, Zhichao / Hall, Neal / Sun, Nan et al. | 2019
- 298
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18.3 An Auto-Zero Stabilized Voltage Buffer with a Quiet Chopping Scheme and Constant Input CurrentRooijers, Thije / Huijsing, Johan H. / Makinwa, Kofi A. A. et al. | 2019
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18.4 A 0.55nW/0.5V 32kHz Crystal Oscillator Based on a DC-Only Sustaining Amplifier for IoTEsmaeelzadeh, Hani / Pamarti, Sudhakar et al. | 2019
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18.5 A 54MHz Crystal Oscillator With 30× 18.5 Start-Up Time Reduction Using 2-Step Injection in 65nm CMOSMegawer, Karim M. / Pal, Nilanjan / Elkholy, Ahmed / Ahmed, Mostafa G. / Khashaba, Amr / Griffith, Danielle / Hanumolu, Pavan Kumar et al. | 2019
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18.6 A 32MHz Crystal Oscillator with Fast Start-up Using Synchronized Signal InjectionVerhoef, Bram / Prummel, Jan / Kruiskamp, Wim / Post, Rein et al. | 2019
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18.7 A 0.7V, 2.35% 3σ-Accuracy Bandgap Reference in 12nm CMOSChen, Yi-Wen / Horng, Jaw-Juinn / Chang, Chin-Ho / Kundu, Amit / Peng, Yung-Chow / Chen, Mark et al. | 2019
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18.8 A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-EffectJi, Youngwoo / Lee, Jungho / Kim, Byungsub / Park, Hong-June / Sim, Jae-Yoon et al. | 2019
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ISSCC 2019 Session 19 Overview: Adaptive Digital and Clocking Techniques| 2019
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19.1 Computationally Enabled Total Energy Minimization Under Performance Requirements for a Voltage-Regulated 0.38-to-0.58V Microprocessor in 65nm CMOSRahman, Fahim ur / Pamula, Rajesh / Boora, Akshat / Sun, Xun / Sathe, Visvesh et al. | 2019
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19.2 A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT VariationLee, Jeongsup / Zhang, Yiqun / Dong, Qing / Lim, Wooteak / Saligane, Mehdi / Kim, Yejoong / Jeong, Seokhyeon / Lim, Jongyup / Yasuda, Makoto / Miyoshi, Satoru et al. | 2019
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19.3 A 7nm All-Digital Unified Voltage and Frequency Regulator Based on a High-Bandwidth 2-Phase Buck Converter with Package InductorsAtallah, Francois / Bowman, Keith / Nguyen, Hoan / Jeong, Jihoon / Yingling, Daniel / Sun, Yu / Appel, Brad / Polomik, Anthony / Harinath, Mahesh / Morelli, Joshua et al. | 2019
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19.4 An Adaptive Clock Management Scheme Exploiting Instruction-Based Dynamic Timing Slack for a General-Purpose Graphics Processor Unit with Deep Pipeline and Out-of-Order ExecutionJia, Tianyu / Joseph, Russ / Gu, Jie et al. | 2019
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19.5 Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS TechnologyFan, Yongping / Xiang, Bo / Zhang, Dan / Ayers, James S. / Shen, Kuan-Yueh James / Mezhiba, Andrey et al. | 2019
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19.6 A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep ModeBol, David / Schramme, Maxime / Moreau, Ludovic / Haine, Thomas / Xu, Pengcheng / Frenkel, Charlotte / Dekimpe, Remi / Stas, Francois / Flandre, Denis et al. | 2019
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19.7 A Scalable Pipelined Time-Domain DTW Engine for Time-Series Classification Using Multibit Time Flip-Flops With 140Giga-Cell-Updates/s ThroughputChen, Zhengyu / Gu, Jie et al. | 2019
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ISSCC 2019 Session 20 Overview: Noise-Shaped and VCO-Based ADCs| 2019
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20.1 A 5GS/s 7.2 ENOB Time-Interleaved VCO-Based ADC Achieving 30.5fJ/conv-stepBaert, Maarten / Dehaene, Wim et al. | 2019
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20.2 A 40MHz-BW 320MS/s Passive Noise-Shaping SAR ADC With Passive Signal-Residue Summation in 14nm FinFETLin, Ying-Zu / Lin, Chin-Yu / Tsou, Shan-Chih / Tsai, Chih-Hou / Lu, Chao-Hsin et al. | 2019
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20.3 A 50MHz-Bandwidth 70.4dB-SNDR Calibration-Free Time-Interleaved 4th-Order Noise-Shaping SAR ADCJie, Lu / Zheng, Boyi / Flynn, Michael P. et al. | 2019
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20.4 An 8 × - OSR 25MHz-BW 79.4dB/74dB DR/SNDR CT Δ σ Modulator Using 7b Linearized Segmented DACs with Digital Noise-Coupling-Compensation Filter in 7nm FinFET CMOSLo, Tien-Yu / Weng, Chan-Hsiang / Hsieh, Hung-Yi / Shu, Yun-Shiang / Chiu, Pao-Cheng et al. | 2019
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20.5 A 76.6dB-SNDR 50MHz-BW 29.2mW Noise-Coupling-Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOSQi, Liang / Jain, Ankesh / Jiang, Dongyang / Sin, Sai-Weng / Martins, Rui P. / Ortmanns, Maurits et al. | 2019
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20.6 An 80MHz-BW 31.9fJ/conv-step Filtering ΔΣ ADC with a Built-In DAC-Segmentation/ELD-Compensation 6b 960MS/s SAR-Quantizer in 28nm LP for 802.11ax ApplicationsWang, Chi-Yun / Tsai, Jen-Huan / Su, Sheng-Yuan / Tsai, Jen-Che / Chen, Jhy-Rong / Lou, Chih-Hong et al. | 2019
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20.7 A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZWang, Wei / Chan, Chi-Hang / Zhu, Yan / Martins, Rui P. et al. | 2019
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ISSCC 2019 Session 21 Overview: 4G/5G Transceivers| 2019
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21.1 A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NRPang, Jian / Li, Zheng / Kubozoe, Ryo / Luo, Xueting / Wu, Rui / Wang, Yun / You, Dongwon / Fadila, Ashbir Aviat / Saengchan, Rattanan / Nakamura, Takeshi et al. | 2019
- 346
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21.2 A 27-to-41GHz MIMO Receiver with N-Input-N-Output Using Scalable Cascadable Autonomous Array-Based High-Order Spatial Filters for Instinctual Full-FoV Multi-Blocker/Signal ManagementHuang, Min-Yu / Wang, Hua et al. | 2019
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21.3 A Reconfigurable Bidirectional 28/37/39GHz Front-End Supporting MIMO-TDD, Carrier Aggregation TDD and FDD/Full-Duplex with Self-Interference Cancellation in Digital and Fully Connected Hybrid BeamformersMondal, Susnata / Singh, Rahul / Paramesh, Jeyanandh et al. | 2019
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21.4 An LTE-A Multimode Multiband RF Transceiver with 4RX/2TX Inter-Band Carrier Aggregation, 2-Carrier 4×4 MIMO with 256QAM and HPUE Capability in 28nm CMOSTang, Chih-Chun / Lee, Yi-Bin / Sun, Chih-Hao Eric / Lin, Cheng-Chieh / Syu, Jin-Siang / Wu, Min-Hua / Chen, YangChuan / Chueh, Tzu-Chan / Bryant, Carl / Collados, Manel et al. | 2019
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21.5 A 5G Sub-6GHz Zero-IF and mm-Wave IF Transceiver with MIMO and Carrier AggregationJann, Benjamin / Chance, Greg / Roy, Ankur Guha / Balakrishnan, Aishwarya / Karandikar, Niranjan / Brown, Thomas / Li, Xi / Davis, Brandon / Ceballos, Jose Luis / Tanzi, Nebil et al. | 2019
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21.6 A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOSLee, Jongwoo / Han, Sangwook / Lee, Joonhee / Kang, Byoungjoong / Bae, Jeongyeol / Jang, Jaehyuk / Oh, Seunghyun / Ahn, Suseob / Kang, Sanghoon / Bui, Quang-Diep et al. | 2019
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21.7 A Mixed-Signal Circuit Technique for Cancellation of Multiple Modulated Spurs in 4G/5G Carrier-Aggregation TransceiversSadjina, Silvester / Dufrene, Krzysztof / Kanumalli, Ram Sunil / Huemer, Mario / Pretl, Harald et al. | 2019
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ISSCC 2019 Session 22 Overview: Physiological Monitoring| 2019
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22.1 A 769μW Battery-Powered Single-Chip SoC With BLE for Multi-Modal Vital Sign Health PatchesKonijnenburg, Mario / van Wegberg, Roland / Song, Shuang / Ha, Hyunsoo / Sijbers, Wim / Xu, Jiawei / Stanzione, Stefano / van Liempd, Chris / Biswas, Dwaipayan / Breeschoten, Arjan et al. | 2019
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22.2 A Rugged Wearable Modular ExG Platform Employing a Distributed Scalable Multi-Channel FM-ADC Achieving 101dB Input Dynamic Range and Motion-Artifact ResilienceWarchall, Julian / Theilmann, Paul / Ouyang, Yuxuan / Garudadri, Harinath / Mercier, Patrick P. et al. | 2019
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22.3 A 0.5V 9.26μW 15.28mΩ/√Hz Bio-Impedance Sensor IC With 0.55° Overall Phase ErrorKim, Kwantae / Kim, Ji-Hoon / Gweon, Surin / Lee, Jiwon / Kim, Minseo / Lee, Yongsu / Kim, Soyeon / Yoo, Hoi-Jun et al. | 2019
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22.4 A 27.8μW Biopotential Amplifier Tolerant to 30Vpp Common-Mode Interference for Two-Electrode ECG Recording in 0.18μm CMOSKoo, Nahmil / Cho, SeongHwan et al. | 2019
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22.5 A Bio-Impedance Readout IC With Digital-Assisted Baseline Cancellation for 2-Electrode MeasurementHa, Hyunsoo / Sijbers, Wim / van Wegberg, Roland / Xu, Jiawei / Konijnenburg, Mario / Vis, Peter / Breeschoten, Arjan / Song, Shuang / Van Hoof, Chris / Van Helleputte, Nick et al. | 2019
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22.6 A 13-Channel 1.53-mW 11.28-mm2 Electrical Impedance Tomography SoC Based on Frequency Division Multiplexing with 10× Throughput ReductionLiu, Boxiao / Wang, Guoxing / Li, Yongfu / Li, Hui / Gao, Yue / Zeng, Lei / Ma, Yixin / Lian, Yong / Heng, Chun Huat et al. | 2019
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22.7 A Programmable Wireless EEG Monitoring SoC with Open/Closed-Loop Optogenetic and Electrical Stimulation for Epilepsy ControlLee, Shuenn-Yuh / Tsou, Chieh / Huang, Peng-Wei / Cheng, Po-Hao / Liao, Chi-Chung / Liao, Zhan-Xien / Lee, Hao-Yun / Lin, Chou-Ching / Hsieh, Chia-Hsiang et al. | 2019
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22.8 Adaptively Clock-Boosted Auto-Ranging Responsive Neurostimulator for Emerging Neuromodulation ApplicationsPazhouhandeh, M. Reza / OrLeary, Gerard / Weisspapir, Iliya / Groppe, David / Nguyen, Xuan-Thuan / Abdelhalim, Karim / Jafari, Hamed Mazhab / Valiante, Taufik A. / Carlen, Peter / Verma, Naveen et al. | 2019
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ISSCC 2019 Session 23 Overview: DRAM| 2019
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23.1 A 7.5Gb/s/pin LPDDR5 SDRAM With WCK Clocking and Non-Target ODT for High Speed and With DVFS, Internal Data Copy, and Deep-Sleep Mode for Low PowerHa, Kyung-Soo / Lee, Chang-Kyo / Lee, Dongkeon / Moon, Daesik / Jang, Jin-Hun / Hwang, Hyong-Ryol / Chi, Hyungjoon / Park, Junghwan / Shin, Seungjun / Park, Dukha et al. | 2019
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23.2 A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization SchemeKim, Dongkyun / Park, Minsu / Jang, Sungchun / Song, Jun-Yong / Chi, Hankyu / Choi, Geunho / Choi, Sunmyung / Kim, Jaeil / Kim, Changhyun / Kim, Kyungwhan et al. | 2019
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23.3 A 3-bit/2UI 27Gb/s PAM-3 Single-Ended Transceiver Using One-Tap DFE for Next-Generation Memory InterfacePark, Hyunsu / Song, Junyoung / Lee, Yeonho / Sim, Jincheol / Choi, Jonghyuck / Kim, Chulwoo et al. | 2019
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23.4 A 512GB 1.1V Managed DRAM Solution with 16GB ODP and Media ControllerLee, Seongju / Jeon, Byungdeuk / Kang, Kyeongpil / Ka, Dongyoon / Kim, Nayeon / Kim, Yongseop / Hong, Yunseok / Kang, Mankeun / Min, Jinyong / Lee, Mingyu et al. | 2019
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ISSCC 2019 Session 24 Overview: SRAM and Computation-in-Memory| 2019
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24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge ProcessorsXue, Cheng-Xin / Chen, Wei-Hao / Liu, Je-Syu / Li, Jia-Fang / Lin, Wei-Yu / Lin, Wei-En / Wang, Jing-Hong / Wei, Wei-Chen / Chang, Ting-Wei / Chang, Tung-Cheng et al. | 2019
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24.2 A 7nm 2.1GHz Dual-Port SRAM with WL-RC Optimization and Dummy-Read-Recovery Circuitry to Mitigate Read- Disturb-Write IssueFujiwara, Hidehiro / Lin, Chih-Yu / Pan, Hsien-Yu / Lin, Cheng-Han / Huang, Po-Yi / Lin, Kao-Cheng / Liaw, Jhon-Jhy / Chen, Yen-Huei / Liao, Hung-Jen / Chang, Jonathan et al. | 2019
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24.3 A Voltage and Temperature Tracking SRAM Assist Supporting 740mV Dual-Rail Offset for Low-Power and High-Performance Applications in 7nm EUV FinFET TechnologyLee, Inhak / Jeong, Hanwool / Baeck, Sangyeop / Gupta, Siddharth / Park, Changnam / Seo, Dongwook / Choi, Jaesung / Kim, Jaeyoung / Kim, Hoon / Kang, Jungmyung et al. | 2019
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24.4 Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width ModulationYang, Jun / Kong, Yuyao / Wang, Zhen / Liu, Yan / Wang, Bo / Yin, Shouyi / Shi, Longxin et al. | 2019
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24.5 A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine LearningSi, Xin / Chen, Jia-Jing / Tu, Yung-Ning / Huang, Wei-Hsing / Wang, Jing-Hong / Chiu, Yen-Cheng / Wei, Wei-Chen / Wu, Ssu-Yen / Sun, Xiaoyu / Liu, Rui et al. | 2019
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ISSCC 2019 Session 25 Overview: Circuits Enabling Security| 2019
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25.1 A 562F2 Physically Unclonable Function with a Zero-Overhead Stabilization SchemeLi, Dai / Yang, Kaiyuan et al. | 2019
- 402
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25.2 A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With <6×10−6 Native Bit Error RatePang, Yachuan / Gao, Bin / Wu, Dong / Yi, Shengyu / Liu, Qi / Chen, Wei-Hao / Chang, Ting-Wei / Lin, Wei-En / Sun, Xiaoyu / Yu, Shimeng et al. | 2019
- 404
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25.3 A 128b AES Engine with Higher Resistance to Power and Electromagnetic Side-Channel Attacks Enabled by a Security-Aware Integrated All-Digital Low-Dropout RegulatorSingh, Arvind / Kar, Monodeep / Mathew, Sanu / Rajan, Anand / De, Vivek / Mukhopadhyay, Saibal et al. | 2019
- 406
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ISSCC 2019 Session 26 Overview: Frequency Generation & Interference Mitigation| 2019
- 408
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26.1 A Self-Calibrated 16GHz Subsampling-PLL-Based 30s Fast Chirp FMCW Modulator with 1.5GHz Bandwidth and 100kHz rms ErrorShi, Qixian / Bunsen, Keigo / Markulic, Nereo / Craninckx, Jan et al. | 2019
- 410
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26.2 A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN CornerGuo, Hao / Chen, Yong / Mak, Pui-In / Martins, Rui P. et al. | 2019
- 412
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26.3 A 25-to-38GHz, 195dB FoMT LC QVCO in 65nm LP CMOS Using a 4-Port Dual-Mode Resonator for 5G RadiosBhat, Abhishek / Krishnapura, Nagendra et al. | 2019
- 414
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26.4 A 2.4GHz 65nm CMOS Mixer-First Receiver Using 4-Stage Cascaded Inverter-Based Envelope-Biased LNAs Achieving 66dB In-Band Interference Tolerance and −83dBm SensitivityYe, Dawei / Xu, Rongjin / Richard Shi, C.-J. et al. | 2019
- 416
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26.5 A 0.1-to-0.2V Transformer-Based Switched-Mode Folded DCO in 22nm FDSOI With Active Step-Down Impedance Achieving 197dBc/Hz Peak FoM and 40MHz/V Frequency PushingEl-Aassar, Omar / Rebeiz, Gabriel M. et al. | 2019
- 418
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ISSCC 2019 Session 27 Overview: Energy Harvesting & DC/DC Control Techniques| 2019
- 420
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27.1 An 84% Peak Efficiency Bipolar-Input Boost/Flyback Hybrid Converter With MPPT and on-Chip Cold Starter for Thermoelectric Energy HarvestingCao, Peng / Qian, Yao / Xue, Pan / Lu, Danzhu / He, Jie / Hong, Zhiliang et al. | 2019
- 422
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27.2 An Adiabatic Sense and Set Rectifier for Improved Maximum-Power-Point Tracking in Piezoelectric Harvesting with 541% Energy Extraction GainPeng, Yimai / Choo, David Kyojin / Oh, Sechang / Lee, Inhee / Jang, Taekwang / Kim, Yejoong / Lim, Jongyup / Blaauw, David / Sylvester, Dennis et al. | 2019
- 424
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27.3 A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction ImprovementChen, Zhiyuan / Jiang, Yang / Law, Man-Kay / Mak, Pui-In / Zeng, Xiaoyang / Martins, Rui P. et al. | 2019
- 426
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27.4 Multi-Beam Shared-Inductor Reconfigurable Voltage/SECE-Mode Piezoelectric Energy Harvesting of Multi-Axial Human MotionMeng, Miao / Ibrahim, Ahmed / Xue, Tiancheng / Yeo, Hong Goo / Wang, Dixiong / Roundy, Shad / Trolier-McKinstry, Susan / Kiani, Mehdi et al. | 2019
- 428
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27.5 A 91%-Efficiency Envelope-Tracking Modulator Using Hysteresis-Controlled Three-Level Switching Regulator and Slew-Rate-Enhanced Linear Amplifier for LTE-80MHz ApplicationsMahmoudidaryan, Parisa / Mandal, Debashis / Bakkaloglu, Bertan / Kiaei, Sayfe et al. | 2019
- 430
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27.6 Background Capacitor-Current-Sensor Calibration of DC-DC Buck Converter with DVS for Accurately Accelerating Load-Transient ResponseKuo, Tai-Haur / Huang, Yi-Wei / Wang, Pai-Yi et al. | 2019
- 432
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27.7 A Synthesizable Digital AOT 4-Phase Buck Voltage Regulator for Digital Systems with 0.0054mm2 Controller and 80ns Recovery TimeChoi, Minho / Kye, Chan-Ho / Oh, Jonghyun / Choo, Min-Seong / Jeong, Deog-Kyoon et al. | 2019
- 434
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27.8 Dynamic-Charging Current-Scaling Technique with Dual Accurate Current Control and Temperature Loops with Charging-Current Accuracy up to 99.6% for 1.6× Faster Lithium-Ion Battery ChargingLin, Wei-Tin / Lin, Zong-Yi / Liu, Chia-Hao / Huang, Chia-Ming / Chu, Li-Cheng / Chen, Ke-Horng / Lin, Yin-Hsi / Lin, Shian-Ru / Tsai, Tsung-Yen / Tsai, Hann-Huei et al. | 2019
- 436
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ISSCC 2019 Session 28 Overview: Techniques for Low-Power & High-Performance Wireless| 2019
- 438
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28.1 A 0.42nW 434MHz -79.1dBm Wake-Up Receiver with a Time-Domain IntegratorMangal, Vivek / Kinget, Peter R. et al. | 2019
- 440
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28.2 A 220μW -85dBm Sensitivity BLE-Compliant Wake-up Receiver Achieving -60dB SIR via Single-Die Multi- Channel FBAR-Based Filtering and a 4-Dimentional Wake-Up SignatureWang, Po-Han Peter / Mercier, Patrick P. et al. | 2019
- 442
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28.3 A 606μW mm-Scale Bluetooth Low-Energy Transmitter Using Co-Designed 3.5×3.5mm2 Loop Antenna and Transformer-Boost Power OscillatorShi, Yao / Chen, Xing / Kim, Hun-Seok / Blaauw, David / Wentzloff, David et al. | 2019
- 444
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28.4 A High-Q Resonant Inductive Link Transmit Modulator/Driver for Enhanced Power and FSK/PSK Data Transfer Using Adaptive-Predictive Phase-Continuous Switching Fractional-Capacitance TuningKennedy, Henry / Bodnar, Rares / Lee, Teerasak / Redman-White, William et al. | 2019
- 446
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28.5 Non-Magnetic 60GHz SOI CMOS Circulator Based on Loss/Dispersion-Engineered Switched Bandpass FiltersNagulu, Aravind / Krishnaswamy, Harish et al. | 2019
- 448
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28.6 Full-Duplex 2×2 MIMO Circulator-Receiver with High TX Power Handling Exploiting MIMO RF and Shared-Delay Baseband Self-Interference CancellationDastjerdi, Mahmood Baraani / Jain, Sanket / Reiskarimian, Negar / Natarajan, Arun / Krishnaswamy, Harish et al. | 2019
- 450
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28.7 A Wideband Blocker-Tolerant Receiver with High-Q RF-Input Selectivity and <-80dBm LO LeakageWang, Huan / Wang, Zisong / Heydari, Payam et al. | 2019
- 452
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28.8 A 21dBm-OP1dB 20.3%-Efficiency -131.8dBm/Hz-Noise X-Band Cartesian-Error-Feedback Transmitter with Fully Integrated Power Amplifier in 65nm CMOSLi, Jinbo / Xu, Zhiwei / Gu, Qun J. et al. | 2019
- 454
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ISSCC 2019 Session 29 Overview: Quantum & Photonics Technologies| 2019
- 456
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29.1 A 28nm Bulk-CMOS 4-to-8GHz ¡2mW Cryogenic Pulse Modulator for Scalable Quantum ComputingBardin, Joseph C. / Jeffrey, Evan / Lucero, Erik / Huang, Trent / Naaman, Ofer / Barends, Rami / White, Ted / Giustina, Marissa / Sank, Daniel / Roushan, Pedram et al. | 2019
- 458
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29.2 A Scalable Quantum Magnetometer in 65nm CMOS with Vector-Field Detection CapabilityIbrahim, Mohamed I. / Foy, Christopher / Englund, Dirk R. / Han, Ruonan et al. | 2019
- 460
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29.3 A 48GHz 5.6mW Gate-Level-Pipelined Multiplier Using Single-Flux Quantum LogicNagaoka, Ikki / Tanaka, Masamitsu / Inoue, Koji / Fujimaki, Akira et al. | 2019
- 462
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29.4 Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population TrappingZhang, Haosheng / Herdian, Hans / Narayanan, Aravind Tharayil / Shirane, Atsushi / Suzuki, Mitsuru / Harasaka, Kazuhiro / Adachi, Kazuhiko / Yanagimachi, Shinya / Okada, Kenichi et al. | 2019
- 464
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29.5 A Single-Chip Optical Phased Array in a 3D-Integrated Silicon Photonics/65nm CMOS TechnologyKim, Taehwan / Bhargava, Pavan / Poulton, Christopher V. / Notaros, Jelena / Yaacobi, Ami / Timurdogan, Erman / Baiocco, Christopher / Fahrenkopf, Nicholas / Kruger, Seth / Ngai, Tat et al. | 2019
- 466
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29.6 A Digital-Type GaN Driver with Current-Pulse-Balancer Technique Achieving Sub-Nanosecond Current Pulse Width for High-Resolution and Dynamic Effective Range LiDAR SystemMa, Yu-Sheng / Lin, Zong-Yi / Lin, Yen-Ting / Lee, Cheng-Yen / Huang, Tzu-Ping / Chen, Ke-Horng / Lin, Yin-Hsi / Lin, Shian-Ru / Tsai, Tsung-Yen et al. | 2019
- 468
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29.7 A 500Mb/s -46.1dBm CMOS SPAD Receiver for Laser Diode Visible-Light CommunicationsKosman, John / Almer, Oscar / Abbas, Tarek Al / Dutton, Neale / Walker, Richard / Videv, Stefan / Moore, Kevin / Haas, Harald / Henderson, Robert et al. | 2019
- 470
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29.8 SHARC: Self-Healing Analog with RRAM and CNFETsAmer, Aya G. / Ho, Rebecca / Hills, Gage / Chandrakasan, Anantha P. / Shulaker, Max M. et al. | 2019
- 472
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ISSCC 2019 Session 30 Overview: Advanced Wireline Techniques| 2019
- 474
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30.1 Single-Pair Automotive PHY Solutions from 10Mb/s to 10Gb/s and BeyondBesten, Gerrit W. den et al. | 2019
- 476
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30.2 A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFETKim, Gain / Kull, Lukas / Luu, Danny / Braendli, Matthias / Menolfi, Christian / Francese, Pier-Andrea / Yueksel, Hazar / Aprile, Cosimo / Morf, Thomas / Kossel, Marcel et al. | 2019
- 478
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30.3 A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage SystemsToi, Takashi / Wadatsumi, Junji / Kobayashi, Hiroyuki / Shimizu, Yutaka / Satoh, Yuji / Morimoto, Makoto / Ito, Rui / Ashida, Mitsuyuki / Tsubouchi, Yuta / Nozawa, Mai et al. | 2019
- 480
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30.4 A 32Gb/s 2.9pJ/b Transceiver for Sequence-Coded PAM-4 Signalling with 4-to-6dB SNR Gain in 28nm FDSOI CMOSAurangozeb / Dick, Carson / Mohammad, Maruf / Hossain, Masum et al. | 2019
- 482
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30.5 A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOSShahramian, Shayan / Dehlaghi, Behzad / Liang, Joshua / Bespalko, Ryan / Dunwell, Dustin / Bailey, James / Wang, Bo / Sharif-Bakhtiar, Alireza / O'Farrell, Michael / Tang, Kerry et al. | 2019
- 484
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30.6 A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic TransmitterAhmed, Abdelrahman H. / Lim, Daihyun / Elmoznine, Abdellatif / Ma, Yangjin / Huynh, Tam / Williams, Christopher / Vera, Leonardo / Liu, Yang / Shi, Ruizhi / Streshinsky, Matthew et al. | 2019
- 486
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30.7 An 8b Injection-Locked Phase Rotator with Dynamic Multiphase Injection for 28/56/112Gb/s Serdes ApplicationHuang, Yi-Chieh / Chen, Bo-Jiun et al. | 2019
- 488
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30.8 A 0.65V 12-to-16GHz Sub-Sampling PLL with 56.4fsrms Integrated Jitter and -256.4dB FoMZhang, Zhao / Zhu, Guang / Yue, C. Patrick et al. | 2019
- 490
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30.9 A 140fsrms-Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope CalibratorYoo, Seyeon / Choi, Seojin / Lee, Yongsun / Seong, Taeho / Lim, Younghyun / Choi, Jaehyouk et al. | 2019
- 493
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ISSCC 2019 Tutorial| 2019
- 496
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F1: Sub-6GHz 5G Radio Circuits and Systems: From Concepts to Silicon| 2019
- 498
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F2: Memory-Centric Computing from IoT to Artificial Intelligence and Machine Learning| 2019
- 501
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F3: The Complete Advanced Driver-Assistance System (ADAS) Sensing Network| 2019
- 504
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F4: Intelligence at the Edge: How Can We Make Machine Learning More Energy Efficient?| 2019
- 507
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ISSCC 2019 F5: 56Gb/s to 112Gb/s and Beyond – Design Challenges and Solutions in Wireline Communications| 2019
- 510
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F6: The Right Tool for the Job: Application-Optimized Data Converters| 2019
- 512
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EE1: Student Research Preview (SRP)| 2019
- 517
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EE4: Industry Showcase [13 abstracts]| 2019
- 524
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ISSCC 2019 SC: Integrated Phased Arrays: Theory, Practice, and Implementation for 5G and Beyond| 2019
- 526
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ISSCC 2019 Index to Authors| 2019
- 530
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ISSCC 2019 Executive Committee| 2019
- 531
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ISSCC 2019 Technical Program Committee| 2019
- 534
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ISSCC 2019 Conference Layout| 2019
- 535
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ISSCC 2020 Call for Papers| 2019
- 536
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ISSCC 2019 Time Table| 2019
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[Front cover]| 2019
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ISSCC 2019 Session 17 Overview| 2019
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EE3: Making a Career Choice| 2019
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EE2: How to Save Lives with Circuits| 2019
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EE5: "Moving to The Dark Side"| 2019
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[Back cover]| 2019
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[Title page]| 2019
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EE6: "How Can Hardware Designers Reclaim the Spotlight?"| 2019